1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2012 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX6Q SabreSD board.
8 #ifndef __MX6SABRESD_CONFIG_H
9 #define __MX6SABRESD_CONFIG_H
15 #define CONFIG_MACH_TYPE 3980
16 #define CONFIG_MXC_UART_BASE UART1_BASE
17 #define CONSOLE_DEV "ttymxc0"
19 #include "mx6sabre_common.h"
22 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
23 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
24 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
26 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
27 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
28 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
29 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
31 #define CONFIG_SYS_FSL_USDHC_NUM 3
34 #define CONFIG_PCI_SCAN_SHOW
35 #define CONFIG_PCIE_IMX
36 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
37 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
41 #define CONFIG_SYS_I2C_MXC
42 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
43 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
44 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
48 #define CONFIG_POWER_I2C
49 #define CONFIG_POWER_PFUZE100
50 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
54 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
55 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
56 #define CONFIG_MXC_USB_FLAGS 0
57 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
60 #endif /* __MX6SABRESD_CONFIG_H */