2 * (C) Copyright 2001, 2002
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
34 #if defined(CONFIG_SOFT_I2C)
36 /* #define DEBUG_I2C */
39 /*-----------------------------------------------------------------------
46 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
47 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
51 #define PRINTD(fmt,args...) do { \
52 DECLARE_GLOBAL_DATA_PTR; \
53 if (gd->have_console) \
54 printf (fmt ,##args); \
57 #define PRINTD(fmt,args...)
60 /*-----------------------------------------------------------------------
63 static void send_reset (void);
64 static void send_start (void);
65 static void send_stop (void);
66 static void send_ack (int);
67 static int write_byte (uchar byte);
68 static uchar read_byte (int);
71 /*-----------------------------------------------------------------------
72 * Send a reset sequence consisting of 9 clocks with the data signal high
73 * to clock any confused device back into an idle state. Also send a
74 * <stop> at the end of the sequence for belts & suspenders.
76 static void send_reset(void)
79 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
82 volatile immap_t *immr = (immap_t *)CFG_IMMR;
88 for(j = 0; j < 9; j++) {
100 /*-----------------------------------------------------------------------
101 * START: High -> Low on SDA while SCL is High
103 static void send_start(void)
105 #ifdef CONFIG_MPC8260
106 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
109 volatile immap_t *immr = (immap_t *)CFG_IMMR;
122 /*-----------------------------------------------------------------------
123 * STOP: Low -> High on SDA while SCL is High
125 static void send_stop(void)
127 #ifdef CONFIG_MPC8260
128 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
131 volatile immap_t *immr = (immap_t *)CFG_IMMR;
147 /*-----------------------------------------------------------------------
148 * ack should be I2C_ACK or I2C_NOACK
150 static void send_ack(int ack)
152 #ifdef CONFIG_MPC8260
153 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
156 volatile immap_t *immr = (immap_t *)CFG_IMMR;
175 /*-----------------------------------------------------------------------
176 * Send 8 bits and look for an acknowledgement.
178 static int write_byte(uchar data)
180 #ifdef CONFIG_MPC8260
181 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
184 volatile immap_t *immr = (immap_t *)CFG_IMMR;
190 for(j = 0; j < 8; j++) {
193 I2C_SDA(data & 0x80);
203 * Look for an <ACK>(negative logic) and return it.
218 return(nack); /* not a nack is an ack */
222 /*-----------------------------------------------------------------------
223 * if ack == I2C_ACK, ACK the byte so can continue reading, else
224 * send I2C_NOACK to end the read.
226 static uchar read_byte(int ack)
228 #ifdef CONFIG_MPC8260
229 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
232 volatile immap_t *immr = (immap_t *)CFG_IMMR;
238 * Read 8 bits, MSB first.
242 for(j = 0; j < 8; j++) {
256 /*=====================================================================*/
257 /* Public Functions */
258 /*=====================================================================*/
260 /*-----------------------------------------------------------------------
263 void i2c_init (int speed, int slaveaddr)
266 volatile immap_t *immr = (immap_t *)CFG_IMMR;
273 * WARNING: Do NOT save speed in a static variable: if the
274 * I2C routines are called before RAM is initialized (to read
275 * the DIMM SPD, for instance), RAM won't be usable and your
281 /*-----------------------------------------------------------------------
282 * Probe to see if a chip is present. Also good for checking for the
283 * completion of EEPROM writes since the chip stops responding until
284 * the write completes (typically 10mSec).
286 int i2c_probe(uchar addr)
290 /* perform 1 byte read transaction */
292 rc = write_byte ((addr << 1) | 0);
298 /*-----------------------------------------------------------------------
301 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
304 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
305 chip, addr, alen, buffer, len);
307 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
309 * EEPROM chips that implement "address overflow" are ones
310 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
311 * address and the extra bits end up in the "chip address"
312 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
313 * four 256 byte chips.
315 * Note that we consider the length of the address field to
316 * still be one byte because the extra address bits are
317 * hidden in the chip address.
319 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
321 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
326 * Do the addressing portion of a write cycle to set the
327 * chip's address pointer. If the address length is zero,
328 * don't do the normal write cycle to set the address pointer,
329 * there is no address pointer in this chip.
333 if(write_byte(chip << 1)) { /* write cycle */
335 PRINTD("i2c_read, no chip responded %02X\n", chip);
338 shift = (alen-1) * 8;
340 if(write_byte(addr >> shift)) {
341 PRINTD("i2c_read, address not <ACK>ed\n");
346 send_stop(); /* reportedly some chips need a full stop */
350 * Send the chip address again, this time for a read cycle.
351 * Then read the data. On the last byte, we do a NACK instead
352 * of an ACK(len == 0) to terminate the read.
354 write_byte((chip << 1) | 1); /* read cycle */
356 *buffer++ = read_byte(len == 0);
362 /*-----------------------------------------------------------------------
365 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
367 int shift, failures = 0;
369 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
370 chip, addr, alen, buffer, len);
373 if(write_byte(chip << 1)) { /* write cycle */
375 PRINTD("i2c_write, no chip responded %02X\n", chip);
378 shift = (alen-1) * 8;
380 if(write_byte(addr >> shift)) {
381 PRINTD("i2c_write, address not <ACK>ed\n");
388 if(write_byte(*buffer++)) {
396 /*-----------------------------------------------------------------------
399 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
403 i2c_read(i2c_addr, reg, 1, &buf, 1);
408 /*-----------------------------------------------------------------------
411 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
413 i2c_write(i2c_addr, reg, 1, &val, 1);
417 #endif /* CONFIG_SOFT_I2C */