2 * Copyright (c) 2012 The Chromium OS Authors.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __ASM_ARCH_EXYNOS_SPL_H__
8 #define __ASM_ARCH_EXYNOS_SPL_H__
10 #include <asm/arch/dmc.h>
11 #include <asm/arch/power.h>
14 /* Parameters of early board initialization in SPL */
15 struct spl_machine_param {
16 /* Add fields as and when required */
18 u32 version; /* Version number */
19 u32 size; /* Size of block */
21 * Parameters we expect, in order, terminated with \0. Each parameter
22 * is a single character representing one 32-bit word in this
25 * Valid characters in this string are:
32 * f frequency_mhz (memory frequency in MHz)
33 * a ARM clock frequency in MHz
34 * s serial base address
35 * i i2c base address for early access (meant for PMIC)
36 * r board rev GPIO numbers used to read board revision
37 * (lower halfword=bit 0, upper=bit 1)
38 * M Memory Manufacturer name
41 char params[12]; /* Length must be word-aligned */
42 u32 mem_iv_size; /* Memory channel interleaving size */
43 enum ddr_mode mem_type; /* Type of on-board memory */
45 * U-Boot size - The iROM mmc copy function used by the SPL takes a
46 * block count paramter to describe the U-Boot size unlike the spi
47 * boot copy function which just uses the U-Boot size directly. Align
48 * the U-Boot size to block size (512 bytes) when populating the SPL
49 * table only for mmc boot.
52 unsigned boot_source; /* Boot device */
53 unsigned frequency_mhz; /* Frequency of memory in MHz */
54 unsigned arm_freq_mhz; /* ARM Frequency in MHz */
55 u32 serial_base; /* Serial base address */
56 u32 i2c_base; /* i2c base address */
57 u32 board_rev_gpios; /* Board revision GPIOs */
58 enum mem_manuf mem_manuf; /* Memory Manufacturer */
59 } __attribute__((__packed__));
63 * Validate signature and return a pointer to the parameter table. If the
64 * signature is invalid, call panic() and never return.
66 * @return pointer to the parameter table if signature matched or never return.
68 struct spl_machine_param *spl_get_machine_params(void);
70 #endif /* __ASM_ARCH_EXYNOS_SPL_H__ */