drivers/misc/qfw.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2015 Miao Yan <[email protected]>
   4  * (C) Copyright 2021 Asherah Connor <[email protected]>
   5  */
   6
   7 #define LOG_CATEGORY UCLASS_QFW
   8
   9 #include <acpi/acpi_table.h>
  10 #include <bootdev.h>
  11 #include <bootflow.h>
  12 #include <bootmeth.h>
  13 #include <command.h>
  14 #include <errno.h>
  15 #include <log.h>
  16 #include <malloc.h>
  17 #include <qfw.h>
  18 #include <dm.h>
  19 #include <misc.h>
  20 #include <tables_csum.h>
  21 #include <asm/acpi_table.h>
  22
  23 static void qfw_read_entry_io(struct qfw_dev *qdev, u16 entry, u32 size,
  24                               void *address)
  25 {
  26         struct dm_qfw_ops *ops = dm_qfw_get_ops(qdev->dev);
  27
  28         debug("%s: entry 0x%x, size %u address %p\n", __func__, entry, size,
  29               address);
  30
  31         ops->read_entry_io(qdev->dev, entry, size, address);
  32 }
  33
  34 static void qfw_read_entry_dma(struct qfw_dev *qdev, u16 entry, u32 size,
  35                                void *address)
  36 {
  37         struct dm_qfw_ops *ops = dm_qfw_get_ops(qdev->dev);
  38
  39         struct qfw_dma dma = {
  40                 .length = cpu_to_be32(size),
  41                 .address = cpu_to_be64((uintptr_t)address),
  42                 .control = cpu_to_be32(FW_CFG_DMA_READ),
  43         };
  44
  45         /*
  46          * writing FW_CFG_INVALID will cause read operation to resume at last
  47          * offset, otherwise read will start at offset 0
  48          */
  49         if (entry != FW_CFG_INVALID)
  50                 dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 16));
  51
  52         debug("%s: entry 0x%x, size %u address %p, control 0x%x\n", __func__,
  53               entry, size, address, be32_to_cpu(dma.control));
  54
  55         barrier();
  56
  57         ops->read_entry_dma(qdev->dev, &dma);
  58 }
  59
  60 void qfw_read_entry(struct udevice *dev, u16 entry, u32 size, void *address)
  61 {
  62         struct qfw_dev *qdev = dev_get_uclass_priv(dev);
  63
  64         if (qdev->dma_present)
  65                 qfw_read_entry_dma(qdev, entry, size, address);
  66         else
  67                 qfw_read_entry_io(qdev, entry, size, address);
  68 }
  69
  70 int qfw_register(struct udevice *dev)
  71 {
  72         struct qfw_dev *qdev = dev_get_uclass_priv(dev);
  73         u32 qemu, dma_enabled;
  74
  75         qdev->dev = dev;
  76         INIT_LIST_HEAD(&qdev->fw_list);
  77
  78         qfw_read_entry_io(qdev, FW_CFG_SIGNATURE, 4, &qemu);
  79         if (be32_to_cpu(qemu) != QEMU_FW_CFG_SIGNATURE)
  80                 return -ENODEV;
  81
  82         qfw_read_entry_io(qdev, FW_CFG_ID, 1, &dma_enabled);
  83         if (dma_enabled & FW_CFG_DMA_ENABLED)
  84                 qdev->dma_present = true;
  85
  86         return 0;
  87 }
  88
  89 static int qfw_post_bind(struct udevice *dev)
  90 {
  91         int ret;
  92
  93         ret = bootdev_setup_for_dev(dev, "qfw_bootdev");
  94         if (ret)
  95                 return log_msg_ret("dev", ret);
  96
  97         return 0;
  98 }
  99
 100 static int qfw_get_bootflow(struct udevice *dev, struct bootflow_iter *iter,
 101                             struct bootflow *bflow)
 102 {
 103         const struct udevice *media = dev_get_parent(dev);
 104         int ret;
 105
 106         if (!CONFIG_IS_ENABLED(BOOTSTD))
 107                 return -ENOSYS;
 108
 109         log_debug("media=%s\n", media->name);
 110         ret = bootmeth_check(bflow->method, iter);
 111         if (ret)
 112                 return log_msg_ret("check", ret);
 113
 114         log_debug("iter->part=%d\n", iter->part);
 115
 116         /* We only support the whole device, not partitions */
 117         if (iter->part)
 118                 return log_msg_ret("max", -ESHUTDOWN);
 119
 120         log_debug("reading bootflow with method: %s\n", bflow->method->name);
 121         ret = bootmeth_read_bootflow(bflow->method, bflow);
 122         if (ret)
 123                 return log_msg_ret("method", ret);
 124
 125         return 0;
 126 }
 127
 128 static int qfw_bootdev_bind(struct udevice *dev)
 129 {
 130         struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev);
 131
 132         ucp->prio = BOOTDEVP_4_SCAN_FAST;
 133
 134         return 0;
 135 }
 136
 137 static int qfw_bootdev_hunt(struct bootdev_hunter *info, bool show)
 138 {
 139         int ret;
 140
 141         ret = uclass_probe_all(UCLASS_QFW);
 142         if (ret && ret != -ENOENT)
 143                 return log_msg_ret("vir", ret);
 144
 145         return 0;
 146 }
 147
 148 UCLASS_DRIVER(qfw) = {
 149         .id             = UCLASS_QFW,
 150         .name           = "qfw",
 151         .post_bind      = qfw_post_bind,
 152         .per_device_auto        = sizeof(struct qfw_dev),
 153 };
 154
 155 struct bootdev_ops qfw_bootdev_ops = {
 156         .get_bootflow   = qfw_get_bootflow,
 157 };
 158
 159 static const struct udevice_id qfw_bootdev_ids[] = {
 160         { .compatible = "u-boot,bootdev-qfw" },
 161         { }
 162 };
 163
 164 U_BOOT_DRIVER(qfw_bootdev) = {
 165         .name           = "qfw_bootdev",
 166         .id             = UCLASS_BOOTDEV,
 167         .ops            = &qfw_bootdev_ops,
 168         .bind           = qfw_bootdev_bind,
 169         .of_match       = qfw_bootdev_ids,
 170 };
 171
 172 BOOTDEV_HUNTER(qfw_bootdev_hunter) = {
 173         .prio           = BOOTDEVP_4_SCAN_FAST,
 174         .uclass         = UCLASS_QFW,
 175         .hunt           = qfw_bootdev_hunt,
 176         .drv            = DM_DRIVER_REF(qfw_bootdev),
 177 };