1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Imagination Technologies
11 #include <pci_msc01.h>
14 #define PCI_ACCESS_READ 0
15 #define PCI_ACCESS_WRITE 1
17 struct msc01_pci_controller {
18 struct pci_controller hose;
22 static inline struct msc01_pci_controller *
23 hose_to_msc01(struct pci_controller *hose)
25 return container_of(hose, struct msc01_pci_controller, hose);
28 static int msc01_config_access(struct msc01_pci_controller *msc01,
29 unsigned char access_type, pci_dev_t bdf,
32 const u32 aborts = MSC01_PCI_INTSTAT_MA_MSK | MSC01_PCI_INTSTAT_TA_MSK;
33 void *intstat = msc01->base + MSC01_PCI_INTSTAT_OFS;
34 void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS;
35 unsigned int bus = PCI_BUS(bdf);
36 unsigned int dev = PCI_DEV(bdf);
37 unsigned int func = PCI_FUNC(bdf);
39 /* clear abort status */
40 __raw_writel(aborts, intstat);
43 __raw_writel((PCI_CONF1_ADDRESS(bus, dev, func, where) & ~PCI_CONF1_ENABLE),
44 msc01->base + MSC01_PCI_CFGADDR_OFS);
47 if (access_type == PCI_ACCESS_WRITE)
48 __raw_writel(*data, cfgdata);
50 *data = __raw_readl(cfgdata);
52 /* check for aborts */
53 if (__raw_readl(intstat) & aborts) {
54 /* clear abort status */
55 __raw_writel(aborts, intstat);
62 static int msc01_pci_read_config(const struct udevice *dev, pci_dev_t bdf,
63 uint where, ulong *val, enum pci_size_t size)
65 struct msc01_pci_controller *msc01 = dev_get_priv(dev);
68 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &data)) {
69 *val = pci_get_ff(size);
73 *val = pci_conv_32_to_size(data, where, size);
78 static int msc01_pci_write_config(struct udevice *dev, pci_dev_t bdf,
79 uint where, ulong val, enum pci_size_t size)
81 struct msc01_pci_controller *msc01 = dev_get_priv(dev);
84 if (size == PCI_SIZE_32) {
89 if (msc01_config_access(msc01, PCI_ACCESS_READ, bdf, where, &old))
92 data = pci_conv_size_to_32(old, val, where, size);
95 msc01_config_access(msc01, PCI_ACCESS_WRITE, bdf, where, &data);
100 static int msc01_pci_probe(struct udevice *dev)
102 struct msc01_pci_controller *msc01 = dev_get_priv(dev);
104 msc01->base = dev_remap_addr(dev);
111 static const struct dm_pci_ops msc01_pci_ops = {
112 .read_config = msc01_pci_read_config,
113 .write_config = msc01_pci_write_config,
116 static const struct udevice_id msc01_pci_ids[] = {
117 { .compatible = "mips,pci-msc01" },
121 U_BOOT_DRIVER(msc01_pci) = {
124 .of_match = msc01_pci_ids,
125 .ops = &msc01_pci_ops,
126 .probe = msc01_pci_probe,
127 .priv_auto = sizeof(struct msc01_pci_controller),