1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018, 2020-2021 NXP
15 #include <asm/global_data.h>
16 #include <linux/bug.h>
18 #include <linux/delay.h>
19 #include <linux/libfdt.h>
21 #include <fdt_support.h>
22 #include <fsl-mc/fsl_mc.h>
23 #include <fsl-mc/fsl_mc_sys.h>
24 #include <fsl-mc/fsl_mc_private.h>
25 #include <fsl-mc/fsl_dpmng.h>
26 #include <fsl-mc/fsl_dprc.h>
27 #include <fsl-mc/fsl_dpio.h>
28 #include <fsl-mc/fsl_dpni.h>
29 #include <fsl-mc/fsl_dpsparser.h>
30 #include <fsl-mc/fsl_qbman_portal.h>
31 #include <fsl-mc/ldpaa_wriop.h>
32 #include <net/ldpaa_eth.h>
33 #include <asm/arch/cpu.h>
34 #include <asm/arch-fsl-layerscape/fsl_icid.h>
36 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
37 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
38 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
40 #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
41 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
42 #define MC_BOOT_ENV_VAR "mcinitcmd"
43 #define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
45 #define MC_BUFFER_SIZE (1024 * 1024 * 16)
46 #define MAGIC_MC 0x4d430100
47 #define MC_FW_ADDR_MASK_LOW 0xE0000000
48 #define MC_FW_ADDR_MASK_HIGH 0X1FFFF
49 #define MC_STRUCT_BUFFER_OFFSET 0x01000000
50 #define MC_OFFSET_DELTA MC_STRUCT_BUFFER_OFFSET
52 #define LOG_HEADER_FLAG_BUFFER_WRAPAROUND 0x80000000
53 #define LAST_BYTE(a) ((a) & ~(LOG_HEADER_FLAG_BUFFER_WRAPAROUND))
55 DECLARE_GLOBAL_DATA_PTR;
56 static int mc_memset_resv_ram;
57 static struct mc_version mc_ver_info;
58 static int mc_boot_status = -1;
59 static int mc_dpl_applied = -1;
60 #ifdef CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
61 static int mc_aiop_applied = -1;
63 struct fsl_mc_io *root_mc_io = NULL;
64 struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
65 uint16_t root_dprc_handle = 0;
66 uint16_t dflt_dprc_handle = 0;
68 struct fsl_dpbp_obj *dflt_dpbp = NULL;
69 struct fsl_dpio_obj *dflt_dpio = NULL;
70 struct fsl_dpni_obj *dflt_dpni = NULL;
71 static u64 mc_lazy_dpl_addr;
72 static u32 dpsparser_obj_id;
73 static u16 dpsparser_handle;
74 static char *mc_err_msg_apply_spb[] = MC_ERROR_MSG_APPLY_SPB;
77 void dump_ram_words(const char *title, void *addr)
80 uint32_t *words = addr;
82 printf("Dumping beginning of %s (%p):\n", title, addr);
83 for (i = 0; i < 16; i++)
84 printf("%#x ", words[i]);
89 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
91 printf("MC CCSR registers:\n"
101 mc_ccsr_regs->reg_gcr1,
102 mc_ccsr_regs->reg_gsr,
103 mc_ccsr_regs->reg_sicbalr,
104 mc_ccsr_regs->reg_sicbahr,
105 mc_ccsr_regs->reg_sicapr,
106 mc_ccsr_regs->reg_mcfbalr,
107 mc_ccsr_regs->reg_mcfbahr,
108 mc_ccsr_regs->reg_mcfapr,
109 mc_ccsr_regs->reg_psr);
113 #define dump_ram_words(title, addr)
114 #define dump_mc_ccsr_regs(mc_ccsr_regs)
119 * Copying MC firmware or DPL image to DDR
121 static int mc_copy_image(const char *title,
122 u64 image_addr, u32 image_size, u64 mc_ram_addr)
124 debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
125 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
126 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
130 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
132 * MC firmware FIT image parser checks if the image is in FIT
133 * format, verifies integrity of the image and calculates
134 * raw image address and size values.
135 * Returns 0 on success and a negative errno on error.
138 int parse_mc_firmware_fit_image(u64 mc_fw_addr,
139 const void **raw_image_addr,
140 size_t *raw_image_size)
143 void *fit_hdr = (void *)mc_fw_addr;
145 /* Check if Image is in FIT format */
146 format = genimg_get_format(fit_hdr);
148 if (format != IMAGE_FORMAT_FIT) {
149 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
153 if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
154 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
158 return fit_get_data_node(fit_hdr, "firmware", raw_image_addr,
163 #define MC_DT_INCREASE_SIZE 64
170 static int mc_fixup_mac_addr(void *blob, int nodeoffset,
171 const char *propname, struct udevice *eth_dev,
172 enum mc_fixup_type type)
174 struct eth_pdata *plat = dev_get_plat(eth_dev);
175 unsigned char *enetaddr = plat->enetaddr;
176 int eth_index = dev_seq(eth_dev);
177 int err = 0, len = 0, size, i;
178 unsigned char env_enetaddr[ARP_HLEN];
179 unsigned int enetaddr_32[ARP_HLEN];
184 /* DPL likes its addresses on 32 * ARP_HLEN bits */
185 for (i = 0; i < ARP_HLEN; i++)
186 enetaddr_32[i] = cpu_to_fdt32(enetaddr[i]);
188 len = sizeof(enetaddr_32);
196 /* MAC address property present */
197 if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
198 /* u-boot MAC addr randomly assigned - leave the present one */
199 if (!eth_env_get_enetaddr_by_index("eth", eth_index,
203 size = MC_DT_INCREASE_SIZE + strlen(propname) + len;
204 /* make room for mac address property */
205 err = fdt_increase_size(blob, size);
207 printf("fdt_increase_size: err=%s\n",
213 err = fdt_setprop(blob, nodeoffset, propname, val, len);
215 printf("fdt_setprop: err=%s\n", fdt_strerror(err));
222 #define is_dpni(s) (s != NULL ? !strncmp(s, "dpni@", 5) : 0)
224 const char *dpl_get_connection_endpoint(void *blob, char *endpoint)
226 int connoffset = fdt_path_offset(blob, "/connections"), off;
229 for (off = fdt_first_subnode(blob, connoffset);
231 off = fdt_next_subnode(blob, off)) {
232 s1 = fdt_stringlist_get(blob, off, "endpoint1", 0, NULL);
233 s2 = fdt_stringlist_get(blob, off, "endpoint2", 0, NULL);
238 if (strcmp(endpoint, s1) == 0)
241 if (strcmp(endpoint, s2) == 0)
248 static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
249 struct udevice *eth_dev)
251 int objoff = fdt_path_offset(blob, "/objects");
252 int dpmacoff = -1, dpnioff = -1;
253 const char *endpoint;
257 sprintf(mac_name, "dpmac@%d", dpmac_id);
258 dpmacoff = fdt_subnode_offset(blob, objoff, mac_name);
260 /* dpmac not defined in DPL, so skip it. */
263 err = mc_fixup_mac_addr(blob, dpmacoff, "mac_addr", eth_dev,
266 printf("Error fixing up dpmac mac_addr in DPL\n");
270 /* now we need to figure out if there is any
271 * DPNI connected to this MAC, so we walk the
274 endpoint = dpl_get_connection_endpoint(blob, mac_name);
275 if (!is_dpni(endpoint))
278 /* let's see if we can fixup the DPNI as well */
279 dpnioff = fdt_subnode_offset(blob, objoff, endpoint);
281 /* DPNI not defined in DPL in the objects area */
284 return mc_fixup_mac_addr(blob, dpnioff, "mac_addr", eth_dev,
288 void fdt_fixup_mc_ddr(u64 *base, u64 *size)
290 u64 mc_size = mc_get_dram_block_size();
292 if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
293 *base = mc_get_dram_addr() + mc_size;
294 *size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
298 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
301 u32 iommu_map[4], phandle;
305 /* find fsl-mc node */
306 offset = fdt_path_offset(blob, "/soc/fsl-mc");
308 offset = fdt_path_offset(blob, "/fsl-mc");
310 printf("%s: fsl-mc: ERR: fsl-mc node not found in DT, err %d\n",
315 prop = fdt_getprop_w(blob, offset, "iommu-map", &lenp);
317 debug("%s: fsl-mc: ERR: missing iommu-map in fsl-mc bus node\n",
322 iommu_map[0] = cpu_to_fdt32(FSL_DPAA2_STREAM_ID_START);
323 iommu_map[1] = *++prop;
324 iommu_map[2] = cpu_to_fdt32(FSL_DPAA2_STREAM_ID_START);
325 iommu_map[3] = cpu_to_fdt32(FSL_DPAA2_STREAM_ID_END -
326 FSL_DPAA2_STREAM_ID_START + 1);
328 fdt_setprop_inplace(blob, offset, "iommu-map",
329 iommu_map, sizeof(iommu_map));
331 /* get phandle to MSI controller */
332 prop = (u32 *)fdt_getprop(blob, offset, "msi-parent", 0);
334 debug("\n%s: ERROR: missing msi-parent\n", __func__);
337 phandle = fdt32_to_cpu(*prop);
339 /* also set msi-map property */
340 fdt_appendprop_u32(blob, offset, "msi-map", FSL_DPAA2_STREAM_ID_START);
341 fdt_appendprop_u32(blob, offset, "msi-map", phandle);
342 fdt_appendprop_u32(blob, offset, "msi-map", FSL_DPAA2_STREAM_ID_START);
343 fdt_appendprop_u32(blob, offset, "msi-map", FSL_DPAA2_STREAM_ID_END -
344 FSL_DPAA2_STREAM_ID_START + 1);
347 static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
348 struct udevice *eth_dev)
350 int nodeoffset = fdt_path_offset(blob, "/board_info/ports"), noff;
353 const char link_type_mode[] = "MAC_LINK_TYPE_FIXED";
355 sprintf(mac_name, "mac@%d", dpmac_id);
357 /* node not found - create it */
358 noff = fdt_subnode_offset(blob, nodeoffset, (const char *)mac_name);
360 err = fdt_increase_size(blob, 200);
362 printf("fdt_increase_size: err=%s\n", fdt_strerror(err));
366 noff = fdt_add_subnode(blob, nodeoffset, mac_name);
368 printf("fdt_add_subnode: err=%s\n",
373 /* add default property of fixed link */
374 err = fdt_appendprop_string(blob, noff,
375 "link_type", link_type_mode);
377 printf("fdt_appendprop_string: err=%s\n",
383 return mc_fixup_mac_addr(blob, noff, "port_mac_address", eth_dev,
387 static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
389 struct udevice *eth_dev;
390 int err = 0, ret = 0;
394 uclass_get(UCLASS_ETH, &uc);
395 uclass_foreach_dev(eth_dev, uc) {
396 if (!eth_dev->driver || !eth_dev->driver->name ||
397 strcmp(eth_dev->driver->name, LDPAA_ETH_DRIVER_NAME))
400 dpmac_id = ldpaa_eth_get_dpmac_id(eth_dev);
403 err = mc_fixup_dpl_mac_addr(blob, dpmac_id, eth_dev);
406 err = mc_fixup_dpc_mac_addr(blob, dpmac_id, eth_dev);
413 printf("fsl-mc: ERROR fixing mac address for %s\n", eth_dev->name);
420 static int mc_fixup_dpc(u64 dpc_addr)
422 void *blob = (void *)dpc_addr;
423 int nodeoffset, err = 0;
425 /* delete any existing ICID pools */
426 nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
427 if (fdt_del_node(blob, nodeoffset) < 0)
428 printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
431 nodeoffset = fdt_path_offset(blob, "/resources");
432 if (nodeoffset < 0) {
433 printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
436 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
437 nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
438 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
439 "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
440 do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
442 FSL_DPAA2_STREAM_ID_END -
443 FSL_DPAA2_STREAM_ID_START + 1, 1);
445 /* fixup MAC addresses for dpmac ports */
446 nodeoffset = fdt_path_offset(blob, "/board_info/ports");
447 if (nodeoffset < 0) {
448 err = fdt_increase_size(blob, 512);
450 printf("fdt_increase_size: err=%s\n",
454 nodeoffset = fdt_path_offset(blob, "/board_info");
456 nodeoffset = fdt_add_subnode(blob, 0, "board_info");
458 nodeoffset = fdt_add_subnode(blob, nodeoffset, "ports");
461 err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPC);
464 flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
469 static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
472 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
478 #ifdef CFG_SYS_LS_MC_DRAM_DPC_OFFSET
479 BUILD_BUG_ON((CFG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
480 CFG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
482 mc_dpc_offset = CFG_SYS_LS_MC_DRAM_DPC_OFFSET;
484 #error "CFG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
488 * Load the MC DPC blob in the MC private DRAM block:
490 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
491 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
494 * Get address and size of the DPC blob stored in flash:
496 dpc_fdt_hdr = (void *)mc_dpc_addr;
498 error = fdt_check_header(dpc_fdt_hdr);
501 * Don't return with error here, since the MC firmware can
502 * still boot without a DPC
504 printf("\nfsl-mc: WARNING: No DPC image found");
508 dpc_size = fdt_totalsize(dpc_fdt_hdr);
509 if (dpc_size > CFG_SYS_LS_MC_DPC_MAX_LENGTH) {
510 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
515 mc_copy_image("MC DPC blob",
516 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
517 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
519 if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
522 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
526 static int mc_fixup_dpl(u64 dpl_addr)
528 void *blob = (void *)dpl_addr;
529 u32 ver = fdt_getprop_u32_default(blob, "/", "dpl-version", 0);
532 /* The DPL fixup for mac addresses is only relevant
538 err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPL);
539 flush_dcache_range(dpl_addr, dpl_addr + fdt_totalsize(blob));
544 static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
547 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
553 #ifdef CFG_SYS_LS_MC_DRAM_DPL_OFFSET
554 BUILD_BUG_ON((CFG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
555 CFG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
557 mc_dpl_offset = CFG_SYS_LS_MC_DRAM_DPL_OFFSET;
559 #error "CFG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
563 * Load the MC DPL blob in the MC private DRAM block:
565 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
566 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
569 * Get address and size of the DPL blob stored in flash:
571 dpl_fdt_hdr = (void *)mc_dpl_addr;
573 error = fdt_check_header(dpl_fdt_hdr);
575 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
579 dpl_size = fdt_totalsize(dpl_fdt_hdr);
580 if (dpl_size > CFG_SYS_LS_MC_DPL_MAX_LENGTH) {
581 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
586 mc_copy_image("MC DPL blob",
587 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
588 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
590 if (mc_fixup_dpl(mc_ram_addr + mc_dpl_offset))
592 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
597 * Return the MC boot timeout value in milliseconds
599 static unsigned long get_mc_boot_timeout_ms(void)
601 unsigned long timeout_ms = CFG_SYS_LS_MC_BOOT_TIMEOUT_MS;
603 char *timeout_ms_env_var = env_get(MC_BOOT_TIMEOUT_ENV_VAR);
605 if (timeout_ms_env_var) {
606 timeout_ms = dectoul(timeout_ms_env_var, NULL);
607 if (timeout_ms == 0) {
608 printf("fsl-mc: WARNING: Invalid value for \'"
609 MC_BOOT_TIMEOUT_ENV_VAR
610 "\' environment variable: %lu\n",
613 timeout_ms = CFG_SYS_LS_MC_BOOT_TIMEOUT_MS;
620 #ifdef CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
622 __weak bool soc_has_aiop(void)
627 static int load_mc_aiop_img(u64 aiop_fw_addr)
629 u64 mc_ram_addr = mc_get_dram_addr();
630 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
634 /* Check if AIOP is available */
638 * Load the MC AIOP image in the MC private DRAM block:
641 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
642 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
643 CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
645 aiop_img = (void *)aiop_fw_addr;
646 mc_copy_image("MC AIOP image",
647 (u64)aiop_img, CFG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
648 mc_ram_addr + CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
656 static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
659 u32 mc_fw_boot_status;
660 unsigned long timeout_ms = get_mc_boot_timeout_ms();
661 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
664 assert(timeout_ms > 0);
666 udelay(1000); /* throttle polling */
667 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
668 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
669 if (mc_fw_boot_status & 0x1)
677 if (timeout_ms == 0) {
678 printf("ERROR: timeout\n");
680 /* TODO: Get an error status from an MC CCSR register */
684 if (mc_fw_boot_status != 0x1) {
686 * TODO: Identify critical errors from the GSR register's FS
687 * field and for those errors, set error to -ENODEV or other
688 * appropriate errno, so that the status property is set to
689 * failure in the fsl,dprc device tree node.
691 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
697 *final_reg_gsr = reg_gsr;
701 int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
705 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
706 u64 mc_ram_addr = mc_get_dram_addr();
709 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
710 const void *raw_image_addr;
711 size_t raw_image_size = 0;
713 u8 mc_ram_num_256mb_blocks;
714 size_t mc_ram_size = mc_get_dram_block_size();
716 mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
718 if (mc_ram_num_256mb_blocks >= 0xff) {
720 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
726 * To support 128 MB DDR Size for MC
728 if (mc_ram_num_256mb_blocks == 0)
729 mc_ram_num_256mb_blocks = 0xFF;
732 * Management Complex cores should be held at reset out of POR.
733 * U-Boot should be the first software to touch MC. To be safe,
734 * we reset all cores again by setting GCR1 to 0. It doesn't do
735 * anything if they are held at reset. After we setup the firmware
736 * we kick off MC by deasserting the reset bit for core 0, and
737 * deasserting the reset bits for Command Portal Managers.
738 * The stop bits are not touched here. They are used to stop the
739 * cores when they are active. Setting stop bits doesn't stop the
740 * cores from fetching instructions when they are released from
743 out_le32(&mc_ccsr_regs->reg_gcr1, 0);
746 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
747 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
749 error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
754 * Load the MC FW at the beginning of the MC private DRAM block:
756 mc_copy_image("MC Firmware",
757 (u64)raw_image_addr, raw_image_size, mc_ram_addr);
759 dump_ram_words("firmware", (void *)mc_ram_addr);
761 error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
765 debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
766 dump_mc_ccsr_regs(mc_ccsr_regs);
769 * Tell MC what is the address range of the DRAM block assigned to it:
771 if (mc_ram_num_256mb_blocks < 0xFF) {
772 reg_mcfbalr = (u32)mc_ram_addr |
773 (mc_ram_num_256mb_blocks - 1);
775 reg_mcfbalr = (u32)mc_ram_addr |
776 (mc_ram_num_256mb_blocks);
779 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
780 out_le32(&mc_ccsr_regs->reg_mcfbahr,
781 (u32)(mc_ram_addr >> 32));
782 out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
785 * Tell the MC that we want delayed DPL deployment.
787 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
789 printf("\nfsl-mc: Booting Management Complex ... ");
792 * Deassert reset and release MC core 0 to run
794 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
795 error = wait_for_mc(true, ®_gsr);
800 * TODO: need to obtain the portal_id for the root container from the
806 * Initialize the global default MC portal
807 * And check that the MC firmware is responding portal commands:
809 root_mc_io = calloc(sizeof(struct fsl_mc_io), 1);
811 printf(" No memory: calloc() failed\n");
815 root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
816 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
817 portal_id, root_mc_io->mmio_regs);
819 error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
821 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
826 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
827 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
828 reg_gsr & GSR_FS_MASK);
832 mc_boot_status = error;
839 int mc_apply_dpl(u64 mc_dpl_addr)
841 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
844 u64 mc_ram_addr = mc_get_dram_addr();
845 size_t mc_ram_size = mc_get_dram_block_size();
850 error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
855 * Tell the MC to deploy the DPL:
857 out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
858 printf("fsl-mc: Deploying data path layout ... ");
859 error = wait_for_mc(false, ®_gsr);
867 int get_mc_boot_status(void)
869 return mc_boot_status;
872 #ifdef CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
873 int get_aiop_apply_status(void)
875 return mc_aiop_applied;
879 int get_dpl_apply_status(void)
881 return mc_dpl_applied;
884 int is_lazy_dpl_addr_valid(void)
886 return !!mc_lazy_dpl_addr;
890 * Return the MC address of private DRAM block.
891 * As per MC design document, MC initial base address
892 * should be least significant 512MB address of MC private
893 * memory, i.e. address should point to end address masked
894 * with 512MB offset in private DRAM block.
896 u64 mc_get_dram_addr(void)
898 size_t mc_ram_size = mc_get_dram_block_size();
900 if (!mc_memset_resv_ram || (get_mc_boot_status() < 0)) {
901 mc_memset_resv_ram = 1;
902 memset((void *)gd->arch.resv_ram, 0, mc_ram_size);
905 return (gd->arch.resv_ram + mc_ram_size - 1) &
906 MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
910 * Return the actual size of the MC private DRAM block.
912 unsigned long mc_get_dram_block_size(void)
914 unsigned long dram_block_size = CFG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
916 char *dram_block_size_env_var = env_get(MC_MEM_SIZE_ENV_VAR);
918 if (dram_block_size_env_var) {
919 dram_block_size = hextoul(dram_block_size_env_var, NULL);
921 if (dram_block_size < CFG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
922 printf("fsl-mc: WARNING: Invalid value for \'"
924 "\' environment variable: %lu\n",
927 dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE;
931 return dram_block_size;
935 * Populate the device tree with MC reserved memory ranges.
937 void fdt_reserve_mc_mem(void *blob, u32 mc_icid)
942 struct fdt_memory mc_mem_ranges[] = {
948 .start = CFG_SYS_FSL_MC_BASE,
949 .end = CFG_SYS_FSL_MC_BASE + CFG_SYS_FSL_MC_SIZE - 1
952 .start = CFG_SYS_FSL_NI_BASE,
953 .end = CFG_SYS_FSL_NI_BASE + CFG_SYS_FSL_NI_SIZE - 1
956 .start = CFG_SYS_FSL_QBMAN_BASE,
957 .end = CFG_SYS_FSL_QBMAN_BASE +
958 CFG_SYS_FSL_QBMAN_SIZE - 1
961 .start = CFG_SYS_FSL_PEBUF_BASE,
962 .end = CFG_SYS_FSL_PEBUF_BASE +
963 CFG_SYS_FSL_PEBUF_SIZE - 1
966 .start = CFG_SYS_FSL_CCSR_BASE,
967 .end = CFG_SYS_FSL_CCSR_BASE + CFG_SYS_FSL_CCSR_SIZE - 1
971 mc_mem_ranges[0].start = gd->arch.resv_ram;
972 mc_mem_ranges[0].end = mc_mem_ranges[0].start +
973 mc_get_dram_block_size() - 1;
975 for (i = 0; i < ARRAY_SIZE(mc_mem_ranges); i++) {
976 noff = fdt_node_offset_by_compatible(blob, -1, "fsl,qoriq-mc");
978 printf("WARN: failed to get MC node: %d\n", noff);
981 mc_ph = fdt_get_phandle(blob, noff);
983 mc_ph = fdt_create_phandle(blob, noff);
985 printf("WARN: failed to get MC node phandle\n");
990 sprintf(mem_name, "mc-mem%d", i);
991 ret = fdtdec_add_reserved_memory(blob, mem_name,
992 &mc_mem_ranges[i], NULL, 0,
995 printf("ERROR: failed to reserve MC memory: %d\n", ret);
999 noff = fdt_node_offset_by_phandle(blob, phandle);
1001 printf("ERROR: failed get resvmem node offset: %d\n",
1005 ret = fdt_setprop_u32(blob, noff, "iommu-addresses", mc_ph);
1007 printf("ERROR: failed to set 'iommu-addresses': %d\n",
1011 ret = fdt_appendprop_u64(blob, noff, "iommu-addresses",
1012 mc_mem_ranges[i].start);
1014 printf("ERROR: failed to set 'iommu-addresses': %d\n",
1018 ret = fdt_appendprop_u64(blob, noff, "iommu-addresses",
1019 mc_mem_ranges[i].end -
1020 mc_mem_ranges[i].start + 1);
1022 printf("ERROR: failed to set 'iommu-addresses': %d\n",
1027 noff = fdt_node_offset_by_phandle(blob, mc_ph);
1029 printf("ERROR: failed get MC node offset: %d\n", noff);
1032 ret = fdt_appendprop_u32(blob, noff, "memory-region", phandle);
1034 printf("ERROR: failed to set 'memory-region': %d\n",
1039 fdt_set_iommu_prop(blob, noff, fdt_get_smmu_phandle(blob), &mc_icid, 1);
1042 int fsl_mc_ldpaa_init(struct bd_info *bis)
1046 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
1047 if (wriop_is_enabled_dpmac(i) == 1)
1048 ldpaa_eth_init(i, wriop_get_enet_if(i));
1052 static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
1055 uint16_t major_ver, minor_ver;
1057 error = dprc_get_api_version(mc_io, 0,
1061 printf("dprc_get_api_version() failed: %d\n", error);
1065 if (major_ver < DPRC_VER_MAJOR || (major_ver == DPRC_VER_MAJOR &&
1066 minor_ver < DPRC_VER_MINOR)) {
1067 printf("DPRC version mismatch found %u.%u,",
1068 major_ver, minor_ver);
1069 printf("supported version is %u.%u\n",
1070 DPRC_VER_MAJOR, DPRC_VER_MINOR);
1076 static int dpio_init(void)
1078 struct qbman_swp_desc p_des;
1079 struct dpio_attr attr;
1080 struct dpio_cfg dpio_cfg;
1082 uint16_t major_ver, minor_ver;
1084 dflt_dpio = calloc(sizeof(struct fsl_dpio_obj), 1);
1086 printf("No memory: calloc() failed\n");
1090 dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
1091 dpio_cfg.num_priorities = 8;
1093 err = dpio_create(dflt_mc_io,
1097 &dflt_dpio->dpio_id);
1099 printf("dpio_create() failed: %d\n", err);
1104 err = dpio_get_api_version(dflt_mc_io, 0,
1108 printf("dpio_get_api_version() failed: %d\n", err);
1109 goto err_get_api_ver;
1112 if (major_ver < DPIO_VER_MAJOR || (major_ver == DPIO_VER_MAJOR &&
1113 minor_ver < DPIO_VER_MINOR)) {
1114 printf("DPRC version mismatch found %u.%u,",
1119 err = dpio_open(dflt_mc_io,
1122 &dflt_dpio->dpio_handle);
1124 printf("dpio_open() failed\n");
1128 memset(&attr, 0, sizeof(struct dpio_attr));
1129 err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1130 dflt_dpio->dpio_handle, &attr);
1132 printf("dpio_get_attributes() failed: %d\n", err);
1136 if (dflt_dpio->dpio_id != attr.id) {
1137 printf("dnpi object id and attribute id are not same\n");
1138 goto err_attr_not_same;
1142 printf("Init: DPIO.%d\n", dflt_dpio->dpio_id);
1144 err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1146 printf("dpio_enable() failed %d\n", err);
1147 goto err_get_enable;
1149 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
1150 attr.qbman_portal_ce_offset,
1151 attr.qbman_portal_ci_offset,
1152 attr.qbman_portal_id,
1153 attr.num_priorities);
1155 p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
1156 + attr.qbman_portal_ce_offset);
1157 p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
1158 + attr.qbman_portal_ci_offset);
1160 dflt_dpio->sw_portal = qbman_swp_init(&p_des);
1161 if (dflt_dpio->sw_portal == NULL) {
1162 printf("qbman_swp_init() failed\n");
1163 goto err_get_swp_init;
1168 dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1172 dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1175 dpio_destroy(dflt_mc_io,
1178 dflt_dpio->dpio_id);
1185 static int dpio_exit(void)
1189 err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1191 printf("dpio_disable() failed: %d\n", err);
1195 err = dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
1197 printf("dpio_close() failed: %d\n", err);
1201 err = dpio_destroy(dflt_mc_io,
1204 dflt_dpio->dpio_id);
1206 printf("dpio_destroy() failed: %d\n", err);
1211 printf("Exit: DPIO.%d\n", dflt_dpio->dpio_id);
1222 static int dprc_init(void)
1224 int err, child_portal_id, container_id;
1225 struct dprc_cfg cfg;
1226 uint64_t mc_portal_offset;
1228 /* Open root container */
1229 err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
1231 printf("dprc_get_container_id(): Root failed: %d\n", err);
1232 goto err_root_container_id;
1236 printf("Root container id = %d\n", container_id);
1238 err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
1241 printf("dprc_open(): Root Container failed: %d\n", err);
1245 if (!root_dprc_handle) {
1246 printf("dprc_open(): Root Container Handle is not valid\n");
1250 err = dprc_version_check(root_mc_io, root_dprc_handle);
1252 printf("dprc_version_check() failed: %d\n", err);
1256 memset(&cfg, 0, sizeof(struct dprc_cfg));
1257 cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
1258 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
1259 DPRC_CFG_OPT_ALLOC_ALLOWED;
1260 cfg.icid = DPRC_GET_ICID_FROM_POOL;
1261 cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
1262 err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
1263 root_dprc_handle, &cfg,
1267 printf("dprc_create_container() failed: %d\n", err);
1271 dflt_mc_io = calloc(sizeof(struct fsl_mc_io), 1);
1274 printf(" No memory: calloc() failed\n");
1278 child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
1279 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
1282 printf("MC portal of child DPRC container: %d, physical addr %p)\n",
1283 child_dprc_id, dflt_mc_io->mmio_regs);
1286 err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
1289 printf("dprc_open(): Child container failed: %d\n", err);
1290 goto err_child_open;
1293 if (!dflt_dprc_handle) {
1294 printf("dprc_open(): Child container Handle is not valid\n");
1295 goto err_child_open;
1302 dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
1303 root_dprc_handle, child_dprc_id);
1305 dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
1307 err_root_container_id:
1311 static int dprc_exit(void)
1315 err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
1317 printf("dprc_close(): Child failed: %d\n", err);
1321 err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
1322 root_dprc_handle, child_dprc_id);
1324 printf("dprc_destroy_container() failed: %d\n", err);
1328 err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
1330 printf("dprc_close(): Root failed: %d\n", err);
1346 static int dpbp_init(void)
1349 struct dpbp_attr dpbp_attr;
1350 struct dpbp_cfg dpbp_cfg;
1351 uint16_t major_ver, minor_ver;
1353 dflt_dpbp = calloc(sizeof(struct fsl_dpbp_obj), 1);
1355 printf("No memory: calloc() failed\n");
1360 dpbp_cfg.options = 512;
1362 err = dpbp_create(dflt_mc_io,
1366 &dflt_dpbp->dpbp_id);
1370 printf("dpbp_create() failed: %d\n", err);
1374 err = dpbp_get_api_version(dflt_mc_io, 0,
1378 printf("dpbp_get_api_version() failed: %d\n", err);
1379 goto err_get_api_ver;
1382 if (major_ver < DPBP_VER_MAJOR || (major_ver == DPBP_VER_MAJOR &&
1383 minor_ver < DPBP_VER_MINOR)) {
1384 printf("DPBP version mismatch found %u.%u,",
1385 major_ver, minor_ver);
1386 printf("supported version is %u.%u\n",
1387 DPBP_VER_MAJOR, DPBP_VER_MINOR);
1390 err = dpbp_open(dflt_mc_io,
1393 &dflt_dpbp->dpbp_handle);
1395 printf("dpbp_open() failed\n");
1399 memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
1400 err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
1401 dflt_dpbp->dpbp_handle,
1404 printf("dpbp_get_attributes() failed: %d\n", err);
1408 if (dflt_dpbp->dpbp_id != dpbp_attr.id) {
1409 printf("dpbp object id and attribute id are not same\n");
1410 goto err_attr_not_same;
1414 printf("Init: DPBP.%d\n", dflt_dpbp->dpbp_attr.id);
1417 err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1419 printf("dpbp_close() failed: %d\n", err);
1427 dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
1428 dpbp_destroy(dflt_mc_io,
1431 dflt_dpbp->dpbp_id);
1441 static int dpbp_exit(void)
1445 err = dpbp_destroy(dflt_mc_io, dflt_dprc_handle, MC_CMD_NO_FLAGS,
1446 dflt_dpbp->dpbp_id);
1448 printf("dpbp_destroy() failed: %d\n", err);
1453 printf("Exit: DPBP.%d\n", dflt_dpbp->dpbp_attr.id);
1464 static int dpni_init(void)
1466 struct dpni_cfg dpni_cfg = {0};
1467 uint16_t major_ver, minor_ver;
1470 dflt_dpni = calloc(sizeof(struct fsl_dpni_obj), 1);
1472 printf("No memory: calloc() failed\n");
1477 err = dpni_create(dflt_mc_io,
1481 &dflt_dpni->dpni_id);
1484 printf("dpni create() failed: %d\n", err);
1488 err = dpni_get_api_version(dflt_mc_io, 0,
1492 printf("dpni_get_api_version() failed: %d\n", err);
1493 goto err_get_version;
1496 if (major_ver < DPNI_VER_MAJOR || (major_ver == DPNI_VER_MAJOR &&
1497 minor_ver < DPNI_VER_MINOR)) {
1498 printf("DPNI version mismatch found %u.%u,",
1499 major_ver, minor_ver);
1500 printf("supported version is %u.%u\n",
1501 DPNI_VER_MAJOR, DPNI_VER_MINOR);
1504 err = dpni_open(dflt_mc_io,
1507 &dflt_dpni->dpni_handle);
1509 printf("dpni_open() failed\n");
1514 printf("Init: DPNI.%d\n", dflt_dpni->dpni_id);
1516 err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1518 printf("dpni_close() failed: %d\n", err);
1525 dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
1528 dpni_destroy(dflt_mc_io,
1531 dflt_dpni->dpni_id);
1538 static int dpni_exit(void)
1542 err = dpni_destroy(dflt_mc_io, dflt_dprc_handle, MC_CMD_NO_FLAGS,
1543 dflt_dpni->dpni_id);
1545 printf("dpni_destroy() failed: %d\n", err);
1550 printf("Exit: DPNI.%d\n", dflt_dpni->dpni_id);
1561 static bool is_dpsparser_supported(void)
1563 /* dpsparser support was first introduced in MC version: 10.12.0 */
1564 if (mc_ver_info.major < 10)
1566 if (mc_ver_info.major == 10)
1567 return (mc_ver_info.minor >= 12);
1571 static int dpsparser_version_check(struct fsl_mc_io *mc_io)
1574 u16 major_ver, minor_ver;
1576 if (!is_dpsparser_supported())
1579 error = dpsparser_get_api_version(mc_io, 0,
1583 printf("dpsparser_get_api_version() failed: %d\n", error);
1587 if (major_ver < DPSPARSER_VER_MAJOR || (major_ver ==
1588 DPSPARSER_VER_MAJOR && minor_ver < DPSPARSER_VER_MINOR)) {
1589 printf("DPSPARSER version mismatch found %u.%u,",
1590 major_ver, minor_ver);
1591 printf("supported version is %u.%u\n",
1592 DPSPARSER_VER_MAJOR, DPSPARSER_VER_MINOR);
1598 static int dpsparser_init(void)
1602 if (!is_dpsparser_supported())
1605 err = dpsparser_create(dflt_mc_io,
1610 printf("dpsparser_create() failed\n");
1612 err = dpsparser_version_check(dflt_mc_io);
1614 printf("dpsparser_version_check() failed: %d\n", err);
1615 goto err_version_check;
1618 err = dpsparser_open(dflt_mc_io,
1622 printf("dpsparser_open() failed: %d\n", err);
1630 dpsparser_destroy(dflt_mc_io,
1632 MC_CMD_NO_FLAGS, dpsparser_obj_id);
1637 #ifdef DPSPARSER_DESTROY
1638 /* TODO: refactoring needed in the future to allow DPSPARSER object destroy
1639 * Workaround: DO NOT destroy DPSPARSER object because it needs to be available
1642 static int dpsparser_exit(void)
1646 if (!is_dpsparser_supported())
1649 dpsparser_close(dflt_mc_io, MC_CMD_NO_FLAGS, dpsparser_handle);
1651 printf("dpsparser_close() failed: %d\n", err);
1655 err = dpsparser_destroy(dflt_mc_io, dflt_dprc_handle,
1656 MC_CMD_NO_FLAGS, dpsparser_obj_id);
1658 printf("dpsparser_destroy() failed: %d\n", err);
1668 int mc_apply_spb(u64 mc_spb_addr)
1671 u16 error, err_arr_size;
1674 struct sp_blob_header *sp_blob;
1675 u64 mc_ram_addr = mc_get_dram_addr();
1677 if (!is_dpsparser_supported())
1681 printf("fsl-mc: Invalid Blob address\n");
1685 #ifdef CONFIG_MC_DRAM_SPB_OFFSET
1686 mc_spb_offset = CONFIG_MC_DRAM_SPB_OFFSET;
1688 #error "CONFIG_MC_DRAM_SPB_OFFSET not defined"
1691 // Read blob header and get size of SPB blob
1692 sp_blob = (struct sp_blob_header *)mc_spb_addr;
1693 spb_size = le32_to_cpu(sp_blob->length);
1694 if (spb_size > CONFIG_MC_SPB_MAX_SIZE) {
1695 printf("\nfsl-mc: ERROR: Bad SPB image (too large: %d)\n",
1700 mc_copy_image("MC SP Blob", mc_spb_addr, spb_size,
1701 mc_ram_addr + mc_spb_offset);
1703 //Invoke MC command to apply SPB blob
1704 printf("fsl-mc: Applying soft parser blob... ");
1705 err = dpsparser_apply_spb(dflt_mc_io, MC_CMD_NO_FLAGS, dpsparser_handle,
1706 mc_spb_offset, &error);
1711 printf("SUCCESS\n");
1713 printf("FAILED with error code = %d:\n", error);
1714 err_arr_size = (u16)ARRAY_SIZE(mc_err_msg_apply_spb);
1716 if (error > 0 && error < err_arr_size)
1717 printf(mc_err_msg_apply_spb[error]);
1719 printf(MC_ERROR_MSG_SPB_UNKNOWN);
1725 static int mc_init_object(void)
1731 printf("dprc_init() failed: %d\n", err);
1737 printf("dpbp_init() failed: %d\n", err);
1743 printf("dpio_init() failed: %d\n", err);
1749 printf("dpni_init() failed: %d\n", err);
1753 err = dpsparser_init();
1755 printf("dpsparser_init() failed: %d\n", err);
1764 int fsl_mc_ldpaa_exit(struct bd_info *bd)
1767 bool is_dpl_apply_status = false;
1768 bool mc_boot_status = false;
1770 if (bd && mc_lazy_dpl_addr && !fsl_mc_ldpaa_exit(NULL)) {
1771 err = mc_apply_dpl(mc_lazy_dpl_addr);
1773 fdt_fixup_board_enet(working_fdt);
1774 mc_lazy_dpl_addr = 0;
1777 if (!get_mc_boot_status())
1778 mc_boot_status = true;
1780 /* MC is not loaded intentionally, So return success. */
1781 if (bd && !mc_boot_status)
1784 /* If DPL is deployed, set is_dpl_apply_status as TRUE. */
1785 if (!get_dpl_apply_status())
1786 is_dpl_apply_status = true;
1789 * For case MC is loaded but DPL is not deployed, return success and
1790 * print message on console. Else FDT fix-up code execution hanged.
1792 if (bd && mc_boot_status && !is_dpl_apply_status) {
1793 printf("fsl-mc: DPL not deployed, DPAA2 ethernet not work\n");
1794 goto mc_obj_cleanup;
1797 if (bd && mc_boot_status && is_dpl_apply_status)
1803 printf("dpbp_exit() failed: %d\n", err);
1809 printf("dpio_exit() failed: %d\n", err);
1815 printf("dpni_exit() failed: %d\n", err);
1821 printf("dprc_exit() failed: %d\n", err);
1830 static void print_k_bytes(const void *buf, ssize_t *size)
1833 int count = printf("%s", (char *)buf);
1840 static void mc_dump_log(void)
1842 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
1843 u64 high = in_le64(&mc_ccsr_regs->reg_mcfbahr) & MC_FW_ADDR_MASK_HIGH;
1844 u64 low = in_le64(&mc_ccsr_regs->reg_mcfbalr) & MC_FW_ADDR_MASK_LOW;
1845 u32 buf_len, wrapped, last_byte, magic, buf_start;
1846 u64 mc_addr = (high << 32) | low;
1847 struct log_header *header;
1848 ssize_t size, bytes_end;
1849 const void *end_of_data;
1850 const void *map_addr;
1851 const void *end_addr;
1852 const void *cur_ptr;
1855 map_addr = map_sysmem(mc_addr + MC_STRUCT_BUFFER_OFFSET,
1857 header = (struct log_header *)map_addr;
1858 last_byte = in_le32(&header->last_byte);
1859 buf_len = in_le32(&header->buf_length);
1860 magic = in_le32(&header->magic_word);
1861 buf_start = in_le32(&header->buf_start);
1862 buf = map_addr + buf_start - MC_OFFSET_DELTA;
1863 end_addr = buf + buf_len;
1864 wrapped = last_byte & LOG_HEADER_FLAG_BUFFER_WRAPAROUND;
1865 end_of_data = buf + LAST_BYTE(last_byte);
1867 if (magic != MAGIC_MC) {
1868 puts("Magic number is not valid\n");
1869 printf("expected = %08x, received = %08x\n", MAGIC_MC, magic);
1873 if (wrapped && end_of_data != end_addr)
1874 cur_ptr = end_of_data + 1;
1878 if (cur_ptr <= end_of_data)
1879 size = end_of_data - cur_ptr;
1881 size = (end_addr - cur_ptr) + (end_of_data - buf);
1883 bytes_end = end_addr - cur_ptr;
1884 if (size > bytes_end) {
1885 print_k_bytes(cur_ptr, &bytes_end);
1890 print_k_bytes(buf, &size);
1893 unmap_sysmem(map_addr);
1896 static int do_fsl_mc(struct cmd_tbl *cmdtp, int flag, int argc,
1903 switch (argv[1][0]) {
1906 u64 mc_fw_addr, mc_dpc_addr;
1907 #ifdef CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1913 sub_cmd = argv[2][0];
1920 if (get_mc_boot_status() == 0) {
1921 printf("fsl-mc: MC is already booted");
1925 mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
1926 mc_dpc_addr = simple_strtoull(argv[4], NULL,
1929 if (!mc_init(mc_fw_addr, mc_dpc_addr))
1930 err = mc_init_object();
1933 #ifdef CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1937 if (get_aiop_apply_status() == 0) {
1938 printf("fsl-mc: AIOP FW is already");
1939 printf(" applied\n");
1943 aiop_fw_addr = simple_strtoull(argv[3], NULL,
1946 /* if SoC doesn't have AIOP, err = -ENODEV */
1947 err = load_mc_aiop_img(aiop_fw_addr);
1949 printf("fsl-mc: AIOP FW applied\n");
1953 printf("Invalid option: %s\n", argv[2]);
1968 if (get_dpl_apply_status() == 0) {
1969 printf("fsl-mc: DPL already applied\n");
1973 mc_dpl_addr = simple_strtoull(argv[3], NULL, 16);
1975 if (get_mc_boot_status() != 0) {
1976 printf("fsl-mc: Deploying data path layout ..");
1977 printf("ERROR (MC is not booted)\n");
1982 * We will do the actual dpaa exit and dpl apply
1983 * later from announce_and_cleanup().
1985 mc_lazy_dpl_addr = mc_dpl_addr;
1997 sub_cmd = argv[2][0];
2002 if (get_dpl_apply_status() == 0) {
2003 printf("fsl-mc: DPL already applied\n");
2006 if (get_mc_boot_status() != 0) {
2007 printf("fsl-mc: Deploying data path layout ..");
2008 printf("ERROR (MC is not booted)\n");
2012 mc_apply_addr = simple_strtoull(argv[3], NULL, 16);
2014 /* The user wants DPL applied now */
2015 if (!fsl_mc_ldpaa_exit(NULL))
2016 err = mc_apply_dpl(mc_apply_addr);
2020 if (!is_dpsparser_supported()) {
2021 printf("fsl-mc: apply spb command .. ");
2022 printf("ERROR: requires at least MC 10.12.0\n");
2025 if (get_mc_boot_status() != 0) {
2026 printf("fsl-mc: Deploying Soft Parser Blob...");
2027 printf("ERROR (MC is not booted)\n");
2031 mc_apply_addr = simple_strtoull(argv[3], NULL, 16);
2033 /* Apply spb (Soft Parser Blob) */
2034 err = mc_apply_spb(mc_apply_addr);
2038 printf("Invalid option: %s\n", argv[2]);
2050 printf("Invalid option: %s\n", argv[1]);
2055 return CMD_RET_USAGE;
2059 fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
2060 "DPAA2 command to manage Management Complex (MC)",
2061 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
2062 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
2063 "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
2064 "fsl_mc apply spb [spb_addr] - Apply SPB Soft Parser Blob\n"
2065 "fsl_mc start aiop [FW_addr] - Start AIOP\n"
2066 "fsl_mc dump_log - Dump MC Log\n"
2069 void mc_env_boot(void)
2071 #if defined(CONFIG_FSL_MC_ENET)
2072 char *mc_boot_env_var;
2073 /* The MC may only be initialized in the reset PHY function
2074 * because otherwise U-Boot has not yet set up all the MAC
2075 * address info properly. Without MAC addresses, the MC code
2076 * can not properly initialize the DPC.
2078 mc_boot_env_var = env_get(MC_BOOT_ENV_VAR);
2079 if (mc_boot_env_var)
2080 run_command_list(mc_boot_env_var, -1, 0);
2081 #endif /* CONFIG_FSL_MC_ENET */