1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved.
7 #define LOG_CATEGORY UCLASS_CLK
10 #include <clk-uclass.h>
14 #include <dm/device.h>
15 #include <dm/devres.h>
16 #include <linux/clk-provider.h>
17 #include <linux/err.h>
21 #define UBOOT_DM_CLK_COMPOSITE "clk_composite"
23 static u8 clk_composite_get_parent(struct clk *clk)
25 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
26 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
27 struct clk *mux = composite->mux;
30 return clk_mux_get_parent(mux);
35 static int clk_composite_set_parent(struct clk *clk, struct clk *parent)
37 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
38 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
39 const struct clk_ops *mux_ops = composite->mux_ops;
40 struct clk *mux = composite->mux;
45 return mux_ops->set_parent(mux, parent);
48 static unsigned long clk_composite_recalc_rate(struct clk *clk)
50 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
51 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
52 const struct clk_ops *rate_ops = composite->rate_ops;
53 struct clk *rate = composite->rate;
56 return rate_ops->get_rate(rate);
58 return clk_get_parent_rate(clk);
61 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate)
63 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
64 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
65 const struct clk_ops *rate_ops = composite->rate_ops;
66 struct clk *clk_rate = composite->rate;
68 if (rate && rate_ops && rate_ops->set_rate)
69 return rate_ops->set_rate(clk_rate, rate);
71 return clk_get_rate(clk);
74 static int clk_composite_enable(struct clk *clk)
76 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
77 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
78 const struct clk_ops *gate_ops = composite->gate_ops;
79 struct clk *gate = composite->gate;
82 return gate_ops->enable(gate);
87 static int clk_composite_disable(struct clk *clk)
89 struct clk_composite *composite = to_clk_composite(clk_dev_binded(clk) ?
90 (struct clk *)dev_get_clk_ptr(clk->dev) : clk);
91 const struct clk_ops *gate_ops = composite->gate_ops;
92 struct clk *gate = composite->gate;
95 return gate_ops->disable(gate);
100 struct clk *clk_register_composite(struct device *dev, const char *name,
101 const char * const *parent_names,
102 int num_parents, struct clk *mux,
103 const struct clk_ops *mux_ops,
105 const struct clk_ops *rate_ops,
107 const struct clk_ops *gate_ops,
111 struct clk_composite *composite;
114 if (!num_parents || (num_parents != 1 && !mux))
115 return ERR_PTR(-EINVAL);
117 composite = kzalloc(sizeof(*composite), GFP_KERNEL);
119 return ERR_PTR(-ENOMEM);
121 if (mux && mux_ops) {
122 composite->mux = mux;
123 composite->mux_ops = mux_ops;
124 mux->data = (ulong)composite;
127 if (rate && rate_ops) {
128 if (!rate_ops->get_rate) {
129 clk = ERR_PTR(-EINVAL);
133 composite->rate = rate;
134 composite->rate_ops = rate_ops;
135 rate->data = (ulong)composite;
138 if (gate && gate_ops) {
139 if (!gate_ops->enable || !gate_ops->disable) {
140 clk = ERR_PTR(-EINVAL);
144 composite->gate = gate;
145 composite->gate_ops = gate_ops;
146 gate->data = (ulong)composite;
149 clk = &composite->clk;
151 ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
152 parent_names[clk_composite_get_parent(clk)]);
159 composite->mux->dev = clk->dev;
161 composite->rate->dev = clk->dev;
163 composite->gate->dev = clk->dev;
172 static const struct clk_ops clk_composite_ops = {
173 .set_parent = clk_composite_set_parent,
174 .get_rate = clk_composite_recalc_rate,
175 .set_rate = clk_composite_set_rate,
176 .enable = clk_composite_enable,
177 .disable = clk_composite_disable,
180 U_BOOT_DRIVER(clk_composite) = {
181 .name = UBOOT_DM_CLK_COMPOSITE,
183 .ops = &clk_composite_ops,
184 .flags = DM_FLAG_PRE_RELOC,