arch/arm/dts/versal-mini-emmc1.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * dts file for Xilinx Versal Mini eMMC1 Configuration
   4  *
   5  * (C) Copyright 2018-2019, Xilinx, Inc.
   6  *
   7  * Siva Durga Prasad Paladugu <[email protected]>
   8  * Michal Simek <[email protected]>
   9  */
  10
  11 /dts-v1/;
  12
  13 / {
  14         compatible = "xlnx,versal";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17         model = "Xilinx Versal MINI eMMC1";
  18
  19         clk200: clk200 {
  20                 compatible = "fixed-clock";
  21                 #clock-cells = <0x0>;
  22                 clock-frequency = <200000000>;
  23         };
  24
  25         dcc: dcc {
  26                 compatible = "arm,dcc";
  27                 status = "okay";
  28                 bootph-all;
  29         };
  30
  31         amba: axi {
  32                 bootph-all;
  33                 compatible = "simple-bus";
  34                 #address-cells = <0x2>;
  35                 #size-cells = <0x2>;
  36                 ranges;
  37
  38                 sdhci1: sdhci@f1050000 {
  39                         compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
  40                         status = "okay";
  41                         non-removable;
  42                         disable-wp;
  43                         no-sd;
  44                         no-sdio;
  45                         cap-mmc-hw-reset;
  46                         bus-width = <8>;
  47                         reg = <0x0 0xf1050000 0x0 0x10000>;
  48                         clock-names = "clk_xin", "clk_ahb";
  49                         clocks = <&clk200 &clk200>;
  50                         no-1-8-v;
  51                         xlnx,mio-bank = <0>;
  52                 };
  53         };
  54
  55         aliases {
  56                 serial0 = &dcc;
  57                 mmc0 = &sdhci1;
  58         };
  59
  60         chosen {
  61                 stdout-path = "serial0:115200";
  62         };
  63
  64         memory@0 {
  65                 device_type = "memory";
  66                 reg = <0x0 0x0 0x0 0x20000000>;
  67         };
  68 };