arch/arm/dts/imx93.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright 2022 NXP
   4  */
   5
   6 #include <dt-bindings/clock/imx93-clock.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/fsl,imx93-power.h>
  11 #include <dt-bindings/thermal/thermal.h>
  12
  13 #include "imx93-pinfunc.h"
  14
  15 / {
  16         interrupt-parent = <&gic>;
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 gpio0 = &gpio1;
  22                 gpio1 = &gpio2;
  23                 gpio2 = &gpio3;
  24                 gpio3 = &gpio4;
  25                 i2c0 = &lpi2c1;
  26                 i2c1 = &lpi2c2;
  27                 i2c2 = &lpi2c3;
  28                 i2c3 = &lpi2c4;
  29                 i2c4 = &lpi2c5;
  30                 i2c5 = &lpi2c6;
  31                 i2c6 = &lpi2c7;
  32                 i2c7 = &lpi2c8;
  33                 mmc0 = &usdhc1;
  34                 mmc1 = &usdhc2;
  35                 mmc2 = &usdhc3;
  36                 serial0 = &lpuart1;
  37                 serial1 = &lpuart2;
  38                 serial2 = &lpuart3;
  39                 serial3 = &lpuart4;
  40                 serial4 = &lpuart5;
  41                 serial5 = &lpuart6;
  42                 serial6 = &lpuart7;
  43                 serial7 = &lpuart8;
  44         };
  45
  46         cpus {
  47                 #address-cells = <1>;
  48                 #size-cells = <0>;
  49
  50                 A55_0: cpu@0 {
  51                         device_type = "cpu";
  52                         compatible = "arm,cortex-a55";
  53                         reg = <0x0>;
  54                         enable-method = "psci";
  55                         #cooling-cells = <2>;
  56                 };
  57
  58                 A55_1: cpu@100 {
  59                         device_type = "cpu";
  60                         compatible = "arm,cortex-a55";
  61                         reg = <0x100>;
  62                         enable-method = "psci";
  63                         #cooling-cells = <2>;
  64                 };
  65
  66         };
  67
  68         osc_32k: clock-osc-32k {
  69                 compatible = "fixed-clock";
  70                 #clock-cells = <0>;
  71                 clock-frequency = <32768>;
  72                 clock-output-names = "osc_32k";
  73         };
  74
  75         osc_24m: clock-osc-24m {
  76                 compatible = "fixed-clock";
  77                 #clock-cells = <0>;
  78                 clock-frequency = <24000000>;
  79                 clock-output-names = "osc_24m";
  80         };
  81
  82         clk_ext1: clock-ext1 {
  83                 compatible = "fixed-clock";
  84                 #clock-cells = <0>;
  85                 clock-frequency = <133000000>;
  86                 clock-output-names = "clk_ext1";
  87         };
  88
  89         pmu {
  90                 compatible = "arm,cortex-a55-pmu";
  91                 interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  92         };
  93
  94         psci {
  95                 compatible = "arm,psci-1.0";
  96                 method = "smc";
  97         };
  98
  99         timer {
 100                 compatible = "arm,armv8-timer";
 101                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 102                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 103                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 104                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
 105                 clock-frequency = <24000000>;
 106                 arm,no-tick-in-suspend;
 107                 interrupt-parent = <&gic>;
 108         };
 109
 110         gic: interrupt-controller@48000000 {
 111                 compatible = "arm,gic-v3";
 112                 reg = <0 0x48000000 0 0x10000>,
 113                       <0 0x48040000 0 0xc0000>;
 114                 #interrupt-cells = <3>;
 115                 interrupt-controller;
 116                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 117                 interrupt-parent = <&gic>;
 118         };
 119
 120         thermal-zones {
 121                 cpu-thermal {
 122                         polling-delay-passive = <250>;
 123                         polling-delay = <2000>;
 124
 125                         thermal-sensors = <&tmu 0>;
 126
 127                         trips {
 128                                 cpu_alert: cpu-alert {
 129                                         temperature = <80000>;
 130                                         hysteresis = <2000>;
 131                                         type = "passive";
 132                                 };
 133
 134                                 cpu_crit: cpu-crit {
 135                                         temperature = <90000>;
 136                                         hysteresis = <2000>;
 137                                         type = "critical";
 138                                 };
 139                         };
 140
 141                         cooling-maps {
 142                                 map0 {
 143                                         trip = <&cpu_alert>;
 144                                         cooling-device =
 145                                                 <&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 146                                                 <&A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 147                                 };
 148                         };
 149                 };
 150         };
 151
 152         usbphynop1: usbphynop1 {
 153                 compatible = "usb-nop-xceiv";
 154                 #phy-cells = <0>;
 155                 clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
 156                 clock-names = "main_clk";
 157         };
 158
 159         usbphynop2: usbphynop2 {
 160                 compatible = "usb-nop-xceiv";
 161                 #phy-cells = <0>;
 162                 clocks = <&clk IMX93_CLK_USB_PHY_BURUNIN>;
 163                 clock-names = "main_clk";
 164         };
 165
 166         soc@0 {
 167                 compatible = "simple-bus";
 168                 #address-cells = <1>;
 169                 #size-cells = <1>;
 170                 ranges = <0x0 0x0 0x0 0x80000000>,
 171                          <0x28000000 0x0 0x28000000 0x10000000>;
 172
 173                 aips1: bus@44000000 {
 174                         compatible = "fsl,aips-bus", "simple-bus";
 175                         reg = <0x44000000 0x800000>;
 176                         #address-cells = <1>;
 177                         #size-cells = <1>;
 178                         ranges;
 179
 180                         anomix_ns_gpr: syscon@44210000 {
 181                                 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
 182                                 reg = <0x44210000 0x1000>;
 183                         };
 184
 185                         mu1: mailbox@44230000 {
 186                                 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 187                                 reg = <0x44230000 0x10000>;
 188                                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 189                                 clocks = <&clk IMX93_CLK_MU1_B_GATE>;
 190                                 #mbox-cells = <2>;
 191                                 status = "disabled";
 192                         };
 193
 194                         system_counter: timer@44290000 {
 195                                 compatible = "nxp,sysctr-timer";
 196                                 reg = <0x44290000 0x30000>;
 197                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 198                                 clocks = <&osc_24m>;
 199                                 clock-names = "per";
 200                                 nxp,no-divider;
 201                         };
 202
 203                         tpm1: pwm@44310000 {
 204                                 compatible = "fsl,imx7ulp-pwm";
 205                                 reg = <0x44310000 0x1000>;
 206                                 clocks = <&clk IMX93_CLK_TPM1_GATE>;
 207                                 #pwm-cells = <3>;
 208                                 status = "disabled";
 209                         };
 210
 211                         tpm2: pwm@44320000 {
 212                                 compatible = "fsl,imx7ulp-pwm";
 213                                 reg = <0x44320000 0x10000>;
 214                                 clocks = <&clk IMX93_CLK_TPM2_GATE>;
 215                                 #pwm-cells = <3>;
 216                                 status = "disabled";
 217                         };
 218
 219                         lpi2c1: i2c@44340000 {
 220                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 221                                 reg = <0x44340000 0x10000>;
 222                                 #address-cells = <1>;
 223                                 #size-cells = <0>;
 224                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 225                                 clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
 226                                          <&clk IMX93_CLK_BUS_AON>;
 227                                 clock-names = "per", "ipg";
 228                                 status = "disabled";
 229                         };
 230
 231                         lpi2c2: i2c@44350000 {
 232                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 233                                 reg = <0x44350000 0x10000>;
 234                                 #address-cells = <1>;
 235                                 #size-cells = <0>;
 236                                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 237                                 clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
 238                                          <&clk IMX93_CLK_BUS_AON>;
 239                                 clock-names = "per", "ipg";
 240                                 status = "disabled";
 241                         };
 242
 243                         lpspi1: spi@44360000 {
 244                                 #address-cells = <1>;
 245                                 #size-cells = <0>;
 246                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 247                                 reg = <0x44360000 0x10000>;
 248                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 249                                 clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
 250                                          <&clk IMX93_CLK_BUS_AON>;
 251                                 clock-names = "per", "ipg";
 252                                 status = "disabled";
 253                         };
 254
 255                         lpspi2: spi@44370000 {
 256                                 #address-cells = <1>;
 257                                 #size-cells = <0>;
 258                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 259                                 reg = <0x44370000 0x10000>;
 260                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 261                                 clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
 262                                          <&clk IMX93_CLK_BUS_AON>;
 263                                 clock-names = "per", "ipg";
 264                                 status = "disabled";
 265                         };
 266
 267                         lpuart1: serial@44380000 {
 268                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 269                                 reg = <0x44380000 0x1000>;
 270                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 271                                 clocks = <&clk IMX93_CLK_LPUART1_GATE>, <&clk IMX93_CLK_LPUART1_GATE>;
 272                                 clock-names = "ipg", "per";
 273                                 status = "disabled";
 274                         };
 275
 276                         lpuart2: serial@44390000 {
 277                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 278                                 reg = <0x44390000 0x1000>;
 279                                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 280                                 clocks = <&clk IMX93_CLK_LPUART2_GATE>;
 281                                 clock-names = "ipg";
 282                                 status = "disabled";
 283                         };
 284
 285                         flexcan1: can@443a0000 {
 286                                 compatible = "fsl,imx93-flexcan";
 287                                 reg = <0x443a0000 0x10000>;
 288                                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 289                                 clocks = <&clk IMX93_CLK_BUS_AON>,
 290                                          <&clk IMX93_CLK_CAN1_GATE>;
 291                                 clock-names = "ipg", "per";
 292                                 assigned-clocks = <&clk IMX93_CLK_CAN1>;
 293                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 294                                 assigned-clock-rates = <40000000>;
 295                                 fsl,clk-source = /bits/ 8 <0>;
 296                                 status = "disabled";
 297                         };
 298
 299                         iomuxc: pinctrl@443c0000 {
 300                                 compatible = "fsl,imx93-iomuxc";
 301                                 reg = <0x443c0000 0x10000>;
 302                                 status = "okay";
 303                         };
 304
 305                         bbnsm: bbnsm@44440000 {
 306                                 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
 307                                 reg = <0x44440000 0x10000>;
 308
 309                                 bbnsm_rtc: rtc {
 310                                         compatible = "nxp,imx93-bbnsm-rtc";
 311                                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 312                                 };
 313
 314                                 bbnsm_pwrkey: pwrkey {
 315                                         compatible = "nxp,imx93-bbnsm-pwrkey";
 316                                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 317                                         linux,code = <KEY_POWER>;
 318                                 };
 319                         };
 320
 321                         clk: clock-controller@44450000 {
 322                                 compatible = "fsl,imx93-ccm";
 323                                 reg = <0x44450000 0x10000>;
 324                                 #clock-cells = <1>;
 325                                 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>;
 326                                 clock-names = "osc_32k", "osc_24m", "clk_ext1";
 327                                 status = "okay";
 328                         };
 329
 330                         src: system-controller@44460000 {
 331                                 compatible = "fsl,imx93-src", "syscon";
 332                                 reg = <0x44460000 0x10000>;
 333                                 #address-cells = <1>;
 334                                 #size-cells = <1>;
 335                                 ranges;
 336
 337                                 mediamix: power-domain@44462400 {
 338                                         compatible = "fsl,imx93-src-slice";
 339                                         reg = <0x44462400 0x400>, <0x44465800 0x400>;
 340                                         #power-domain-cells = <0>;
 341                                         clocks = <&clk IMX93_CLK_MEDIA_AXI>,
 342                                                  <&clk IMX93_CLK_MEDIA_APB>;
 343                                 };
 344
 345                                 mlmix: power-domain@44461800 {
 346                                         compatible = "fsl,imx93-src-slice";
 347                                         reg = <0x44461800 0x400>, <0x44464800 0x400>;
 348                                         #power-domain-cells = <0>;
 349                                         clocks = <&clk IMX93_CLK_ML_APB>,
 350                                                  <&clk IMX93_CLK_ML>;
 351                                 };
 352                         };
 353
 354                         anatop: anatop@44480000 {
 355                                 compatible = "fsl,imx93-anatop", "syscon";
 356                                 reg = <0x44480000 0x10000>;
 357                         };
 358
 359                         tmu: tmu@44482000 {
 360                                 compatible = "fsl,imx93-tmu";
 361                                 reg = <0x44482000 0x1000>;
 362                                 clocks = <&clk IMX93_CLK_TMC_GATE>;
 363                                 little-endian;
 364                                 fsl,tmu-calibration = <0x0000000e 0x800000da
 365                                                        0x00000029 0x800000e9
 366                                                        0x00000056 0x80000102
 367                                                        0x000000a2 0x8000012a
 368                                                        0x00000116 0x80000166
 369                                                        0x00000195 0x800001a7
 370                                                        0x000001b2 0x800001b6>;
 371                                 #thermal-sensor-cells = <1>;
 372                         };
 373
 374                         adc1: adc@44530000 {
 375                                 compatible = "nxp,imx93-adc";
 376                                 reg = <0x44530000 0x10000>;
 377                                 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 378                                              <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 379                                              <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 380                                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 381                                 clocks = <&clk IMX93_CLK_ADC1_GATE>;
 382                                 clock-names = "ipg";
 383                                 #io-channel-cells = <1>;
 384                                 status = "disabled";
 385                         };
 386                 };
 387
 388                 aips2: bus@42000000 {
 389                         compatible = "fsl,aips-bus", "simple-bus";
 390                         reg = <0x42000000 0x800000>;
 391                         #address-cells = <1>;
 392                         #size-cells = <1>;
 393                         ranges;
 394
 395                         wakeupmix_gpr: syscon@42420000 {
 396                                 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
 397                                 reg = <0x42420000 0x1000>;
 398                         };
 399
 400                         mu2: mailbox@42440000 {
 401                                 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 402                                 reg = <0x42440000 0x10000>;
 403                                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 404                                 clocks = <&clk IMX93_CLK_MU2_B_GATE>;
 405                                 #mbox-cells = <2>;
 406                                 status = "disabled";
 407                         };
 408
 409                         wdog3: wdog@42490000 {
 410                                 compatible = "fsl,imx93-wdt";
 411                                 reg = <0x42490000 0x10000>;
 412                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 413                                 clocks = <&clk IMX93_CLK_WDOG3_GATE>;
 414                                 timeout-sec = <40>;
 415                         };
 416
 417                         tpm3: pwm@424e0000 {
 418                                 compatible = "fsl,imx7ulp-pwm";
 419                                 reg = <0x424e0000 0x1000>;
 420                                 clocks = <&clk IMX93_CLK_TPM3_GATE>;
 421                                 #pwm-cells = <3>;
 422                                 status = "disabled";
 423                         };
 424
 425                         tpm4: pwm@424f0000 {
 426                                 compatible = "fsl,imx7ulp-pwm";
 427                                 reg = <0x424f0000 0x10000>;
 428                                 clocks = <&clk IMX93_CLK_TPM4_GATE>;
 429                                 #pwm-cells = <3>;
 430                                 status = "disabled";
 431                         };
 432
 433                         tpm5: pwm@42500000 {
 434                                 compatible = "fsl,imx7ulp-pwm";
 435                                 reg = <0x42500000 0x10000>;
 436                                 clocks = <&clk IMX93_CLK_TPM5_GATE>;
 437                                 #pwm-cells = <3>;
 438                                 status = "disabled";
 439                         };
 440
 441                         tpm6: pwm@42510000 {
 442                                 compatible = "fsl,imx7ulp-pwm";
 443                                 reg = <0x42510000 0x10000>;
 444                                 clocks = <&clk IMX93_CLK_TPM6_GATE>;
 445                                 #pwm-cells = <3>;
 446                                 status = "disabled";
 447                         };
 448
 449                         lpi2c3: i2c@42530000 {
 450                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 451                                 reg = <0x42530000 0x10000>;
 452                                 #address-cells = <1>;
 453                                 #size-cells = <0>;
 454                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 455                                 clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
 456                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 457                                 clock-names = "per", "ipg";
 458                                 status = "disabled";
 459                         };
 460
 461                         lpi2c4: i2c@42540000 {
 462                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 463                                 reg = <0x42540000 0x10000>;
 464                                 #address-cells = <1>;
 465                                 #size-cells = <0>;
 466                                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 467                                 clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
 468                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 469                                 clock-names = "per", "ipg";
 470                                 status = "disabled";
 471                         };
 472
 473                         lpspi3: spi@42550000 {
 474                                 #address-cells = <1>;
 475                                 #size-cells = <0>;
 476                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 477                                 reg = <0x42550000 0x10000>;
 478                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 479                                 clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
 480                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 481                                 clock-names = "per", "ipg";
 482                                 status = "disabled";
 483                         };
 484
 485                         lpspi4: spi@42560000 {
 486                                 #address-cells = <1>;
 487                                 #size-cells = <0>;
 488                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 489                                 reg = <0x42560000 0x10000>;
 490                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 491                                 clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
 492                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 493                                 clock-names = "per", "ipg";
 494                                 status = "disabled";
 495                         };
 496
 497                         lpuart3: serial@42570000 {
 498                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 499                                 reg = <0x42570000 0x1000>;
 500                                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 501                                 clocks = <&clk IMX93_CLK_LPUART3_GATE>;
 502                                 clock-names = "ipg";
 503                                 status = "disabled";
 504                         };
 505
 506                         lpuart4: serial@42580000 {
 507                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 508                                 reg = <0x42580000 0x1000>;
 509                                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 510                                 clocks = <&clk IMX93_CLK_LPUART4_GATE>;
 511                                 clock-names = "ipg";
 512                                 status = "disabled";
 513                         };
 514
 515                         lpuart5: serial@42590000 {
 516                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 517                                 reg = <0x42590000 0x1000>;
 518                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 519                                 clocks = <&clk IMX93_CLK_LPUART5_GATE>;
 520                                 clock-names = "ipg";
 521                                 status = "disabled";
 522                         };
 523
 524                         lpuart6: serial@425a0000 {
 525                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 526                                 reg = <0x425a0000 0x1000>;
 527                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 528                                 clocks = <&clk IMX93_CLK_LPUART6_GATE>;
 529                                 clock-names = "ipg";
 530                                 status = "disabled";
 531                         };
 532
 533                         flexcan2: can@425b0000 {
 534                                 compatible = "fsl,imx93-flexcan";
 535                                 reg = <0x425b0000 0x10000>;
 536                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 537                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 538                                          <&clk IMX93_CLK_CAN2_GATE>;
 539                                 clock-names = "ipg", "per";
 540                                 assigned-clocks = <&clk IMX93_CLK_CAN2>;
 541                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 542                                 assigned-clock-rates = <40000000>;
 543                                 fsl,clk-source = /bits/ 8 <0>;
 544                                 status = "disabled";
 545                         };
 546
 547                         flexspi1: spi@425e0000 {
 548                                 compatible = "nxp,imx8mm-fspi";
 549                                 reg = <0x425e0000 0x10000>, <0x28000000 0x10000000>;
 550                                 reg-names = "fspi_base", "fspi_mmap";
 551                                 #address-cells = <1>;
 552                                 #size-cells = <0>;
 553                                 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 554                                 clocks = <&clk IMX93_CLK_FLEXSPI1_GATE>,
 555                                          <&clk IMX93_CLK_FLEXSPI1_GATE>;
 556                                 clock-names = "fspi_en", "fspi";
 557                                 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
 558                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
 559                                 status = "disabled";
 560                         };
 561
 562                         lpuart7: serial@42690000 {
 563                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 564                                 reg = <0x42690000 0x1000>;
 565                                 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
 566                                 clocks = <&clk IMX93_CLK_LPUART7_GATE>;
 567                                 clock-names = "ipg";
 568                                 status = "disabled";
 569                         };
 570
 571                         lpuart8: serial@426a0000 {
 572                                 compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
 573                                 reg = <0x426a0000 0x1000>;
 574                                 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
 575                                 clocks = <&clk IMX93_CLK_LPUART8_GATE>;
 576                                 clock-names = "ipg";
 577                                 status = "disabled";
 578                         };
 579
 580                         lpi2c5: i2c@426b0000 {
 581                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 582                                 reg = <0x426b0000 0x10000>;
 583                                 #address-cells = <1>;
 584                                 #size-cells = <0>;
 585                                 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
 586                                 clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
 587                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 588                                 clock-names = "per", "ipg";
 589                                 status = "disabled";
 590                         };
 591
 592                         lpi2c6: i2c@426c0000 {
 593                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 594                                 reg = <0x426c0000 0x10000>;
 595                                 #address-cells = <1>;
 596                                 #size-cells = <0>;
 597                                 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
 598                                 clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
 599                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 600                                 clock-names = "per", "ipg";
 601                                 status = "disabled";
 602                         };
 603
 604                         lpi2c7: i2c@426d0000 {
 605                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 606                                 reg = <0x426d0000 0x10000>;
 607                                 #address-cells = <1>;
 608                                 #size-cells = <0>;
 609                                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 610                                 clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
 611                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 612                                 clock-names = "per", "ipg";
 613                                 status = "disabled";
 614                         };
 615
 616                         lpi2c8: i2c@426e0000 {
 617                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 618                                 reg = <0x426e0000 0x10000>;
 619                                 #address-cells = <1>;
 620                                 #size-cells = <0>;
 621                                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
 622                                 clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
 623                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 624                                 clock-names = "per", "ipg";
 625                                 status = "disabled";
 626                         };
 627
 628                         lpspi5: spi@426f0000 {
 629                                 #address-cells = <1>;
 630                                 #size-cells = <0>;
 631                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 632                                 reg = <0x426f0000 0x10000>;
 633                                 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
 634                                 clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
 635                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 636                                 clock-names = "per", "ipg";
 637                                 status = "disabled";
 638                         };
 639
 640                         lpspi6: spi@42700000 {
 641                                 #address-cells = <1>;
 642                                 #size-cells = <0>;
 643                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 644                                 reg = <0x42700000 0x10000>;
 645                                 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 646                                 clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
 647                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 648                                 clock-names = "per", "ipg";
 649                                 status = "disabled";
 650                         };
 651
 652                         lpspi7: spi@42710000 {
 653                                 #address-cells = <1>;
 654                                 #size-cells = <0>;
 655                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 656                                 reg = <0x42710000 0x10000>;
 657                                 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
 658                                 clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
 659                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 660                                 clock-names = "per", "ipg";
 661                                 status = "disabled";
 662                         };
 663
 664                         lpspi8: spi@42720000 {
 665                                 #address-cells = <1>;
 666                                 #size-cells = <0>;
 667                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 668                                 reg = <0x42720000 0x10000>;
 669                                 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
 670                                 clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
 671                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 672                                 clock-names = "per", "ipg";
 673                                 status = "disabled";
 674                         };
 675
 676                 };
 677
 678                 aips3: bus@42800000 {
 679                         compatible = "fsl,aips-bus", "simple-bus";
 680                         reg = <0x42800000 0x800000>;
 681                         #address-cells = <1>;
 682                         #size-cells = <1>;
 683                         ranges;
 684
 685                         usdhc1: mmc@42850000 {
 686                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 687                                 reg = <0x42850000 0x10000>;
 688                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 689                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 690                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 691                                          <&clk IMX93_CLK_USDHC1_GATE>;
 692                                 clock-names = "ipg", "ahb", "per";
 693                                 bus-width = <8>;
 694                                 fsl,tuning-start-tap = <20>;
 695                                 fsl,tuning-step= <2>;
 696                                 status = "disabled";
 697                         };
 698
 699                         usdhc2: mmc@42860000 {
 700                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 701                                 reg = <0x42860000 0x10000>;
 702                                 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 703                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 704                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 705                                          <&clk IMX93_CLK_USDHC2_GATE>;
 706                                 clock-names = "ipg", "ahb", "per";
 707                                 bus-width = <4>;
 708                                 fsl,tuning-start-tap = <20>;
 709                                 fsl,tuning-step= <2>;
 710                                 status = "disabled";
 711                         };
 712
 713                         eqos: ethernet@428a0000 {
 714                                 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
 715                                 reg = <0x428a0000 0x10000>;
 716                                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
 717                                              <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
 718                                 interrupt-names = "macirq", "eth_wake_irq";
 719                                 clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
 720                                          <&clk IMX93_CLK_ENET_QOS_GATE>,
 721                                          <&clk IMX93_CLK_ENET_TIMER2>,
 722                                          <&clk IMX93_CLK_ENET>,
 723                                          <&clk IMX93_CLK_ENET_QOS_GATE>;
 724                                 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
 725                                 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
 726                                                   <&clk IMX93_CLK_ENET>;
 727                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
 728                                                          <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
 729                                 assigned-clock-rates = <100000000>, <250000000>;
 730                                 intf_mode = <&wakeupmix_gpr 0x28>;
 731                                 snps,clk-csr = <0>;
 732                                 status = "disabled";
 733                         };
 734
 735                         fec: ethernet@42890000 {
 736                                 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
 737                                 reg = <0x42890000 0x10000>;
 738                                 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
 739                                              <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
 740                                              <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
 741                                              <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
 742                                 clocks = <&clk IMX93_CLK_ENET1_GATE>,
 743                                          <&clk IMX93_CLK_ENET1_GATE>,
 744                                          <&clk IMX93_CLK_ENET_TIMER1>,
 745                                          <&clk IMX93_CLK_ENET_REF>,
 746                                          <&clk IMX93_CLK_ENET_REF_PHY>;
 747                                 clock-names = "ipg", "ahb", "ptp",
 748                                               "enet_clk_ref", "enet_out";
 749                                 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
 750                                                   <&clk IMX93_CLK_ENET_REF>,
 751                                                   <&clk IMX93_CLK_ENET_REF_PHY>;
 752                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
 753                                                          <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>,
 754                                                          <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 755                                 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
 756                                 fsl,num-tx-queues = <3>;
 757                                 fsl,num-rx-queues = <3>;
 758                                 status = "disabled";
 759                         };
 760
 761                         usdhc3: mmc@428b0000 {
 762                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 763                                 reg = <0x428b0000 0x10000>;
 764                                 interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
 765                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 766                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 767                                          <&clk IMX93_CLK_USDHC3_GATE>;
 768                                 clock-names = "ipg", "ahb", "per";
 769                                 bus-width = <4>;
 770                                 fsl,tuning-start-tap = <20>;
 771                                 fsl,tuning-step= <2>;
 772                                 status = "disabled";
 773                         };
 774                 };
 775
 776                 gpio2: gpio@43810080 {
 777                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 778                         reg = <0x43810080 0x1000>, <0x43810040 0x40>;
 779                         gpio-controller;
 780                         #gpio-cells = <2>;
 781                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 782                         interrupt-controller;
 783                         #interrupt-cells = <2>;
 784                         clocks = <&clk IMX93_CLK_GPIO2_GATE>,
 785                                  <&clk IMX93_CLK_GPIO2_GATE>;
 786                         clock-names = "gpio", "port";
 787                         gpio-ranges = <&iomuxc 0 4 30>;
 788                 };
 789
 790                 gpio3: gpio@43820080 {
 791                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 792                         reg = <0x43820080 0x1000>, <0x43820040 0x40>;
 793                         gpio-controller;
 794                         #gpio-cells = <2>;
 795                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 796                         interrupt-controller;
 797                         #interrupt-cells = <2>;
 798                         clocks = <&clk IMX93_CLK_GPIO3_GATE>,
 799                                  <&clk IMX93_CLK_GPIO3_GATE>;
 800                         clock-names = "gpio", "port";
 801                         gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
 802                                       <&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
 803                 };
 804
 805                 gpio4: gpio@43830080 {
 806                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 807                         reg = <0x43830080 0x1000>, <0x43830040 0x40>;
 808                         gpio-controller;
 809                         #gpio-cells = <2>;
 810                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 811                         interrupt-controller;
 812                         #interrupt-cells = <2>;
 813                         clocks = <&clk IMX93_CLK_GPIO4_GATE>,
 814                                  <&clk IMX93_CLK_GPIO4_GATE>;
 815                         clock-names = "gpio", "port";
 816                         gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
 817                 };
 818
 819                 gpio1: gpio@47400080 {
 820                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 821                         reg = <0x47400080 0x1000>, <0x47400040 0x40>;
 822                         gpio-controller;
 823                         #gpio-cells = <2>;
 824                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 825                         interrupt-controller;
 826                         #interrupt-cells = <2>;
 827                         clocks = <&clk IMX93_CLK_GPIO1_GATE>,
 828                                  <&clk IMX93_CLK_GPIO1_GATE>;
 829                         clock-names = "gpio", "port";
 830                         gpio-ranges = <&iomuxc 0 92 16>;
 831                 };
 832
 833                 s4muap: mailbox@47520000 {
 834                         compatible = "fsl,imx93-mu-s4";
 835                         reg = <0x47520000 0x10000>;
 836                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
 837                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 838                         interrupt-names = "tx", "rx";
 839                         #mbox-cells = <2>;
 840                 };
 841
 842                 media_blk_ctrl: system-controller@4ac10000 {
 843                         compatible = "fsl,imx93-media-blk-ctrl", "syscon";
 844                         reg = <0x4ac10000 0x10000>;
 845                         power-domains = <&mediamix>;
 846                         clocks = <&clk IMX93_CLK_MEDIA_APB>,
 847                                  <&clk IMX93_CLK_MEDIA_AXI>,
 848                                  <&clk IMX93_CLK_NIC_MEDIA_GATE>,
 849                                  <&clk IMX93_CLK_MEDIA_DISP_PIX>,
 850                                  <&clk IMX93_CLK_CAM_PIX>,
 851                                  <&clk IMX93_CLK_PXP_GATE>,
 852                                  <&clk IMX93_CLK_LCDIF_GATE>,
 853                                  <&clk IMX93_CLK_ISI_GATE>,
 854                                  <&clk IMX93_CLK_MIPI_CSI_GATE>,
 855                                  <&clk IMX93_CLK_MIPI_DSI_GATE>;
 856                         clock-names = "apb", "axi", "nic", "disp", "cam",
 857                                       "pxp", "lcdif", "isi", "csi", "dsi";
 858                         #power-domain-cells = <1>;
 859                         status = "disabled";
 860                 };
 861
 862                 usbotg1: usb@4c100000 {
 863                         compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
 864                         reg = <0x4c100000 0x200>;
 865                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 866                         clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
 867                                  <&clk IMX93_CLK_HSIO_32K_GATE>;
 868                         clock-names = "usb_ctrl_root_clk", "usb_wakeup";
 869                         assigned-clocks = <&clk IMX93_CLK_HSIO>;
 870                         assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 871                         assigned-clock-rates = <133000000>;
 872                         phys = <&usbphynop1>;
 873                         fsl,usbmisc = <&usbmisc1 0>;
 874                         status = "disabled";
 875                 };
 876
 877                 usbmisc1: usbmisc@4c100200 {
 878                         compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
 879                                      "fsl,imx6q-usbmisc";
 880                         reg = <0x4c100200 0x200>;
 881                         #index-cells = <1>;
 882                 };
 883
 884                 usbotg2: usb@4c200000 {
 885                         compatible = "fsl,imx93-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
 886                         reg = <0x4c200000 0x200>;
 887                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 888                         clocks = <&clk IMX93_CLK_USB_CONTROLLER_GATE>,
 889                                  <&clk IMX93_CLK_HSIO_32K_GATE>;
 890                         clock-names = "usb_ctrl_root_clk", "usb_wakeup";
 891                         assigned-clocks = <&clk IMX93_CLK_HSIO>;
 892                         assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 893                         assigned-clock-rates = <133000000>;
 894                         phys = <&usbphynop2>;
 895                         fsl,usbmisc = <&usbmisc2 0>;
 896                         status = "disabled";
 897                 };
 898
 899                 usbmisc2: usbmisc@4c200200 {
 900                         compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
 901                                      "fsl,imx6q-usbmisc";
 902                         reg = <0x4c200200 0x200>;
 903                         #index-cells = <1>;
 904                 };
 905         };
 906 };