1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2006-2008
11 * Configuration settings for the DevKit8000 board.
17 /* High Level Configuration Options */
18 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
21 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
22 * 64 bytes before this address should be set aside for u-boot.img's
23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
27 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
28 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
30 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
31 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
33 /* Physical Memory Map */
35 #include <configs/ti_omap3_common.h>
37 #define CONFIG_REVISION_TAG 1
39 /* Size of malloc() pool */
40 #undef CONFIG_SYS_MALLOC_LEN
41 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
43 /* Hardware drivers */
45 #define CONFIG_NET_RETRY_COUNT 20
46 #define CONFIG_DRIVER_DM9000 1
47 #define CONFIG_DM9000_BASE 0x2c000000
48 #define DM9000_IO CONFIG_DM9000_BASE
49 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
50 #define CONFIG_DM9000_USE_16BIT 1
51 #define CONFIG_DM9000_NO_SROM 1
52 #undef CONFIG_DM9000_DEBUG
57 #define CONFIG_JFFS2_NAND
58 /* nand device jffs2 lives on */
59 #define CONFIG_JFFS2_DEV "nand0"
60 /* start of jffs2 partition */
61 #define CONFIG_JFFS2_PART_OFFSET 0x680000
62 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
65 /* BOOTP/DHCP options */
66 #define CONFIG_BOOTP_NISDOMAIN
67 #define CONFIG_BOOTP_BOOTFILESIZE
68 #define CONFIG_BOOTP_TIMEOFFSET
69 #undef CONFIG_BOOTP_VENDOREX
71 /* Environment information */
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73 "loadaddr=0x82000000\0" \
74 "console=ttyO2,115200n8\0" \
77 "dvimode=1024x768MR-16@60\0" \
78 "defaultdisplay=dvi\0" \
79 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
82 "setenv bootargs console=${console} " \
84 "omapfb.mode=dvi:${dvimode} " \
85 "omapdss.def_disp=${defaultdisplay}\0" \
88 "setenv bootargs ${bootargs} " \
89 "root=/dev/mmcblk0p2 " \
94 "setenv bootargs ${bootargs} " \
95 "omapfb.mode=dvi:${dvimode} " \
96 "omapdss.def_disp=${defaultdisplay} " \
97 "root=/dev/mtdblock4 " \
102 "setenv bootargs ${bootargs} " \
104 "nfsroot=${serverip}:${rootpath},${nfsopts} " \
105 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
108 "dnsip2=${dnsip2}\0" \
109 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
110 "bootscript=echo Running bootscript from mmc ...; " \
111 "source ${loadaddr}\0" \
112 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
113 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
114 "mmcboot=echo Booting from mmc ...; " \
116 "bootm ${loadaddr}\0" \
117 "nandboot=echo Booting from nand ...; " \
119 "nand read ${loadaddr} 280000 400000; " \
120 "bootm ${loadaddr}\0" \
121 "netboot=echo Booting from network ...; " \
122 "dhcp ${loadaddr}; " \
124 "bootm ${loadaddr}\0" \
125 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
126 "if run loadbootscript; then " \
129 "if run loaduimage; then " \
131 "else run nandboot; " \
134 "else run nandboot; fi\0"
136 #define CONFIG_BOOTCOMMAND "run autoboot"
138 /* Boot Argument Buffer Size */
141 #define CONFIG_SYS_SRAM_START 0x40200000
143 /* Defines for SPL */
145 /* NAND boot config */
146 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
147 #define CONFIG_SYS_NAND_PAGE_COUNT 64
148 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
149 #define CONFIG_SYS_NAND_OOBSIZE 64
150 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
151 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
152 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
155 #define CONFIG_SYS_NAND_ECCSIZE 512
156 #define CONFIG_SYS_NAND_ECCBYTES 3
157 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
159 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
160 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
162 /* SPL OS boot options */
163 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
165 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
166 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
167 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
168 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
169 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */
170 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */
172 #undef CONFIG_SYS_SPL_ARGS_ADDR
173 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
175 #endif /* __CONFIG_H */