1 // SPDX-License-Identifier: GPL-2.0+
6 * (C) Copyright 2019 NXP
11 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
12 * Extremly Accurate DS3231 Real Time Clock (RTC).
14 * copied from ds1337.c
25 * RTC register addresses
27 #define RTC_SEC_REG_ADDR 0x0
28 #define RTC_MIN_REG_ADDR 0x1
29 #define RTC_HR_REG_ADDR 0x2
30 #define RTC_DAY_REG_ADDR 0x3
31 #define RTC_DATE_REG_ADDR 0x4
32 #define RTC_MON_REG_ADDR 0x5
33 #define RTC_YR_REG_ADDR 0x6
34 #define RTC_CTL_REG_ADDR 0x0e
35 #define RTC_STAT_REG_ADDR 0x0f
38 * RTC control register bits
40 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
41 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
42 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
43 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
44 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
45 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
48 * RTC status register bits
50 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
51 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
52 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
53 #define RTC_STAT_BIT_BB32KHZ 0x40 /* Battery backed 32KHz Output */
54 #define RTC_STAT_BIT_EN32KHZ 0x8 /* Enable 32KHz Output */
56 #if !CONFIG_IS_ENABLED(DM_RTC)
57 static uchar rtc_read (uchar reg);
58 static void rtc_write (uchar reg, uchar val);
61 * Get the current time from the RTC
63 int rtc_get (struct rtc_time *tmp)
66 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
68 control = rtc_read (RTC_CTL_REG_ADDR);
69 status = rtc_read (RTC_STAT_REG_ADDR);
70 sec = rtc_read (RTC_SEC_REG_ADDR);
71 min = rtc_read (RTC_MIN_REG_ADDR);
72 hour = rtc_read (RTC_HR_REG_ADDR);
73 wday = rtc_read (RTC_DAY_REG_ADDR);
74 mday = rtc_read (RTC_DATE_REG_ADDR);
75 mon_cent = rtc_read (RTC_MON_REG_ADDR);
76 year = rtc_read (RTC_YR_REG_ADDR);
78 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
79 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
80 year, mon_cent, mday, wday, hour, min, sec, control, status);
82 if (status & RTC_STAT_BIT_OSF) {
83 printf ("### Warning: RTC oscillator has stopped\n");
84 /* clear the OSF flag */
85 rtc_write (RTC_STAT_REG_ADDR,
86 rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
90 tmp->tm_sec = bcd2bin (sec & 0x7F);
91 tmp->tm_min = bcd2bin (min & 0x7F);
92 tmp->tm_hour = bcd2bin (hour & 0x3F);
93 tmp->tm_mday = bcd2bin (mday & 0x3F);
94 tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
95 tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
96 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
100 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
101 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
102 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
110 int rtc_set (struct rtc_time *tmp)
114 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
115 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
116 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
118 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
120 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
121 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
123 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
124 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
125 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
126 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
127 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
133 * Reset the RTC. We also enable the oscillator output on the
134 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
135 * according to the datasheet, turning on the square wave output
136 * increases the current drain on the backup battery from about
139 void rtc_reset (void)
141 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
145 * Enable 32KHz output
147 #ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
148 void rtc_enable_32khz_output(void)
150 rtc_write(RTC_STAT_REG_ADDR,
151 RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ);
160 uchar rtc_read (uchar reg)
162 return (i2c_reg_read (CFG_SYS_I2C_RTC_ADDR, reg));
165 static void rtc_write (uchar reg, uchar val)
167 i2c_reg_write (CFG_SYS_I2C_RTC_ADDR, reg, val);
170 static int ds3231_rtc_get(struct udevice *dev, struct rtc_time *tmp)
172 uchar sec, min, hour, mday, wday, mon_cent, year, status;
174 status = dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR);
175 sec = dm_i2c_reg_read(dev, RTC_SEC_REG_ADDR);
176 min = dm_i2c_reg_read(dev, RTC_MIN_REG_ADDR);
177 hour = dm_i2c_reg_read(dev, RTC_HR_REG_ADDR);
178 wday = dm_i2c_reg_read(dev, RTC_DAY_REG_ADDR);
179 mday = dm_i2c_reg_read(dev, RTC_DATE_REG_ADDR);
180 mon_cent = dm_i2c_reg_read(dev, RTC_MON_REG_ADDR);
181 year = dm_i2c_reg_read(dev, RTC_YR_REG_ADDR);
183 if (status & RTC_STAT_BIT_OSF) {
184 printf("### Warning: RTC oscillator has stopped\n");
185 /* clear the OSF flag */
186 dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
187 dm_i2c_reg_read(dev, RTC_STAT_REG_ADDR)
188 & ~RTC_STAT_BIT_OSF);
192 tmp->tm_sec = bcd2bin(sec & 0x7F);
193 tmp->tm_min = bcd2bin(min & 0x7F);
194 tmp->tm_hour = bcd2bin(hour & 0x3F);
195 tmp->tm_mday = bcd2bin(mday & 0x3F);
196 tmp->tm_mon = bcd2bin(mon_cent & 0x1F);
197 tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900);
198 tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
202 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
203 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
204 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
209 static int ds3231_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
213 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
214 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
215 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
217 dm_i2c_reg_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
219 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
220 dm_i2c_reg_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century);
222 dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
223 dm_i2c_reg_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
224 dm_i2c_reg_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
225 dm_i2c_reg_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
226 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
231 static int ds3231_rtc_reset(struct udevice *dev)
235 ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
236 RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
243 static int ds3231_probe(struct udevice *dev)
245 i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
246 DM_I2C_CHIP_WR_ADDRESS);
251 #ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
252 int rtc_enable_32khz_output(int busnum, int chip_addr)
257 ret = i2c_get_chip_for_busnum(busnum, chip_addr, 1, &dev);
259 ret = dm_i2c_reg_write(dev, RTC_STAT_REG_ADDR,
260 RTC_STAT_BIT_BB32KHZ |
261 RTC_STAT_BIT_EN32KHZ);
267 static const struct rtc_ops ds3231_rtc_ops = {
268 .get = ds3231_rtc_get,
269 .set = ds3231_rtc_set,
270 .reset = ds3231_rtc_reset,
273 static const struct udevice_id ds3231_rtc_ids[] = {
274 { .compatible = "dallas,ds3231" },
275 { .compatible = "dallas,ds3232" },
279 U_BOOT_DRIVER(rtc_ds3231) = {
280 .name = "rtc-ds3231",
282 .probe = ds3231_probe,
283 .of_match = ds3231_rtc_ids,
284 .ops = &ds3231_rtc_ops,