1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef _CONFIG_HELIOS4_H
7 #define _CONFIG_HELIOS4_H
9 #include <linux/stringify.h>
12 * High Level Configuration Options (easy to change)
16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
17 * for DDR ECC byte filling in the SPL before loading the main
21 #define CONFIG_ENV_MIN_ENTRIES 128
23 /* Environment in MMC */
25 * For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
26 * boot image starts @ LBA-0.
27 * As result in MMC/eMMC case it will be a 1 sector gap between u-boot
28 * image and environment
31 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
34 #ifndef CONFIG_SPL_BUILD
35 #define CONFIG_PCI_SCAN_SHOW
38 /* Keep device tree and initrd in lower memory so the kernel can access them */
39 #define RELOCATION_LIMITS_ENV_SETTINGS \
40 "fdt_high=0x10000000\0" \
41 "initrd_high=0x10000000\0"
46 #define CONFIG_SPL_SIZE (140 << 10)
48 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
50 #ifdef CONFIG_SPL_BUILD
51 #define CONFIG_SYS_MALLOC_SIMPLE
54 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
55 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
57 #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
58 /* SPL related MMC defines */
59 #ifdef CONFIG_SPL_BUILD
60 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
65 * mv-common.h should be defined after CMD configs since it used them
66 * to enable certain macros
68 #include "mv-common.h"
70 /* Include the common distro boot environment */
71 #ifndef CONFIG_SPL_BUILD
74 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
76 #define BOOT_TARGET_DEVICES_MMC(func)
79 #ifdef CONFIG_USB_STORAGE
80 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
82 #define BOOT_TARGET_DEVICES_USB(func)
86 #define BOOT_TARGET_DEVICES_SCSI_BUS0(func)
87 #define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
88 #define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
91 * With SCSI enabled, M.2 SATA is always located on bus 0
93 #define BOOT_TARGET_DEVICES_SCSI_BUS0(func) func(SCSI, scsi, 0)
96 * Either one or both mPCIe slots may be configured as mSATA interfaces. The
97 * SCSI bus ids are assigned based on sequence of hardware present, not always
98 * tied to hardware slot ids. As such, use second SCSI bus if either slot is
99 * set for SATA, and only use third SCSI bus if both slots are SATA enabled.
101 #if defined (CONFIG_HELIOS4_CON2_SATA) || defined (CONFIG_HELIOS4_CON3_SATA)
102 #define BOOT_TARGET_DEVICES_SCSI_BUS1(func) func(SCSI, scsi, 1)
104 #define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
107 #if defined (CONFIG_HELIOS4_CON2_SATA) && defined (CONFIG_HELIOS4_CON3_SATA)
108 #define BOOT_TARGET_DEVICES_SCSI_BUS2(func) func(SCSI, scsi, 2)
110 #define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
113 #endif /* CONFIG_SCSI */
116 * The SCSI buses are attempted in increasing bus order, there is no current
117 * mechanism to alter the default bus priority order for booting.
119 #define BOOT_TARGET_DEVICES(func) \
120 BOOT_TARGET_DEVICES_MMC(func) \
121 BOOT_TARGET_DEVICES_USB(func) \
122 BOOT_TARGET_DEVICES_SCSI_BUS0(func) \
123 BOOT_TARGET_DEVICES_SCSI_BUS1(func) \
124 BOOT_TARGET_DEVICES_SCSI_BUS2(func) \
128 #define KERNEL_ADDR_R __stringify(0x800000)
129 #define FDT_ADDR_R __stringify(0x100000)
130 #define RAMDISK_ADDR_R __stringify(0x1800000)
131 #define SCRIPT_ADDR_R __stringify(0x200000)
132 #define PXEFILE_ADDR_R __stringify(0x300000)
134 #define LOAD_ADDRESS_ENV_SETTINGS \
135 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
136 "fdt_addr_r=" FDT_ADDR_R "\0" \
137 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
138 "scriptaddr=" SCRIPT_ADDR_R "\0" \
139 "pxefile_addr_r=" PXEFILE_ADDR_R "\0"
141 #include <config_distro_bootcmd.h>
143 #define CONFIG_EXTRA_ENV_SETTINGS \
144 RELOCATION_LIMITS_ENV_SETTINGS \
145 LOAD_ADDRESS_ENV_SETTINGS \
146 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
147 "console=ttyS0,115200\0" \
150 #endif /* CONFIG_SPL_BUILD */
152 #endif /* _CONFIG_HELIOS4_H */