]> Git Repo - J-u-boot.git/blob - board/intel/agilex-socdk/MAINTAINERS
Makefile: socfpga: Add target to generate hex output for combined spl and dtb
[J-u-boot.git] / board / intel / agilex-socdk / MAINTAINERS
1 SOCFPGA BOARD
2 M:      Ley Foon Tan <[email protected]>
3 M:      Chee Hong Ang <[email protected]>
4 S:      Maintained
5 F:      board/intel/agilex-socdk/
6 F:      include/configs/socfpga_agilex_socdk.h
7 F:      configs/socfpga_agilex_atf_defconfig
8 F:      configs/socfpga_agilex_defconfig
This page took 0.021908 seconds and 4 git commands to generate.