1 // SPDX-License-Identifier: GPL-2.0+
11 * Find out to which of the 2 gpio modules the pin specified in the
13 * GPIO_MODULE yields 0 for pins 0 to 31,
16 #define GPIO_MODULE(pin) ((pin) >> 5)
19 * Bit position within a 32-bit peripheral register (where every
20 * bit is one bitslice)
22 #define MASK(pin) (1 << ((pin) & 0x1F))
23 #define BASE_ADDR(mod) module_base[mod]
26 * Lookup table for transforming gpio module number 0 to 2 to
29 static u32 module_base[] = {
34 static void clrsetbits(u32 addr, u32 and_mask, u32 or_mask)
36 reg_write(addr, (reg_read(addr) & ~and_mask) | or_mask);
39 int vct_gpio_dir(int pin, int dir)
43 gpio_base = BASE_ADDR(GPIO_MODULE(pin));
46 clrsetbits(GPIO_SWPORTA_DDR(gpio_base), MASK(pin), 0);
48 clrsetbits(GPIO_SWPORTA_DDR(gpio_base), 0, MASK(pin));
53 void vct_gpio_set(int pin, int val)
57 gpio_base = BASE_ADDR(GPIO_MODULE(pin));
60 clrsetbits(GPIO_SWPORTA_DR(gpio_base), MASK(pin), 0);
62 clrsetbits(GPIO_SWPORTA_DR(gpio_base), 0, MASK(pin));
65 int vct_gpio_get(int pin)
70 gpio_base = BASE_ADDR(GPIO_MODULE(pin));
71 value = reg_read(GPIO_EXT_PORTA(gpio_base));
73 return ((value & MASK(pin)) ? 1 : 0);