4 bool "Support Rockchip RK3036"
8 imply USB_FUNCTION_ROCKUSB
10 imply ROCKCHIP_COMMON_BOARD
12 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
13 including NEON and GPU, Mali-400 graphics, several DDR3 options
14 and video codec support. Peripherals include Gigabit Ethernet,
15 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
17 config ROCKCHIP_RK3128
18 bool "Support Rockchip RK3128"
20 imply ROCKCHIP_COMMON_BOARD
22 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
23 including NEON and GPU, Mali-400 graphics, several DDR3 options
24 and video codec support. Peripherals include Gigabit Ethernet,
25 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
27 config ROCKCHIP_RK3188
28 bool "Support Rockchip RK3188"
30 select SPL_BOARD_INIT if SPL
37 select SPL_DRIVERS_MISC_SUPPORT
38 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
39 select SPL_ROCKCHIP_BACK_TO_BROM
40 select BOARD_LATE_INIT
41 imply SPL_ROCKCHIP_COMMON_BOARD
43 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
44 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
45 video interfaces, several memory options and video codec support.
46 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
47 UART, SPI, I2C and PWMs.
49 config ROCKCHIP_RK322X
50 bool "Support Rockchip RK3228/RK3229"
60 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
61 select TPL_NEEDS_SEPARATE_STACK if TPL
62 select SPL_DRIVERS_MISC_SUPPORT
63 imply SPL_SERIAL_SUPPORT
64 imply SPL_ROCKCHIP_COMMON_BOARD
65 imply TPL_SERIAL_SUPPORT
66 imply TPL_ROCKCHIP_COMMON_BOARD
67 select TPL_LIBCOMMON_SUPPORT
68 select TPL_LIBGENERIC_SUPPORT
70 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
71 including NEON and GPU, Mali-400 graphics, several DDR3 options
72 and video codec support. Peripherals include Gigabit Ethernet,
73 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
75 config ROCKCHIP_RK3288
76 bool "Support Rockchip RK3288"
81 imply SPL_ROCKCHIP_COMMON_BOARD
84 imply TPL_DRIVERS_MISC_SUPPORT
85 imply TPL_LIBCOMMON_SUPPORT
86 imply TPL_LIBGENERIC_SUPPORT
87 imply TPL_NEEDS_SEPARATE_TEXT_BASE
88 imply TPL_NEEDS_SEPARATE_STACK
93 imply TPL_ROCKCHIP_COMMON_BOARD
94 imply TPL_SERIAL_SUPPORT
96 imply USB_FUNCTION_ROCKUSB
99 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
100 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
101 video interfaces supporting HDMI and eDP, several DDR3 options
102 and video codec support. Peripherals include Gigabit Ethernet,
103 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
105 config ROCKCHIP_RK3328
106 bool "Support Rockchip RK3328"
110 imply SPL_ROCKCHIP_COMMON_BOARD
111 imply SPL_SERIAL_SUPPORT
112 imply SPL_SEPARATE_BSS
113 select ENABLE_ARM_SOC_BOOT0_HOOK
114 select DEBUG_UART_BOARD_INIT
117 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
118 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
119 video interfaces supporting HDMI and eDP, several DDR3 options
120 and video codec support. Peripherals include Gigabit Ethernet,
121 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
123 config ROCKCHIP_RK3368
124 bool "Support Rockchip RK3368"
128 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
129 select TPL_NEEDS_SEPARATE_STACK if TPL
130 imply SPL_ROCKCHIP_COMMON_BOARD
131 imply SPL_SEPARATE_BSS
132 imply SPL_SERIAL_SUPPORT
133 imply TPL_SERIAL_SUPPORT
134 imply TPL_ROCKCHIP_COMMON_BOARD
136 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
137 into a big and little cluster with 4 cores each) Cortex-A53 including
138 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
139 (for the little cluster), PowerVR G6110 based graphics, one video
140 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
143 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
144 I2S, UARTs, SPI, I2C and PWMs.
146 config ROCKCHIP_RK3399
147 bool "Support Rockchip RK3399"
153 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
154 select SPL_BOARD_INIT if SPL
156 select SPL_CLK if SPL
157 select SPL_PINCTRL if SPL
158 select SPL_RAM if SPL
159 select SPL_REGMAP if SPL
160 select SPL_SYSCON if SPL
161 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
162 select TPL_NEEDS_SEPARATE_STACK if TPL
163 select SPL_SEPARATE_BSS
164 select SPL_SERIAL_SUPPORT
165 select SPL_DRIVERS_MISC_SUPPORT
173 select DM_REGULATOR_FIXED
174 select BOARD_LATE_INIT
175 imply SPL_ROCKCHIP_COMMON_BOARD
176 imply TPL_SERIAL_SUPPORT
177 imply TPL_LIBCOMMON_SUPPORT
178 imply TPL_LIBGENERIC_SUPPORT
179 imply TPL_SYS_MALLOC_SIMPLE
180 imply TPL_DRIVERS_MISC_SUPPORT
187 imply TPL_TINY_MEMSET
188 imply TPL_ROCKCHIP_COMMON_BOARD
190 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
191 and quad-core Cortex-A53.
192 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
193 video interfaces supporting HDMI and eDP, several DDR3 options
194 and video codec support. Peripherals include Gigabit Ethernet,
195 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
197 config ROCKCHIP_RV1108
198 bool "Support Rockchip RV1108"
201 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
204 config ROCKCHIP_USB_UART
205 bool "Route uart output to usb pins"
207 Rockchip SoCs have the ability to route the signals of the debug
208 uart through the d+ and d- pins of a specific usb phy to enable
209 some form of closed-case debugging. With this option supported
210 SoCs will enable this routing as a debug measure.
212 config SPL_ROCKCHIP_BACK_TO_BROM
213 bool "SPL returns to bootrom"
214 default y if ROCKCHIP_RK3036
215 select ROCKCHIP_BROM_HELPER
216 select SPL_BOOTROM_SUPPORT
219 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
220 SPL will return to the boot rom, which will then load the U-Boot
221 binary to keep going on.
223 config TPL_ROCKCHIP_BACK_TO_BROM
224 bool "TPL returns to bootrom"
226 select ROCKCHIP_BROM_HELPER
227 select TPL_BOOTROM_SUPPORT
230 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
231 SPL will return to the boot rom, which will then load the U-Boot
232 binary to keep going on.
234 config ROCKCHIP_COMMON_BOARD
235 bool "Rockchip common board file"
237 Rockchip SoCs have similar boot process, Common board file is mainly
238 in charge of common process of board_init() and board_late_init() for
241 config SPL_ROCKCHIP_COMMON_BOARD
242 bool "Rockchip SPL common board file"
245 Rockchip SoCs have similar boot process, SPL is mainly in charge of
246 load and boot Trust ATF/U-Boot firmware, and DRAM init if there is
247 no TPL for the board.
249 config TPL_ROCKCHIP_COMMON_BOARD
253 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
254 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
255 common board is a basic TPL board init which can be shared for most
256 of SoCs to avoid copy-pase for different SoCs.
258 config ROCKCHIP_BOOT_MODE_REG
259 hex "Rockchip boot mode flag register address"
261 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
262 according to the value from this register.
264 config ROCKCHIP_SPL_RESERVE_IRAM
265 hex "Size of IRAM reserved in SPL"
268 SPL may need reserve memory for firmware loaded by SPL, whose load
269 address is in IRAM and may overlay with SPL text area if not
272 config ROCKCHIP_BROM_HELPER
275 config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
276 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
277 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
279 Some Rockchip BROM variants (e.g. on the RK3188) load the
280 first stage in segments and enter multiple times. E.g. on
281 the RK3188, the first 1KB of the first stage are loaded
282 first and entered; after returning to the BROM, the
283 remainder of the first stage is loaded, but the BROM
284 re-enters at the same address/to the same code as previously.
286 This enables support code in the BOOT0 hook for the SPL stage
287 to allow multiple entries.
289 config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
290 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
291 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
293 Some Rockchip BROM variants (e.g. on the RK3188) load the
294 first stage in segments and enter multiple times. E.g. on
295 the RK3188, the first 1KB of the first stage are loaded
296 first and entered; after returning to the BROM, the
297 remainder of the first stage is loaded, but the BROM
298 re-enters at the same address/to the same code as previously.
300 This enables support code in the BOOT0 hook for the TPL stage
301 to allow multiple entries.
303 config SPL_MMC_SUPPORT
304 default y if !SPL_ROCKCHIP_BACK_TO_BROM
306 source "arch/arm/mach-rockchip/rk3036/Kconfig"
307 source "arch/arm/mach-rockchip/rk3128/Kconfig"
308 source "arch/arm/mach-rockchip/rk3188/Kconfig"
309 source "arch/arm/mach-rockchip/rk322x/Kconfig"
310 source "arch/arm/mach-rockchip/rk3288/Kconfig"
311 source "arch/arm/mach-rockchip/rk3328/Kconfig"
312 source "arch/arm/mach-rockchip/rk3368/Kconfig"
313 source "arch/arm/mach-rockchip/rk3399/Kconfig"
314 source "arch/arm/mach-rockchip/rv1108/Kconfig"