drivers/misc/fsl_ifc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2010-2011 Freescale Semiconductor, Inc.
   4  * Author: Dipen Dudhat <[email protected]>
   5  */
   6
   7 #include <config.h>
   8 #include <fsl_ifc.h>
   9 #include <part.h>
  10
  11 #ifdef CONFIG_TFABOOT
  12 struct ifc_regs ifc_cfg_default_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
  13         {
  14                 "cs0",
  15 #if defined(CFG_SYS_CSPR0) && defined(CFG_SYS_CSOR0)
  16                 CFG_SYS_CSPR0,
  17 #ifdef CFG_SYS_CSPR0_EXT
  18                 CFG_SYS_CSPR0_EXT,
  19 #else
  20                 0,
  21 #endif
  22 #ifdef CFG_SYS_AMASK0
  23                 CFG_SYS_AMASK0,
  24 #else
  25                 0,
  26 #endif
  27                 CFG_SYS_CSOR0,
  28                 {
  29                         CFG_SYS_CS0_FTIM0,
  30                         CFG_SYS_CS0_FTIM1,
  31                         CFG_SYS_CS0_FTIM2,
  32                         CFG_SYS_CS0_FTIM3,
  33                 },
  34 #ifdef CFG_SYS_CSOR0_EXT
  35                 CFG_SYS_CSOR0_EXT,
  36 #else
  37                 0,
  38 #endif
  39 #ifdef CFG_SYS_CSPR0_FINAL
  40                 CFG_SYS_CSPR0_FINAL,
  41 #else
  42                 0,
  43 #endif
  44 #ifdef CFG_SYS_AMASK0_FINAL
  45                 CFG_SYS_AMASK0_FINAL,
  46 #else
  47                 0,
  48 #endif
  49 #endif
  50         },
  51
  52 #if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 2
  53         {
  54                 "cs1",
  55 #if defined(CFG_SYS_CSPR1) && defined(CFG_SYS_CSOR1)
  56                 CFG_SYS_CSPR1,
  57 #ifdef CFG_SYS_CSPR1_EXT
  58                 CFG_SYS_CSPR1_EXT,
  59 #else
  60                 0,
  61 #endif
  62 #ifdef CFG_SYS_AMASK1
  63                 CFG_SYS_AMASK1,
  64 #else
  65                 0,
  66 #endif
  67                 CFG_SYS_CSOR1,
  68                 {
  69                         CFG_SYS_CS1_FTIM0,
  70                         CFG_SYS_CS1_FTIM1,
  71                         CFG_SYS_CS1_FTIM2,
  72                         CFG_SYS_CS1_FTIM3,
  73                 },
  74 #ifdef CFG_SYS_CSOR1_EXT
  75                 CFG_SYS_CSOR1_EXT,
  76 #else
  77                 0,
  78 #endif
  79 #ifdef CFG_SYS_CSPR1_FINAL
  80                 CFG_SYS_CSPR1_FINAL,
  81 #else
  82                 0,
  83 #endif
  84 #ifdef CFG_SYS_AMASK1_FINAL
  85                 CFG_SYS_AMASK1_FINAL,
  86 #else
  87                 0,
  88 #endif
  89 #endif
  90         },
  91 #endif
  92
  93 #if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 3
  94         {
  95                 "cs2",
  96 #if defined(CFG_SYS_CSPR2) && defined(CFG_SYS_CSOR2)
  97                 CFG_SYS_CSPR2,
  98 #ifdef CFG_SYS_CSPR2_EXT
  99                 CFG_SYS_CSPR2_EXT,
 100 #else
 101                 0,
 102 #endif
 103 #ifdef CFG_SYS_AMASK2
 104                 CFG_SYS_AMASK2,
 105 #else
 106                 0,
 107 #endif
 108                 CFG_SYS_CSOR2,
 109                 {
 110                         CFG_SYS_CS2_FTIM0,
 111                         CFG_SYS_CS2_FTIM1,
 112                         CFG_SYS_CS2_FTIM2,
 113                         CFG_SYS_CS2_FTIM3,
 114                 },
 115 #ifdef CFG_SYS_CSOR2_EXT
 116                 CFG_SYS_CSOR2_EXT,
 117 #else
 118                 0,
 119 #endif
 120 #ifdef CFG_SYS_CSPR2_FINAL
 121                 CFG_SYS_CSPR2_FINAL,
 122 #else
 123                 0,
 124 #endif
 125 #ifdef CFG_SYS_AMASK2_FINAL
 126                 CFG_SYS_AMASK2_FINAL,
 127 #else
 128                 0,
 129 #endif
 130 #endif
 131         },
 132 #endif
 133
 134 #if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 4
 135         {
 136                 "cs3",
 137 #if defined(CFG_SYS_CSPR3) && defined(CFG_SYS_CSOR3)
 138                 CFG_SYS_CSPR3,
 139 #ifdef CFG_SYS_CSPR3_EXT
 140                 CFG_SYS_CSPR3_EXT,
 141 #else
 142                 0,
 143 #endif
 144 #ifdef CFG_SYS_AMASK3
 145                 CFG_SYS_AMASK3,
 146 #else
 147                 0,
 148 #endif
 149                 CFG_SYS_CSOR3,
 150                 {
 151                         CFG_SYS_CS3_FTIM0,
 152                         CFG_SYS_CS3_FTIM1,
 153                         CFG_SYS_CS3_FTIM2,
 154                         CFG_SYS_CS3_FTIM3,
 155                 },
 156 #ifdef CFG_SYS_CSOR3_EXT
 157                 CFG_SYS_CSOR3_EXT,
 158 #else
 159                 0,
 160 #endif
 161 #ifdef CFG_SYS_CSPR3_FINAL
 162                 CFG_SYS_CSPR3_FINAL,
 163 #else
 164                 0,
 165 #endif
 166 #ifdef CFG_SYS_AMASK3_FINAL
 167                 CFG_SYS_AMASK3_FINAL,
 168 #else
 169                 0,
 170 #endif
 171 #endif
 172         },
 173 #endif
 174
 175 #if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 5
 176         {
 177                 "cs4",
 178 #if defined(CFG_SYS_CSPR4) && defined(CFG_SYS_CSOR4)
 179                 CFG_SYS_CSPR4,
 180 #ifdef CFG_SYS_CSPR4_EXT
 181                 CFG_SYS_CSPR4_EXT,
 182 #else
 183                 0,
 184 #endif
 185 #ifdef CFG_SYS_AMASK4
 186                 CFG_SYS_AMASK4,
 187 #else
 188                 0,
 189 #endif
 190                 CFG_SYS_CSOR4,
 191                 {
 192                         CFG_SYS_CS4_FTIM0,
 193                         CFG_SYS_CS4_FTIM1,
 194                         CFG_SYS_CS4_FTIM2,
 195                         CFG_SYS_CS4_FTIM3,
 196                 },
 197 #ifdef CFG_SYS_CSOR4_EXT
 198                 CFG_SYS_CSOR4_EXT,
 199 #else
 200                 0,
 201 #endif
 202 #ifdef CFG_SYS_CSPR4_FINAL
 203                 CFG_SYS_CSPR4_FINAL,
 204 #else
 205                 0,
 206 #endif
 207 #ifdef CFG_SYS_AMASK4_FINAL
 208                 CFG_SYS_AMASK4_FINAL,
 209 #else
 210                 0,
 211 #endif
 212 #endif
 213         },
 214 #endif
 215
 216 #if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 6
 217         {
 218                 "cs5",
 219 #if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
 220                 CONFIG_SYS_CSPR5,
 221 #ifdef CONFIG_SYS_CSPR5_EXT
 222                 CONFIG_SYS_CSPR5_EXT,
 223 #else
 224                 0,
 225 #endif
 226 #ifdef CONFIG_SYS_AMASK5
 227                 CONFIG_SYS_AMASK5,
 228 #else
 229                 0,
 230 #endif
 231                 CONFIG_SYS_CSOR5,
 232                 {
 233                         CONFIG_SYS_CS5_FTIM0,
 234                         CONFIG_SYS_CS5_FTIM1,
 235                         CONFIG_SYS_CS5_FTIM2,
 236                         CONFIG_SYS_CS5_FTIM3,
 237                 },
 238 #ifdef CONFIG_SYS_CSOR5_EXT
 239                 CONFIG_SYS_CSOR5_EXT,
 240 #else
 241                 0,
 242 #endif
 243 #ifdef CONFIG_SYS_CSPR5_FINAL
 244                 CONFIG_SYS_CSPR5_FINAL,
 245 #else
 246                 0,
 247 #endif
 248 #ifdef CONFIG_SYS_AMASK5_FINAL
 249                 CONFIG_SYS_AMASK5_FINAL,
 250 #else
 251                 0,
 252 #endif
 253 #endif
 254         },
 255 #endif
 256
 257 #if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 7
 258         {
 259                 "cs6",
 260 #if defined(CFG_SYS_CSPR6) && defined(CFG_SYS_CSOR6)
 261                 CFG_SYS_CSPR6,
 262 #ifdef CFG_SYS_CSPR6_EXT
 263                 CFG_SYS_CSPR6_EXT,
 264 #else
 265                 0,
 266 #endif
 267 #ifdef CFG_SYS_AMASK6
 268                 CFG_SYS_AMASK6,
 269 #else
 270                 0,
 271 #endif
 272                 CFG_SYS_CSOR6,
 273                 {
 274                         CFG_SYS_CS6_FTIM0,
 275                         CFG_SYS_CS6_FTIM1,
 276                         CFG_SYS_CS6_FTIM2,
 277                         CFG_SYS_CS6_FTIM3,
 278                 },
 279 #ifdef CFG_SYS_CSOR6_EXT
 280                 CFG_SYS_CSOR6_EXT,
 281 #else
 282                 0,
 283 #endif
 284 #ifdef CFG_SYS_CSPR6_FINAL
 285                 CFG_SYS_CSPR6_FINAL,
 286 #else
 287                 0,
 288 #endif
 289 #ifdef CFG_SYS_AMASK6_FINAL
 290                 CFG_SYS_AMASK6_FINAL,
 291 #else
 292                 0,
 293 #endif
 294 #endif
 295         },
 296 #endif
 297
 298 #if CONFIG_SYS_FSL_IFC_BANK_COUNT >= 8
 299         {
 300                 "cs7",
 301 #if defined(CFG_SYS_CSPR7) && defined(CFG_SYS_CSOR7)
 302                 CFG_SYS_CSPR7,
 303 #ifdef CFG_SYS_CSPR7_EXT
 304                 CFG_SYS_CSPR7_EXT,
 305 #else
 306                 0,
 307 #endif
 308 #ifdef CFG_SYS_AMASK7
 309                 CFG_SYS_AMASK7,
 310 #else
 311                 0,
 312 #endif
 313                 CFG_SYS_CSOR7,
 314 #ifdef CFG_SYS_CSOR7_EXT
 315                 CFG_SYS_CSOR7_EXT,
 316 #else
 317                 0,
 318 #endif
 319                 {
 320                         CFG_SYS_CS7_FTIM0,
 321                         CFG_SYS_CS7_FTIM1,
 322                         CFG_SYS_CS7_FTIM2,
 323                         CFG_SYS_CS7_FTIM3,
 324                 },
 325 #ifdef CFG_SYS_CSPR7_FINAL
 326                 CFG_SYS_CSPR7_FINAL,
 327 #else
 328                 0,
 329 #endif
 330 #ifdef CFG_SYS_AMASK7_FINAL
 331                 CFG_SYS_AMASK7_FINAL,
 332 #else
 333                 0,
 334 #endif
 335 #endif
 336         },
 337 #endif
 338 };
 339
 340 __weak void ifc_cfg_boot_info(struct ifc_regs_info *regs_info)
 341 {
 342         regs_info->regs = ifc_cfg_default_boot;
 343         regs_info->cs_size = CONFIG_SYS_FSL_IFC_BANK_COUNT;
 344 }
 345 #endif
 346
 347 void print_ifc_regs(void)
 348 {
 349         int i, j;
 350
 351         printf("IFC Controller Registers\n");
 352         for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) {
 353                 printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
 354                        i, get_ifc_cspr(i), i, get_ifc_amask(i),
 355                        i, get_ifc_csor(i));
 356                 for (j = 0; j < 4; j++)
 357                         printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
 358         }
 359 }
 360
 361 #ifdef CONFIG_TFABOOT
 362 void init_early_memctl_regs(void)
 363 {
 364         int i, j;
 365         struct ifc_regs *regs;
 366         struct ifc_regs_info regs_info = {0};
 367
 368         ifc_cfg_boot_info(&regs_info);
 369         regs = regs_info.regs;
 370
 371         for (i = 0 ; i < regs_info.cs_size; i++) {
 372                 if (regs[i].pr && (regs[i].pr & CSPR_V)) {
 373                         /* skip setting cspr/csor_ext in below condition */
 374                         if (!(IS_ENABLED(CONFIG_A003399_NOR_WORKAROUND) &&
 375                               i == 0 &&
 376                               ((regs[0].pr & CSPR_MSEL) == CSPR_MSEL_NOR))) {
 377                                 if (regs[i].pr_ext)
 378                                         set_ifc_cspr_ext(i, regs[i].pr_ext);
 379                                 if (regs[i].or_ext)
 380                                         set_ifc_csor_ext(i, regs[i].or_ext);
 381                         }
 382
 383                         for (j = 0; j < ARRAY_SIZE(regs->ftim); j++)
 384                                 set_ifc_ftim(i, j, regs[i].ftim[j]);
 385
 386                         set_ifc_csor(i, regs[i].or);
 387                         set_ifc_amask(i, regs[i].amask);
 388                         set_ifc_cspr(i, regs[i].pr);
 389                 }
 390         }
 391 }
 392
 393 void init_final_memctl_regs(void)
 394 {
 395         int i;
 396         struct ifc_regs *regs;
 397         struct ifc_regs_info regs_info;
 398
 399         ifc_cfg_boot_info(&regs_info);
 400         regs = regs_info.regs;
 401
 402         for (i = 0 ; i < regs_info.cs_size && i < ARRAY_SIZE(regs->ftim); i++) {
 403                 if (!(regs[i].pr_final & CSPR_V))
 404                         continue;
 405                 if (regs[i].pr_final)
 406                         set_ifc_cspr(i, regs[i].pr_final);
 407                 if (regs[i].amask_final)
 408                         set_ifc_amask(i, (i == 1) ? regs[i].amask_final :
 409                                                                 regs[i].amask);
 410         }
 411 }
 412 #else
 413 void init_early_memctl_regs(void)
 414 {
 415 #if defined(CFG_SYS_CSPR0) && defined(CFG_SYS_CSOR0)
 416         set_ifc_ftim(IFC_CS0, IFC_FTIM0, CFG_SYS_CS0_FTIM0);
 417         set_ifc_ftim(IFC_CS0, IFC_FTIM1, CFG_SYS_CS0_FTIM1);
 418         set_ifc_ftim(IFC_CS0, IFC_FTIM2, CFG_SYS_CS0_FTIM2);
 419         set_ifc_ftim(IFC_CS0, IFC_FTIM3, CFG_SYS_CS0_FTIM3);
 420
 421 #ifndef CONFIG_A003399_NOR_WORKAROUND
 422 #ifdef CFG_SYS_CSPR0_EXT
 423         set_ifc_cspr_ext(IFC_CS0, CFG_SYS_CSPR0_EXT);
 424 #endif
 425 #ifdef CFG_SYS_CSOR0_EXT
 426         set_ifc_csor_ext(IFC_CS0, CFG_SYS_CSOR0_EXT);
 427 #endif
 428         set_ifc_cspr(IFC_CS0, CFG_SYS_CSPR0);
 429         set_ifc_amask(IFC_CS0, CFG_SYS_AMASK0);
 430         set_ifc_csor(IFC_CS0, CFG_SYS_CSOR0);
 431 #endif
 432 #endif
 433
 434 #ifdef CFG_SYS_CSPR1_EXT
 435         set_ifc_cspr_ext(IFC_CS1, CFG_SYS_CSPR1_EXT);
 436 #endif
 437 #ifdef CFG_SYS_CSOR1_EXT
 438         set_ifc_csor_ext(IFC_CS1, CFG_SYS_CSOR1_EXT);
 439 #endif
 440 #if defined(CFG_SYS_CSPR1) && defined(CFG_SYS_CSOR1)
 441         set_ifc_ftim(IFC_CS1, IFC_FTIM0, CFG_SYS_CS1_FTIM0);
 442         set_ifc_ftim(IFC_CS1, IFC_FTIM1, CFG_SYS_CS1_FTIM1);
 443         set_ifc_ftim(IFC_CS1, IFC_FTIM2, CFG_SYS_CS1_FTIM2);
 444         set_ifc_ftim(IFC_CS1, IFC_FTIM3, CFG_SYS_CS1_FTIM3);
 445
 446         set_ifc_csor(IFC_CS1, CFG_SYS_CSOR1);
 447         set_ifc_amask(IFC_CS1, CFG_SYS_AMASK1);
 448         set_ifc_cspr(IFC_CS1, CFG_SYS_CSPR1);
 449 #endif
 450
 451 #ifdef CFG_SYS_CSPR2_EXT
 452         set_ifc_cspr_ext(IFC_CS2, CFG_SYS_CSPR2_EXT);
 453 #endif
 454 #ifdef CFG_SYS_CSOR2_EXT
 455         set_ifc_csor_ext(IFC_CS2, CFG_SYS_CSOR2_EXT);
 456 #endif
 457 #if defined(CFG_SYS_CSPR2) && defined(CFG_SYS_CSOR2)
 458         set_ifc_ftim(IFC_CS2, IFC_FTIM0, CFG_SYS_CS2_FTIM0);
 459         set_ifc_ftim(IFC_CS2, IFC_FTIM1, CFG_SYS_CS2_FTIM1);
 460         set_ifc_ftim(IFC_CS2, IFC_FTIM2, CFG_SYS_CS2_FTIM2);
 461         set_ifc_ftim(IFC_CS2, IFC_FTIM3, CFG_SYS_CS2_FTIM3);
 462
 463         set_ifc_csor(IFC_CS2, CFG_SYS_CSOR2);
 464         set_ifc_amask(IFC_CS2, CFG_SYS_AMASK2);
 465         set_ifc_cspr(IFC_CS2, CFG_SYS_CSPR2);
 466 #endif
 467
 468 #ifdef CFG_SYS_CSPR3_EXT
 469         set_ifc_cspr_ext(IFC_CS3, CFG_SYS_CSPR3_EXT);
 470 #endif
 471 #ifdef CFG_SYS_CSOR3_EXT
 472         set_ifc_csor_ext(IFC_CS3, CFG_SYS_CSOR3_EXT);
 473 #endif
 474 #if defined(CFG_SYS_CSPR3) && defined(CFG_SYS_CSOR3)
 475         set_ifc_ftim(IFC_CS3, IFC_FTIM0, CFG_SYS_CS3_FTIM0);
 476         set_ifc_ftim(IFC_CS3, IFC_FTIM1, CFG_SYS_CS3_FTIM1);
 477         set_ifc_ftim(IFC_CS3, IFC_FTIM2, CFG_SYS_CS3_FTIM2);
 478         set_ifc_ftim(IFC_CS3, IFC_FTIM3, CFG_SYS_CS3_FTIM3);
 479
 480         set_ifc_cspr(IFC_CS3, CFG_SYS_CSPR3);
 481         set_ifc_amask(IFC_CS3, CFG_SYS_AMASK3);
 482         set_ifc_csor(IFC_CS3, CFG_SYS_CSOR3);
 483 #endif
 484
 485 #ifdef CFG_SYS_CSPR4_EXT
 486         set_ifc_cspr_ext(IFC_CS4, CFG_SYS_CSPR4_EXT);
 487 #endif
 488 #ifdef CFG_SYS_CSOR4_EXT
 489         set_ifc_csor_ext(IFC_CS4, CFG_SYS_CSOR4_EXT);
 490 #endif
 491 #if defined(CFG_SYS_CSPR4) && defined(CFG_SYS_CSOR4)
 492         set_ifc_ftim(IFC_CS4, IFC_FTIM0, CFG_SYS_CS4_FTIM0);
 493         set_ifc_ftim(IFC_CS4, IFC_FTIM1, CFG_SYS_CS4_FTIM1);
 494         set_ifc_ftim(IFC_CS4, IFC_FTIM2, CFG_SYS_CS4_FTIM2);
 495         set_ifc_ftim(IFC_CS4, IFC_FTIM3, CFG_SYS_CS4_FTIM3);
 496
 497         set_ifc_cspr(IFC_CS4, CFG_SYS_CSPR4);
 498         set_ifc_amask(IFC_CS4, CFG_SYS_AMASK4);
 499         set_ifc_csor(IFC_CS4, CFG_SYS_CSOR4);
 500 #endif
 501
 502 #ifdef CONFIG_SYS_CSPR5_EXT
 503         set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT);
 504 #endif
 505 #ifdef CONFIG_SYS_CSOR5_EXT
 506         set_ifc_csor_ext(IFC_CS5, CONFIG_SYS_CSOR5_EXT);
 507 #endif
 508 #if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
 509         set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0);
 510         set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1);
 511         set_ifc_ftim(IFC_CS5, IFC_FTIM2, CONFIG_SYS_CS5_FTIM2);
 512         set_ifc_ftim(IFC_CS5, IFC_FTIM3, CONFIG_SYS_CS5_FTIM3);
 513
 514         set_ifc_cspr(IFC_CS5, CONFIG_SYS_CSPR5);
 515         set_ifc_amask(IFC_CS5, CONFIG_SYS_AMASK5);
 516         set_ifc_csor(IFC_CS5, CONFIG_SYS_CSOR5);
 517 #endif
 518
 519 #ifdef CFG_SYS_CSPR6_EXT
 520         set_ifc_cspr_ext(IFC_CS6, CFG_SYS_CSPR6_EXT);
 521 #endif
 522 #ifdef CFG_SYS_CSOR6_EXT
 523         set_ifc_csor_ext(IFC_CS6, CFG_SYS_CSOR6_EXT);
 524 #endif
 525 #if defined(CFG_SYS_CSPR6) && defined(CFG_SYS_CSOR6)
 526         set_ifc_ftim(IFC_CS6, IFC_FTIM0, CFG_SYS_CS6_FTIM0);
 527         set_ifc_ftim(IFC_CS6, IFC_FTIM1, CFG_SYS_CS6_FTIM1);
 528         set_ifc_ftim(IFC_CS6, IFC_FTIM2, CFG_SYS_CS6_FTIM2);
 529         set_ifc_ftim(IFC_CS6, IFC_FTIM3, CFG_SYS_CS6_FTIM3);
 530
 531         set_ifc_cspr(IFC_CS6, CFG_SYS_CSPR6);
 532         set_ifc_amask(IFC_CS6, CFG_SYS_AMASK6);
 533         set_ifc_csor(IFC_CS6, CFG_SYS_CSOR6);
 534 #endif
 535
 536 #ifdef CFG_SYS_CSPR7_EXT
 537         set_ifc_cspr_ext(IFC_CS7, CFG_SYS_CSPR7_EXT);
 538 #endif
 539 #ifdef CFG_SYS_CSOR7_EXT
 540         set_ifc_csor_ext(IFC_CS7, CFG_SYS_CSOR7_EXT);
 541 #endif
 542 #if defined(CFG_SYS_CSPR7) && defined(CFG_SYS_CSOR7)
 543         set_ifc_ftim(IFC_CS7, IFC_FTIM0, CFG_SYS_CS7_FTIM0);
 544         set_ifc_ftim(IFC_CS7, IFC_FTIM1, CFG_SYS_CS7_FTIM1);
 545         set_ifc_ftim(IFC_CS7, IFC_FTIM2, CFG_SYS_CS7_FTIM2);
 546         set_ifc_ftim(IFC_CS7, IFC_FTIM3, CFG_SYS_CS7_FTIM3);
 547
 548         set_ifc_cspr(IFC_CS7, CFG_SYS_CSPR7);
 549         set_ifc_amask(IFC_CS7, CFG_SYS_AMASK7);
 550         set_ifc_csor(IFC_CS7, CFG_SYS_CSOR7);
 551 #endif
 552 }
 553
 554 void init_final_memctl_regs(void)
 555 {
 556 #ifdef CFG_SYS_CSPR0_FINAL
 557         set_ifc_cspr(IFC_CS0, CFG_SYS_CSPR0_FINAL);
 558 #endif
 559 #ifdef CFG_SYS_AMASK0_FINAL
 560         set_ifc_amask(IFC_CS0, CFG_SYS_AMASK0);
 561 #endif
 562 #ifdef CFG_SYS_CSPR1_FINAL
 563         set_ifc_cspr(IFC_CS1, CFG_SYS_CSPR1_FINAL);
 564 #endif
 565 #ifdef CFG_SYS_AMASK1_FINAL
 566         set_ifc_amask(IFC_CS1, CFG_SYS_AMASK1_FINAL);
 567 #endif
 568 #ifdef CFG_SYS_CSPR2_FINAL
 569         set_ifc_cspr(IFC_CS2, CFG_SYS_CSPR2_FINAL);
 570 #endif
 571 #ifdef CFG_SYS_AMASK2_FINAL
 572         set_ifc_amask(IFC_CS2, CFG_SYS_AMASK2);
 573 #endif
 574 #ifdef CFG_SYS_CSPR3_FINAL
 575         set_ifc_cspr(IFC_CS3, CFG_SYS_CSPR3_FINAL);
 576 #endif
 577 #ifdef CFG_SYS_AMASK3_FINAL
 578         set_ifc_amask(IFC_CS3, CFG_SYS_AMASK3);
 579 #endif
 580 }
 581 #endif