4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #ifdef CONFIG_VCT_PLATINUMAVC
25 #define UART_1_BASE 0xBDC30000
27 #define UART_1_BASE 0xBF89C000
30 #define UART_RBR_OFF 0x00 /* receiver buffer reg */
31 #define UART_THR_OFF 0x00 /* transmit holding reg */
32 #define UART_DLL_OFF 0x00 /* divisor latch low reg */
33 #define UART_IER_OFF 0x04 /* interrupt enable reg */
34 #define UART_DLH_OFF 0x04 /* receiver buffer reg */
35 #define UART_FCR_OFF 0x08 /* fifo control register */
36 #define UART_LCR_OFF 0x0c /* line control register */
37 #define UART_MCR_OFF 0x10 /* modem control register */
38 #define UART_LSR_OFF 0x14 /* line status register */
39 #define UART_MSR_OFF 0x18 /* modem status register */
40 #define UART_SCR_OFF 0x1c /* scratch pad register */
42 #define UART_RCV_DATA_RDY 0x01 /* Data Received */
43 #define UART_XMT_HOLD_EMPTY 0x20
44 #define UART_TRANSMIT_EMPTY 0x40
46 /* 7 bit on line control reg. enalbing rw to dll and dlh */
47 #define UART_LCR_DLAB 0x0080
49 #define UART___9600_BDR 0x84
50 #define UART__19200_BDR 0x42
51 #define UART_115200_BDR 0x08
53 #define UART_DIS_ALL_INTER 0x00 /* disable all interrupts */
55 #define UART_5DATA_BITS 0x0000 /* 5 [bits] 1.5 bits 2 */
56 #define UART_6DATA_BITS 0x0001 /* 6 [bits] 1 bits 2 */
57 #define UART_7DATA_BITS 0x0002 /* 7 [bits] 1 bits 2 */
58 #define UART_8DATA_BITS 0x0003 /* 8 [bits] 1 bits 2 */
60 static void vct_uart_set_baud_rate(u32 address, u32 dh, u32 dl)
62 u32 val = __raw_readl(UART_1_BASE + UART_LCR_OFF);
66 __raw_writel(val, UART_1_BASE + UART_LCR_OFF);
68 __raw_writel(dl, UART_1_BASE + UART_DLL_OFF);
69 __raw_writel(dh, UART_1_BASE + UART_DLH_OFF);
72 val &= ~UART_LCR_DLAB;
73 __raw_writel(val, UART_1_BASE + UART_LCR_OFF);
80 __raw_writel(UART_DIS_ALL_INTER, UART_1_BASE + UART_IER_OFF);
81 vct_uart_set_baud_rate(UART_1_BASE, 0, UART_115200_BDR);
82 __raw_writel(UART_8DATA_BITS, UART_1_BASE + UART_LCR_OFF);
87 void serial_setbrg(void)
90 * Baudrate change not supported currently, fixed to 115200 baud
94 void serial_putc(const char c)
99 while (!(UART_XMT_HOLD_EMPTY & __raw_readl(UART_1_BASE + UART_LSR_OFF)))
102 __raw_writel(c, UART_1_BASE + UART_THR_OFF);
105 void serial_puts(const char *s)
111 int serial_getc(void)
113 while (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF)))
116 return __raw_readl(UART_1_BASE + UART_RBR_OFF) & 0xff;
119 int serial_tstc(void)
121 if (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF)))