3 * Texas Instruments <www.ti.com>
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * (C) Copyright 2002-2004
22 * See file CREDITS for list of people who contributed to this
25 * This program is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU General Public License as
27 * published by the Free Software Foundation; either version 2 of
28 * the License, or (at your option) any later version.
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
42 #include <asm/proc-armv/ptrace.h>
46 static ulong timer_load_val;
50 static s3c64xx_timers *s3c64xx_get_base_timers(void)
52 return (s3c64xx_timers *)ELFIN_TIMER_BASE;
55 /* macro to read the 16 bit timer */
56 static inline ulong read_timer(void)
58 s3c64xx_timers *const timers = s3c64xx_get_base_timers();
60 return timers->TCNTO4;
63 /* Internal tick units */
64 /* Last decremneter snapshot */
65 static unsigned long lastdec;
66 /* Monotonic incrementing timer */
67 static unsigned long long timestamp;
69 int interrupt_init(void)
71 s3c64xx_timers *const timers = s3c64xx_get_base_timers();
73 /* use PWM Timer 4 because it has no output */
75 * We use the following scheme for the timer:
76 * Prescaler is hard fixed at 167, divider at 1/4.
77 * This gives at PCLK frequency 66MHz approx. 10us ticks
78 * The timer is set to wrap after 100s, at 66MHz this obviously
79 * happens after 10,000,000 ticks. A long variable can thus
80 * keep values up to 40,000s, i.e., 11 hours. This should be
81 * enough for most uses:-) Possible optimizations: select a
82 * binary-friendly frequency, e.g., 1ms / 128. Also calculate
83 * the prescaler automatically for other PCLK frequencies.
85 timers->TCFG0 = PRESCALER << 8;
86 if (timer_load_val == 0) {
87 timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
88 timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
91 /* load value for 10 ms timeout */
92 lastdec = timers->TCNTB4 = timer_load_val;
93 /* auto load, manual update of Timer 4 */
94 timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
97 /* auto load, start Timer 4 */
98 timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
105 * timer without interrupts
109 * This function is derived from PowerPC code (read timebase as long long).
110 * On ARM it just returns the timer value.
112 unsigned long long get_ticks(void)
114 ulong now = read_timer();
116 if (lastdec >= now) {
118 timestamp += lastdec - now;
120 /* we have an overflow ... */
121 timestamp += lastdec + timer_load_val - now;
129 * This function is derived from PowerPC code (timebase clock frequency).
130 * On ARM it returns the number of timer ticks per second.
132 ulong get_tbclk(void)
134 /* We overrun in 100s */
135 return (ulong)(timer_load_val / 100);
138 void reset_timer_masked(void)
141 lastdec = read_timer();
145 void reset_timer(void)
147 reset_timer_masked();
150 ulong get_timer_masked(void)
152 unsigned long long res = get_ticks();
153 do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
157 ulong get_timer(ulong base)
159 return get_timer_masked() - base;
162 void set_timer(ulong t)
164 timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
167 void udelay(unsigned long usec)
169 unsigned long long tmp;
172 tmo = (usec + 9) / 10;
173 tmp = get_ticks() + tmo; /* get current timestamp */
175 while (get_ticks() < tmp)/* loop till event */