1 /* SPDX-License-Identifier: GPL-2.0+ */
11 enum stm32_gpio_mode {
12 STM32_GPIO_MODE_IN = 0,
18 enum stm32_gpio_otype {
19 STM32_GPIO_OTYPE_PP = 0,
23 enum stm32_gpio_speed {
24 STM32_GPIO_SPEED_2M = 0,
30 enum stm32_gpio_pupd {
31 STM32_GPIO_PUPD_NO = 0,
55 struct stm32_gpio_dsc {
60 struct stm32_gpio_ctl {
61 enum stm32_gpio_mode mode;
62 enum stm32_gpio_otype otype;
63 enum stm32_gpio_speed speed;
64 enum stm32_gpio_pupd pupd;
65 enum stm32_gpio_af af;
68 struct stm32_gpio_regs {
69 u32 moder; /* GPIO port mode */
70 u32 otyper; /* GPIO port output type */
71 u32 ospeedr; /* GPIO port output speed */
72 u32 pupdr; /* GPIO port pull-up/pull-down */
73 u32 idr; /* GPIO port input data */
74 u32 odr; /* GPIO port output data */
75 u32 bsrr; /* GPIO port bit set/reset */
76 u32 lckr; /* GPIO port configuration lock */
77 u32 afr[2]; /* GPIO alternate function */
80 struct stm32_gpio_priv {
81 struct stm32_gpio_regs *regs;
82 unsigned int gpio_range;
85 int stm32_offset_to_index(struct udevice *dev, unsigned int offset);
87 #endif /* _STM32_GPIO_H_ */