1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399.dtsi"
11 #include "rk3399-opp.dtsi"
14 model = "Pine64 RockPro64";
15 compatible = "pine64,rockpro64", "rockchip,rk3399";
18 stdout-path = "serial2:1500000n8";
21 clkin_gmac: external-gmac-clock {
22 compatible = "fixed-clock";
23 clock-frequency = <125000000>;
24 clock-output-names = "clkin_gmac";
29 compatible = "gpio-keys";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pwrbtn>;
35 debounce-interval = <100>;
36 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
37 label = "GPIO Key Power";
38 linux,code = <KEY_POWER>;
44 compatible = "gpio-leds";
45 pinctrl-names = "default";
46 pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
51 gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
56 default-state = "off";
57 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
62 compatible = "pwm-fan";
64 fan-supply = <&vcc12v_dcin>;
65 pwms = <&pwm1 0 50000 0>;
68 sdio_pwrseq: sdio-pwrseq {
69 compatible = "mmc-pwrseq-simple";
71 clock-names = "ext_clock";
72 pinctrl-names = "default";
73 pinctrl-0 = <&wifi_enable_h>;
76 * On the module itself this is one of these (depending
77 * on the actual card populated):
78 * - SDIO_RESET_L_WL_REG_ON
79 * - PDN (power down when low)
81 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
84 vcc12v_dcin: vcc12v-dcin {
85 compatible = "regulator-fixed";
86 regulator-name = "vcc12v_dcin";
89 regulator-min-microvolt = <12000000>;
90 regulator-max-microvolt = <12000000>;
93 /* switched by pmic_sleep */
94 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
95 compatible = "regulator-fixed";
96 regulator-name = "vcc1v8_s3";
99 regulator-min-microvolt = <1800000>;
100 regulator-max-microvolt = <1800000>;
101 vin-supply = <&vcc_1v8>;
104 vcc3v3_pcie: vcc3v3-pcie-regulator {
105 compatible = "regulator-fixed";
107 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
108 pinctrl-names = "default";
109 pinctrl-0 = <&pcie_pwr_en>;
110 regulator-name = "vcc3v3_pcie";
113 vin-supply = <&vcc12v_dcin>;
116 vcc3v3_sys: vcc3v3-sys {
117 compatible = "regulator-fixed";
118 regulator-name = "vcc3v3_sys";
121 regulator-min-microvolt = <3300000>;
122 regulator-max-microvolt = <3300000>;
123 vin-supply = <&vcc5v0_sys>;
126 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
127 vcc5v0_host: vcc5v0-host-regulator {
128 compatible = "regulator-fixed";
130 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&vcc5v0_host_en>;
133 regulator-name = "vcc5v0_host";
135 vin-supply = <&vcc5v0_usb>;
138 vcc5v0_typec: vcc5v0-typec-regulator {
139 compatible = "regulator-fixed";
141 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&vcc5v0_typec_en>;
144 regulator-name = "vcc5v0_typec";
146 vin-supply = <&vcc5v0_usb>;
149 vcc5v0_sys: vcc5v0-sys {
150 compatible = "regulator-fixed";
151 regulator-name = "vcc5v0_sys";
154 regulator-min-microvolt = <5000000>;
155 regulator-max-microvolt = <5000000>;
156 vin-supply = <&vcc12v_dcin>;
159 vcc5v0_usb: vcc5v0-usb {
160 compatible = "regulator-fixed";
161 regulator-name = "vcc5v0_usb";
164 regulator-min-microvolt = <5000000>;
165 regulator-max-microvolt = <5000000>;
166 vin-supply = <&vcc12v_dcin>;
170 compatible = "pwm-regulator";
171 pwms = <&pwm2 0 25000 1>;
172 regulator-name = "vdd_log";
175 regulator-min-microvolt = <800000>;
176 regulator-max-microvolt = <1700000>;
177 vin-supply = <&vcc5v0_sys>;
182 cpu-supply = <&vdd_cpu_l>;
186 cpu-supply = <&vdd_cpu_l>;
190 cpu-supply = <&vdd_cpu_l>;
194 cpu-supply = <&vdd_cpu_l>;
198 cpu-supply = <&vdd_cpu_b>;
202 cpu-supply = <&vdd_cpu_b>;
210 assigned-clocks = <&cru SCLK_RMII_SRC>;
211 assigned-clock-parents = <&clkin_gmac>;
212 clock_in_out = "input";
213 phy-supply = <&vcc_lan>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&rgmii_pins>;
217 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
218 snps,reset-active-low;
219 snps,reset-delays-us = <0 10000 50000>;
226 ddc-i2c-bus = <&i2c3>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&hdmi_cec>;
237 mali-supply = <&vdd_gpu>;
242 clock-frequency = <400000>;
243 i2c-scl-rising-time-ns = <168>;
244 i2c-scl-falling-time-ns = <4>;
248 compatible = "rockchip,rk808";
250 interrupt-parent = <&gpio3>;
251 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
253 clock-output-names = "xin32k", "rk808-clkout2";
254 pinctrl-names = "default";
255 pinctrl-0 = <&pmic_int_l>;
256 rockchip,system-power-controller;
259 vcc1-supply = <&vcc5v0_sys>;
260 vcc2-supply = <&vcc5v0_sys>;
261 vcc3-supply = <&vcc5v0_sys>;
262 vcc4-supply = <&vcc5v0_sys>;
263 vcc6-supply = <&vcc5v0_sys>;
264 vcc7-supply = <&vcc5v0_sys>;
265 vcc8-supply = <&vcc3v3_sys>;
266 vcc9-supply = <&vcc5v0_sys>;
267 vcc10-supply = <&vcc5v0_sys>;
268 vcc11-supply = <&vcc5v0_sys>;
269 vcc12-supply = <&vcc3v3_sys>;
270 vddio-supply = <&vcca_1v8>;
273 vdd_center: DCDC_REG1 {
274 regulator-name = "vdd_center";
277 regulator-min-microvolt = <750000>;
278 regulator-max-microvolt = <1350000>;
279 regulator-ramp-delay = <6001>;
280 regulator-state-mem {
281 regulator-off-in-suspend;
285 vdd_cpu_l: DCDC_REG2 {
286 regulator-name = "vdd_cpu_l";
289 regulator-min-microvolt = <750000>;
290 regulator-max-microvolt = <1350000>;
291 regulator-ramp-delay = <6001>;
292 regulator-state-mem {
293 regulator-off-in-suspend;
298 regulator-name = "vcc_ddr";
301 regulator-state-mem {
302 regulator-on-in-suspend;
307 regulator-name = "vcc_1v8";
310 regulator-min-microvolt = <1800000>;
311 regulator-max-microvolt = <1800000>;
312 regulator-state-mem {
313 regulator-on-in-suspend;
314 regulator-suspend-microvolt = <1800000>;
318 vcc1v8_dvp: LDO_REG1 {
319 regulator-name = "vcc1v8_dvp";
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <1800000>;
324 regulator-state-mem {
325 regulator-off-in-suspend;
329 vcc3v0_touch: LDO_REG2 {
330 regulator-name = "vcc3v0_touch";
333 regulator-min-microvolt = <3000000>;
334 regulator-max-microvolt = <3000000>;
335 regulator-state-mem {
336 regulator-off-in-suspend;
341 regulator-name = "vcca_1v8";
344 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <1800000>;
346 regulator-state-mem {
347 regulator-on-in-suspend;
348 regulator-suspend-microvolt = <1800000>;
353 regulator-name = "vcc_sdio";
356 regulator-min-microvolt = <1800000>;
357 regulator-max-microvolt = <3000000>;
358 regulator-state-mem {
359 regulator-on-in-suspend;
360 regulator-suspend-microvolt = <3000000>;
364 vcca3v0_codec: LDO_REG5 {
365 regulator-name = "vcca3v0_codec";
368 regulator-min-microvolt = <3000000>;
369 regulator-max-microvolt = <3000000>;
370 regulator-state-mem {
371 regulator-off-in-suspend;
376 regulator-name = "vcc_1v5";
379 regulator-min-microvolt = <1500000>;
380 regulator-max-microvolt = <1500000>;
381 regulator-state-mem {
382 regulator-on-in-suspend;
383 regulator-suspend-microvolt = <1500000>;
387 vcca1v8_codec: LDO_REG7 {
388 regulator-name = "vcca1v8_codec";
391 regulator-min-microvolt = <1800000>;
392 regulator-max-microvolt = <1800000>;
393 regulator-state-mem {
394 regulator-off-in-suspend;
399 regulator-name = "vcc_3v0";
402 regulator-min-microvolt = <3000000>;
403 regulator-max-microvolt = <3000000>;
404 regulator-state-mem {
405 regulator-on-in-suspend;
406 regulator-suspend-microvolt = <3000000>;
410 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
411 regulator-name = "vcc3v3_s3";
414 regulator-state-mem {
415 regulator-off-in-suspend;
419 vcc3v3_s0: SWITCH_REG2 {
420 regulator-name = "vcc3v3_s0";
423 regulator-state-mem {
424 regulator-off-in-suspend;
430 vdd_cpu_b: regulator@40 {
431 compatible = "silergy,syr827";
433 fcs,suspend-voltage-selector = <1>;
434 pinctrl-names = "default";
435 pinctrl-0 = <&vsel1_gpio>;
436 regulator-name = "vdd_cpu_b";
437 regulator-min-microvolt = <712500>;
438 regulator-max-microvolt = <1500000>;
439 regulator-ramp-delay = <1000>;
442 vin-supply = <&vcc5v0_sys>;
444 regulator-state-mem {
445 regulator-off-in-suspend;
449 vdd_gpu: regulator@41 {
450 compatible = "silergy,syr828";
452 fcs,suspend-voltage-selector = <1>;
453 pinctrl-names = "default";
454 pinctrl-0 = <&vsel2_gpio>;
455 regulator-name = "vdd_gpu";
456 regulator-min-microvolt = <712500>;
457 regulator-max-microvolt = <1500000>;
458 regulator-ramp-delay = <1000>;
461 vin-supply = <&vcc5v0_sys>;
463 regulator-state-mem {
464 regulator-off-in-suspend;
470 i2c-scl-rising-time-ns = <300>;
471 i2c-scl-falling-time-ns = <15>;
476 i2c-scl-rising-time-ns = <450>;
477 i2c-scl-falling-time-ns = <15>;
482 i2c-scl-rising-time-ns = <600>;
483 i2c-scl-falling-time-ns = <20>;
486 fusb0: typec-portc@22 {
487 compatible = "fcs,fusb302";
489 interrupt-parent = <&gpio1>;
490 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
491 pinctrl-names = "default";
492 pinctrl-0 = <&fusb0_int>;
493 vbus-supply = <&vcc5v0_typec>;
499 rockchip,playback-channels = <8>;
500 rockchip,capture-channels = <8>;
505 rockchip,playback-channels = <2>;
506 rockchip,capture-channels = <2>;
517 bt656-supply = <&vcc1v8_dvp>;
518 audio-supply = <&vcc_3v0>;
519 sdmmc-supply = <&vcc_sdio>;
520 gpio1830-supply = <&vcc_3v0>;
524 ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&pcie_perst>;
528 vpcie12v-supply = <&vcc12v_dcin>;
529 vpcie3v3-supply = <&vcc3v3_pcie>;
538 pmu1830-supply = <&vcc_3v0>;
545 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
550 fusb0_int: fusb0-int {
551 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
556 work_led_gpio: work_led-gpio {
557 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
560 diy_led_gpio: diy_led-gpio {
561 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
566 pcie_perst: pcie-perst {
567 rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
570 pcie_pwr_en: pcie-pwr-en {
571 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
576 pmic_int_l: pmic-int-l {
577 rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
580 vsel1_gpio: vsel1-gpio {
581 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
584 vsel2_gpio: vsel2-gpio {
585 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
590 wifi_enable_h: wifi-enable-h {
591 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
596 vcc5v0_typec_en: vcc5v0_typec_en {
597 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
602 vcc5v0_host_en: vcc5v0-host-en {
603 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
621 vref-supply = <&vcca1v8_s3>;
628 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
630 max-frequency = <150000000>;
631 pinctrl-names = "default";
632 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
647 compatible = "jedec,spi-nor";
649 spi-max-frequency = <10000000>;
662 /* tshut mode 0:CRU 1:GPIO */
663 rockchip,hw-tshut-mode = <1>;
664 /* tshut polarity 0:LOW 1:HIGH */
665 rockchip,hw-tshut-polarity = <1>;
672 u2phy0_otg: otg-port {
676 u2phy0_host: host-port {
677 phy-supply = <&vcc5v0_host>;
685 u2phy1_otg: otg-port {
689 u2phy1_host: host-port {
690 phy-supply = <&vcc5v0_host>;
696 pinctrl-names = "default";
697 pinctrl-0 = <&uart0_xfer &uart0_cts>;