4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/gxbb.h>
11 #include <asm/arch/sm.h>
14 #define EFUSE_SN_OFFSET 20
15 #define EFUSE_SN_SIZE 16
16 #define EFUSE_MAC_OFFSET 52
17 #define EFUSE_MAC_SIZE 6
26 u8 mac_addr[EFUSE_MAC_SIZE];
27 char serial[EFUSE_SN_SIZE];
31 setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
32 GXBB_ETH_REG_0_TX_PHASE(1) |
33 GXBB_ETH_REG_0_TX_RATIO(4) |
34 GXBB_ETH_REG_0_PHY_CLK_EN |
35 GXBB_ETH_REG_0_CLK_EN);
37 /* Enable power and clock gate */
38 setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
39 setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
40 clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
42 /* Reset PHY on GPIOZ_14 */
43 clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
44 clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
46 setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
48 if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
49 len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
50 mac_addr, EFUSE_MAC_SIZE);
51 if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
52 eth_env_set_enetaddr("ethaddr", mac_addr);
55 if (!env_get("serial#")) {
56 len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
58 if (len == EFUSE_SN_SIZE)
59 env_set("serial#", serial);