cpu/arm926ejs/davinci/ether.c

   1 /*
   2  * Ethernet driver for TI TMS320DM644x (DaVinci) chips.
   3  *
   4  * Copyright (C) 2007 Sergey Kubushyn <[email protected]>
   5  *
   6  * Parts shamelessly stolen from TI's dm644x_emac.c. Original copyright
   7  * follows:
   8  *
   9  * ----------------------------------------------------------------------------
  10  *
  11  * dm644x_emac.c
  12  *
  13  * TI DaVinci (DM644X) EMAC peripheral driver source for DV-EVM
  14  *
  15  * Copyright (C) 2005 Texas Instruments.
  16  *
  17  * ----------------------------------------------------------------------------
  18  *
  19  * This program is free software; you can redistribute it and/or modify
  20  * it under the terms of the GNU General Public License as published by
  21  * the Free Software Foundation; either version 2 of the License, or
  22  * (at your option) any later version.
  23  *
  24  * This program is distributed in the hope that it will be useful,
  25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27  * GNU General Public License for more details.
  28  *
  29  *  You should have received a copy of the GNU General Public License
  30  *  along with this program; if not, write to the Free Software
  31  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  32  * ----------------------------------------------------------------------------
  33
  34  * Modifications:
  35  * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot.
  36  * ver  1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors
  37  *
  38  */
  39 #include <common.h>
  40 #include <command.h>
  41 #include <net.h>
  42 #include <miiphy.h>
  43 #include <asm/arch/emac_defs.h>
  44
  45 #ifdef CONFIG_DRIVER_TI_EMAC
  46
  47 #ifdef CONFIG_CMD_NET
  48
  49 unsigned int    emac_dbg = 0;
  50 #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args)
  51
  52 /* Internal static functions */
  53 static int dm644x_eth_hw_init (void);
  54 static int dm644x_eth_open (void);
  55 static int dm644x_eth_close (void);
  56 static int dm644x_eth_send_packet (volatile void *packet, int length);
  57 static int dm644x_eth_rcv_packet (void);
  58 static void dm644x_eth_mdio_enable(void);
  59
  60 static int gen_init_phy(int phy_addr);
  61 static int gen_is_phy_connected(int phy_addr);
  62 static int gen_get_link_speed(int phy_addr);
  63 static int gen_auto_negotiate(int phy_addr);
  64
  65 /* Wrappers exported to the U-Boot proper */
  66 int eth_hw_init(void)
  67 {
  68         return(dm644x_eth_hw_init());
  69 }
  70
  71 int eth_init(bd_t * bd)
  72 {
  73         return(dm644x_eth_open());
  74 }
  75
  76 void eth_halt(void)
  77 {
  78         dm644x_eth_close();
  79 }
  80
  81 int eth_send(volatile void *packet, int length)
  82 {
  83         return(dm644x_eth_send_packet(packet, length));
  84 }
  85
  86 int eth_rx(void)
  87 {
  88         return(dm644x_eth_rcv_packet());
  89 }
  90
  91 void eth_mdio_enable(void)
  92 {
  93         dm644x_eth_mdio_enable();
  94 }
  95 /* End of wrappers */
  96
  97
  98 static u_int8_t dm644x_eth_mac_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
  99
 100 /*
 101  * This function must be called before emac_open() if you want to override
 102  * the default mac address.
 103  */
 104 void dm644x_eth_set_mac_addr(const u_int8_t *addr)
 105 {
 106         int i;
 107
 108         for (i = 0; i < sizeof (dm644x_eth_mac_addr); i++) {
 109                 dm644x_eth_mac_addr[i] = addr[i];
 110         }
 111 }
 112
 113 /* EMAC Addresses */
 114 static volatile emac_regs       *adap_emac = (emac_regs *)EMAC_BASE_ADDR;
 115 static volatile ewrap_regs      *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR;
 116 static volatile mdio_regs       *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR;
 117
 118 /* EMAC descriptors */
 119 static volatile emac_desc       *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE);
 120 static volatile emac_desc       *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE);
 121 static volatile emac_desc       *emac_rx_active_head = 0;
 122 static volatile emac_desc       *emac_rx_active_tail = 0;
 123 static int                      emac_rx_queue_active = 0;
 124
 125 /* Receive packet buffers */
 126 static unsigned char            emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
 127
 128 /* PHY address for a discovered PHY (0xff - not found) */
 129 static volatile u_int8_t        active_phy_addr = 0xff;
 130
 131 phy_t                           phy;
 132
 133 static void dm644x_eth_mdio_enable(void)
 134 {
 135         u_int32_t       clkdiv;
 136
 137         clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
 138
 139         adap_mdio->CONTROL = (clkdiv & 0xff) |
 140                 MDIO_CONTROL_ENABLE |
 141                 MDIO_CONTROL_FAULT |
 142                 MDIO_CONTROL_FAULT_ENABLE;
 143
 144         while (adap_mdio->CONTROL & MDIO_CONTROL_IDLE) {;}
 145 }
 146
 147 /*
 148  * Tries to find an active connected PHY. Returns 1 if address if found.
 149  * If no active PHY (or more than one PHY) found returns 0.
 150  * Sets active_phy_addr variable.
 151  */
 152 static int dm644x_eth_phy_detect(void)
 153 {
 154         u_int32_t       phy_act_state;
 155         int             i;
 156
 157         active_phy_addr = 0xff;
 158
 159         if ((phy_act_state = adap_mdio->ALIVE) == 0)
 160                 return(0);                              /* No active PHYs */
 161
 162         debug_emac("dm644x_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state);
 163
 164         for (i = 0; i < 32; i++) {
 165                 if (phy_act_state & (1 << i)) {
 166                         if (phy_act_state & ~(1 << i))
 167                                 return(0);              /* More than one PHY */
 168                         else {
 169                                 active_phy_addr = i;
 170                                 return(1);
 171                         }
 172                 }
 173         }
 174
 175         return(0);      /* Just to make GCC happy */
 176 }
 177
 178
 179 /* Read a PHY register via MDIO inteface. Returns 1 on success, 0 otherwise */
 180 int dm644x_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data)
 181 {
 182         int     tmp;
 183
 184         while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
 185
 186         adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO |
 187                                 MDIO_USERACCESS0_WRITE_READ |
 188                                 ((reg_num & 0x1f) << 21) |
 189                                 ((phy_addr & 0x1f) << 16);
 190
 191         /* Wait for command to complete */
 192         while ((tmp = adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) {;}
 193
 194         if (tmp & MDIO_USERACCESS0_ACK) {
 195                 *data = tmp & 0xffff;
 196                 return(1);
 197         }
 198
 199         *data = -1;
 200         return(0);
 201 }
 202
 203 /* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */
 204 int dm644x_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data)
 205 {
 206
 207         while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
 208
 209         adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO |
 210                                 MDIO_USERACCESS0_WRITE_WRITE |
 211                                 ((reg_num & 0x1f) << 21) |
 212                                 ((phy_addr & 0x1f) << 16) |
 213                                 (data & 0xffff);
 214
 215         /* Wait for command to complete */
 216         while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
 217
 218         return(1);
 219 }
 220
 221 /* PHY functions for a generic PHY */
 222 static int gen_init_phy(int phy_addr)
 223 {
 224         int     ret = 1;
 225
 226         if (gen_get_link_speed(phy_addr)) {
 227                 /* Try another time */
 228                 ret = gen_get_link_speed(phy_addr);
 229         }
 230
 231         return(ret);
 232 }
 233
 234 static int gen_is_phy_connected(int phy_addr)
 235 {
 236         u_int16_t       dummy;
 237
 238         return(dm644x_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy));
 239 }
 240
 241 static int gen_get_link_speed(int phy_addr)
 242 {
 243         u_int16_t       tmp;
 244
 245         if (dm644x_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) && (tmp & 0x04))
 246                 return(1);
 247
 248         return(0);
 249 }
 250
 251 static int gen_auto_negotiate(int phy_addr)
 252 {
 253         u_int16_t       tmp;
 254
 255         if (!dm644x_eth_phy_read(phy_addr, PHY_BMCR, &tmp))
 256                 return(0);
 257
 258         /* Restart Auto_negotiation  */
 259         tmp |= PHY_BMCR_AUTON;
 260         dm644x_eth_phy_write(phy_addr, PHY_BMCR, tmp);
 261
 262         /*check AutoNegotiate complete */
 263         udelay (10000);
 264         if (!dm644x_eth_phy_read(phy_addr, PHY_BMSR, &tmp))
 265                 return(0);
 266
 267         if (!(tmp & PHY_BMSR_AUTN_COMP))
 268                 return(0);
 269
 270         return(gen_get_link_speed(phy_addr));
 271 }
 272 /* End of generic PHY functions */
 273
 274
 275 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
 276 static int dm644x_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
 277 {
 278         return(dm644x_eth_phy_read(addr, reg, value) ? 0 : 1);
 279 }
 280
 281 static int dm644x_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value)
 282 {
 283         return(dm644x_eth_phy_write(addr, reg, value) ? 0 : 1);
 284 }
 285
 286 int dm644x_eth_miiphy_initialize(bd_t *bis)
 287 {
 288         miiphy_register(phy.name, dm644x_mii_phy_read, dm644x_mii_phy_write);
 289
 290         return(1);
 291 }
 292 #endif
 293
 294 /*
 295  * This function initializes the emac hardware. It does NOT initialize
 296  * EMAC modules power or pin multiplexors, that is done by board_init()
 297  * much earlier in bootup process. Returns 1 on success, 0 otherwise.
 298  */
 299 static int dm644x_eth_hw_init(void)
 300 {
 301         u_int32_t       phy_id;
 302         u_int16_t       tmp;
 303         int             i;
 304
 305         dm644x_eth_mdio_enable();
 306
 307         for (i = 0; i < 256; i++) {
 308                 if (adap_mdio->ALIVE)
 309                         break;
 310                 udelay(10);
 311         }
 312
 313         if (i >= 256) {
 314                 printf("No ETH PHY detected!!!\n");
 315                 return(0);
 316         }
 317
 318         /* Find if a PHY is connected and get it's address */
 319         if (!dm644x_eth_phy_detect())
 320                 return(0);
 321
 322         /* Get PHY ID and initialize phy_ops for a detected PHY */
 323         if (!dm644x_eth_phy_read(active_phy_addr, PHY_PHYIDR1, &tmp)) {
 324                 active_phy_addr = 0xff;
 325                 return(0);
 326         }
 327
 328         phy_id = (tmp << 16) & 0xffff0000;
 329
 330         if (!dm644x_eth_phy_read(active_phy_addr, PHY_PHYIDR2, &tmp)) {
 331                 active_phy_addr = 0xff;
 332                 return(0);
 333         }
 334
 335         phy_id |= tmp & 0x0000ffff;
 336
 337         switch (phy_id) {
 338                 case PHY_LXT972:
 339                         sprintf(phy.name, "LXT972 @ 0x%02x", active_phy_addr);
 340                         phy.init = lxt972_init_phy;
 341                         phy.is_phy_connected = lxt972_is_phy_connected;
 342                         phy.get_link_speed = lxt972_get_link_speed;
 343                         phy.auto_negotiate = lxt972_auto_negotiate;
 344                         break;
 345                 case PHY_DP83848:
 346                         sprintf(phy.name, "DP83848 @ 0x%02x", active_phy_addr);
 347                         phy.init = dp83848_init_phy;
 348                         phy.is_phy_connected = dp83848_is_phy_connected;
 349                         phy.get_link_speed = dp83848_get_link_speed;
 350                         phy.auto_negotiate = dp83848_auto_negotiate;
 351                         break;
 352                 default:
 353                         sprintf(phy.name, "GENERIC @ 0x%02x", active_phy_addr);
 354                         phy.init = gen_init_phy;
 355                         phy.is_phy_connected = gen_is_phy_connected;
 356                         phy.get_link_speed = gen_get_link_speed;
 357                         phy.auto_negotiate = gen_auto_negotiate;
 358         }
 359
 360         return(1);
 361 }
 362
 363
 364 /* Eth device open */
 365 static int dm644x_eth_open(void)
 366 {
 367         dv_reg_p                addr;
 368         u_int32_t               clkdiv, cnt;
 369         volatile emac_desc      *rx_desc;
 370
 371         debug_emac("+ emac_open\n");
 372
 373         /* Reset EMAC module and disable interrupts in wrapper */
 374         adap_emac->SOFTRESET = 1;
 375         while (adap_emac->SOFTRESET != 0) {;}
 376         adap_ewrap->EWCTL = 0;
 377         for (cnt = 0; cnt < 5; cnt++) {
 378                 clkdiv = adap_ewrap->EWCTL;
 379         }
 380
 381         rx_desc = emac_rx_desc;
 382
 383         adap_emac->TXCONTROL = 0x01;
 384         adap_emac->RXCONTROL = 0x01;
 385
 386         /* Set MAC Addresses & Init multicast Hash to 0 (disable any multicast receive) */
 387         /* Using channel 0 only - other channels are disabled */
 388         adap_emac->MACINDEX = 0;
 389         adap_emac->MACADDRHI =
 390                 (dm644x_eth_mac_addr[3] << 24) |
 391                 (dm644x_eth_mac_addr[2] << 16) |
 392                 (dm644x_eth_mac_addr[1] << 8)  |
 393                 (dm644x_eth_mac_addr[0]);
 394         adap_emac->MACADDRLO =
 395                 (dm644x_eth_mac_addr[5] << 8) |
 396                 (dm644x_eth_mac_addr[4]);
 397
 398         adap_emac->MACHASH1 = 0;
 399         adap_emac->MACHASH2 = 0;
 400
 401         /* Set source MAC address - REQUIRED */
 402         adap_emac->MACSRCADDRHI =
 403                 (dm644x_eth_mac_addr[3] << 24) |
 404                 (dm644x_eth_mac_addr[2] << 16) |
 405                 (dm644x_eth_mac_addr[1] << 8)  |
 406                 (dm644x_eth_mac_addr[0]);
 407         adap_emac->MACSRCADDRLO =
 408                 (dm644x_eth_mac_addr[4] << 8) |
 409                 (dm644x_eth_mac_addr[5]);
 410
 411         /* Set DMA 8 TX / 8 RX Head pointers to 0 */
 412         addr = &adap_emac->TX0HDP;
 413         for(cnt = 0; cnt < 16; cnt++)
 414                 *addr++ = 0;
 415
 416         addr = &adap_emac->RX0HDP;
 417         for(cnt = 0; cnt < 16; cnt++)
 418                 *addr++ = 0;
 419
 420         /* Clear Statistics (do this before setting MacControl register) */
 421         addr = &adap_emac->RXGOODFRAMES;
 422         for(cnt = 0; cnt < EMAC_NUM_STATS; cnt++)
 423                 *addr++ = 0;
 424
 425         /* No multicast addressing */
 426         adap_emac->MACHASH1 = 0;
 427         adap_emac->MACHASH2 = 0;
 428
 429         /* Create RX queue and set receive process in place */
 430         emac_rx_active_head = emac_rx_desc;
 431         for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) {
 432                 rx_desc->next = (u_int32_t)(rx_desc + 1);
 433                 rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
 434                 rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
 435                 rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
 436                 rx_desc++;
 437         }
 438
 439         /* Set the last descriptor's "next" parameter to 0 to end the RX desc list */
 440         rx_desc--;
 441         rx_desc->next = 0;
 442         emac_rx_active_tail = rx_desc;
 443         emac_rx_queue_active = 1;
 444
 445         /* Enable TX/RX */
 446         adap_emac->RXMAXLEN = EMAC_MAX_ETHERNET_PKT_SIZE;
 447         adap_emac->RXBUFFEROFFSET = 0;
 448
 449         /* No fancy configs - Use this for promiscous for debug - EMAC_RXMBPENABLE_RXCAFEN_ENABLE */
 450         adap_emac->RXMBPENABLE = EMAC_RXMBPENABLE_RXBROADEN;
 451
 452         /* Enable ch 0 only */
 453         adap_emac->RXUNICASTSET = 0x01;
 454
 455         /* Enable MII interface and Full duplex mode */
 456         adap_emac->MACCONTROL = (EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE);
 457
 458         /* Init MDIO & get link state */
 459         clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
 460         adap_mdio->CONTROL = ((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT);
 461
 462         if (!phy.get_link_speed(active_phy_addr))
 463                 return(0);
 464
 465         /* Start receive process */
 466         adap_emac->RX0HDP = (u_int32_t)emac_rx_desc;
 467
 468         debug_emac("- emac_open\n");
 469
 470         return(1);
 471 }
 472
 473 /* EMAC Channel Teardown */
 474 static void dm644x_eth_ch_teardown(int ch)
 475 {
 476         dv_reg          dly = 0xff;
 477         dv_reg          cnt;
 478
 479         debug_emac("+ emac_ch_teardown\n");
 480
 481         if (ch == EMAC_CH_TX) {
 482                 /* Init TX channel teardown */
 483                 adap_emac->TXTEARDOWN = 1;
 484                 for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->TX0CP) {
 485                         /* Wait here for Tx teardown completion interrupt to occur
 486                          * Note: A task delay can be called here to pend rather than
 487                          * occupying CPU cycles - anyway it has been found that teardown
 488                          * takes very few cpu cycles and does not affect functionality */
 489                          dly--;
 490                          udelay(1);
 491                          if (dly == 0)
 492                                 break;
 493                 }
 494                 adap_emac->TX0CP = cnt;
 495                 adap_emac->TX0HDP = 0;
 496         } else {
 497                 /* Init RX channel teardown */
 498                 adap_emac->RXTEARDOWN = 1;
 499                 for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->RX0CP) {
 500                         /* Wait here for Rx teardown completion interrupt to occur
 501                          * Note: A task delay can be called here to pend rather than
 502                          * occupying CPU cycles - anyway it has been found that teardown
 503                          * takes very few cpu cycles and does not affect functionality */
 504                          dly--;
 505                          udelay(1);
 506                          if (dly == 0)
 507                                 break;
 508                 }
 509                 adap_emac->RX0CP = cnt;
 510                 adap_emac->RX0HDP = 0;
 511         }
 512
 513         debug_emac("- emac_ch_teardown\n");
 514 }
 515
 516 /* Eth device close */
 517 static int dm644x_eth_close(void)
 518 {
 519         debug_emac("+ emac_close\n");
 520
 521         dm644x_eth_ch_teardown(EMAC_CH_TX);     /* TX Channel teardown */
 522         dm644x_eth_ch_teardown(EMAC_CH_RX);     /* RX Channel teardown */
 523
 524         /* Reset EMAC module and disable interrupts in wrapper */
 525         adap_emac->SOFTRESET = 1;
 526         adap_ewrap->EWCTL = 0;
 527
 528         debug_emac("- emac_close\n");
 529         return(1);
 530 }
 531
 532 static int tx_send_loop = 0;
 533
 534 /*
 535  * This function sends a single packet on the network and returns
 536  * positive number (number of bytes transmitted) or negative for error
 537  */
 538 static int dm644x_eth_send_packet (volatile void *packet, int length)
 539 {
 540         int ret_status = -1;
 541
 542         tx_send_loop = 0;
 543
 544         /* Return error if no link */
 545         if (!phy.get_link_speed (active_phy_addr)) {
 546                 printf ("WARN: emac_send_packet: No link\n");
 547                 return (ret_status);
 548         }
 549
 550         /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
 551         if (length < EMAC_MIN_ETHERNET_PKT_SIZE) {
 552                 length = EMAC_MIN_ETHERNET_PKT_SIZE;
 553         }
 554
 555         /* Populate the TX descriptor */
 556         emac_tx_desc->next = 0;
 557         emac_tx_desc->buffer = (u_int8_t *) packet;
 558         emac_tx_desc->buff_off_len = (length & 0xffff);
 559         emac_tx_desc->pkt_flag_len = ((length & 0xffff) |
 560                                       EMAC_CPPI_SOP_BIT |
 561                                       EMAC_CPPI_OWNERSHIP_BIT |
 562                                       EMAC_CPPI_EOP_BIT);
 563         /* Send the packet */
 564         adap_emac->TX0HDP = (unsigned int) emac_tx_desc;
 565
 566         /* Wait for packet to complete or link down */
 567         while (1) {
 568                 if (!phy.get_link_speed (active_phy_addr)) {
 569                         dm644x_eth_ch_teardown (EMAC_CH_TX);
 570                         return (ret_status);
 571                 }
 572                 if (adap_emac->TXINTSTATRAW & 0x01) {
 573                         ret_status = length;
 574                         break;
 575                 }
 576                 tx_send_loop++;
 577         }
 578
 579         return (ret_status);
 580 }
 581
 582 /*
 583  * This function handles receipt of a packet from the network
 584  */
 585 static int dm644x_eth_rcv_packet (void)
 586 {
 587         volatile emac_desc *rx_curr_desc;
 588         volatile emac_desc *curr_desc;
 589         volatile emac_desc *tail_desc;
 590         int status, ret = -1;
 591
 592         rx_curr_desc = emac_rx_active_head;
 593         status = rx_curr_desc->pkt_flag_len;
 594         if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) {
 595                 if (status & EMAC_CPPI_RX_ERROR_FRAME) {
 596                         /* Error in packet - discard it and requeue desc */
 597                         printf ("WARN: emac_rcv_pkt: Error in packet\n");
 598                 } else {
 599                         NetReceive (rx_curr_desc->buffer,
 600                                     (rx_curr_desc->buff_off_len & 0xffff));
 601                         ret = rx_curr_desc->buff_off_len & 0xffff;
 602                 }
 603
 604                 /* Ack received packet descriptor */
 605                 adap_emac->RX0CP = (unsigned int) rx_curr_desc;
 606                 curr_desc = rx_curr_desc;
 607                 emac_rx_active_head =
 608                         (volatile emac_desc *) rx_curr_desc->next;
 609
 610                 if (status & EMAC_CPPI_EOQ_BIT) {
 611                         if (emac_rx_active_head) {
 612                                 adap_emac->RX0HDP =
 613                                         (unsigned int) emac_rx_active_head;
 614                         } else {
 615                                 emac_rx_queue_active = 0;
 616                                 printf ("INFO:emac_rcv_packet: RX Queue not active\n");
 617                         }
 618                 }
 619
 620                 /* Recycle RX descriptor */
 621                 rx_curr_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
 622                 rx_curr_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
 623                 rx_curr_desc->next = 0;
 624
 625                 if (emac_rx_active_head == 0) {
 626                         printf ("INFO: emac_rcv_pkt: active queue head = 0\n");
 627                         emac_rx_active_head = curr_desc;
 628                         emac_rx_active_tail = curr_desc;
 629                         if (emac_rx_queue_active != 0) {
 630                                 adap_emac->RX0HDP =
 631                                         (unsigned int) emac_rx_active_head;
 632                                 printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n");
 633                                 emac_rx_queue_active = 1;
 634                         }
 635                 } else {
 636                         tail_desc = emac_rx_active_tail;
 637                         emac_rx_active_tail = curr_desc;
 638                         tail_desc->next = (unsigned int) curr_desc;
 639                         status = tail_desc->pkt_flag_len;
 640                         if (status & EMAC_CPPI_EOQ_BIT) {
 641                                 adap_emac->RX0HDP = (unsigned int) curr_desc;
 642                                 status &= ~EMAC_CPPI_EOQ_BIT;
 643                                 tail_desc->pkt_flag_len = status;
 644                         }
 645                 }
 646                 return (ret);
 647         }
 648         return (0);
 649 }
 650
 651 #endif /* CONFIG_CMD_NET */
 652
 653 #endif /* CONFIG_DRIVER_TI_EMAC */