2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
5 * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __IMX6QLD_ICORE_CONFIG_H
11 #define __IMX6QLD_ICORE_CONFIG_H
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
16 /* Size of malloc() pool */
17 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
19 /* Total Size of Environment Sector */
20 #define CONFIG_ENV_SIZE SZ_128K
22 /* Allow to overwrite serial and ethaddr */
23 #define CONFIG_ENV_OVERWRITE
26 #ifndef CONFIG_ENV_IS_NOWHERE
27 /* Environment in MMC */
28 # if defined(CONFIG_ENV_IS_IN_MMC)
29 # define CONFIG_ENV_OFFSET 0x100000
30 /* Environment in NAND */
31 # elif defined(CONFIG_ENV_IS_IN_NAND)
32 # define CONFIG_ENV_OFFSET 0x400000
33 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
37 /* Default environment */
38 #define CONFIG_EXTRA_ENV_SETTINGS \
42 "fit_image=fit.itb\0" \
44 "fdt_high=0xffffffff\0" \
45 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
46 "fdt_addr=0x18000000\0" \
50 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
51 "nandroot=ubi0:rootfs rootfstype=ubifs\0" \
52 "mmcautodetect=yes\0" \
53 "mmcargs=setenv bootargs console=${console},${baudrate} " \
55 "ubiargs=setenv bootargs console=${console},${baudrate} " \
56 "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
58 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
59 "bootscript=echo Running bootscript from mmc ...; " \
61 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
62 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
63 "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
64 "fitboot=echo Booting FIT image from mmc ...; " \
66 "bootm ${loadaddr}\0" \
67 "mmcboot=echo Booting from mmc ...; " \
69 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
70 "if run loadfdt; then " \
71 "bootm ${loadaddr} - ${fdt_addr}; " \
73 "if test ${boot_fdt} = try; then " \
76 "echo WARN: Cannot load the DT; " \
82 "nandboot=echo Booting from nand ...; " \
83 "if mtdparts; then " \
84 "echo Starting nand boot ...; " \
86 "mtdparts default; " \
89 "nand read ${loadaddr} kernel 0x800000; " \
90 "nand read ${fdt_addr} dtb 0x100000; " \
91 "bootm ${loadaddr} - ${fdt_addr}\0"
93 #ifdef CONFIG_NAND_MXS
94 # define CONFIG_BOOTCOMMAND "run nandboot"
96 # define CONFIG_BOOTCOMMAND \
97 "mmc dev ${mmcdev};" \
98 "if mmc rescan; then " \
99 "if run loadbootscript; then " \
102 "if run loadfit; then " \
105 "if run loadimage; then " \
113 /* Miscellaneous configurable options */
114 #define CONFIG_SYS_MEMTEST_START 0x80000000
115 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
117 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
118 #define CONFIG_SYS_HZ 1000
120 /* Physical Memory Map */
121 #define CONFIG_NR_DRAM_BANKS 1
122 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
124 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
125 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
126 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
128 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
129 GENERATED_GBL_DATA_SIZE)
130 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
131 CONFIG_SYS_INIT_SP_OFFSET)
135 # define CONFIG_HASH_VERIFY
137 # define CONFIG_SHA256
138 # define CONFIG_IMAGE_FORMAT_LEGACY
142 #ifdef CONFIG_MXC_UART
143 # define CONFIG_MXC_UART_BASE UART4_BASE
147 #ifdef CONFIG_FSL_USDHC
148 # define CONFIG_SYS_MMC_ENV_DEV 0
149 # define CONFIG_SYS_FSL_USDHC_NUM 1
150 # define CONFIG_SYS_FSL_ESDHC_ADDR 0
154 #ifdef CONFIG_NAND_MXS
155 # define CONFIG_SYS_MAX_NAND_DEVICE 1
156 # define CONFIG_SYS_NAND_BASE 0x40000000
157 # define CONFIG_SYS_NAND_5_ADDR_CYCLE
158 # define CONFIG_SYS_NAND_ONFI_DETECTION
159 # define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
160 # define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
163 # define CONFIG_MTD_DEVICE
164 # define CONFIG_CMD_MTDPARTS
165 # define CONFIG_MTD_PARTITIONS
166 # define MTDIDS_DEFAULT "nand0=gpmi-nand"
167 # define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
168 "1m(env),8m(kernel),1m(dtb),-(rootfs)"
171 # define CONFIG_CMD_UBIFS
172 # define CONFIG_RBTREE
175 # define CONFIG_APBH_DMA
176 # define CONFIG_APBH_DMA_BURST
177 # define CONFIG_APBH_DMA_BURST8
181 #ifdef CONFIG_FEC_MXC
182 # define IMX_FEC_BASE ENET_BASE_ADDR
183 # define CONFIG_FEC_MXC_PHYADDR 0
184 # define CONFIG_FEC_XCV_TYPE RMII
185 # define CONFIG_ETHPRIME "FEC"
188 # define CONFIG_PHYLIB
189 # define CONFIG_PHY_SMSC
193 #ifdef CONFIG_VIDEO_IPUV3
194 # define CONFIG_IPUV3_CLK 260000000
195 # define CONFIG_IMX_VIDEO_SKIP
197 # define CONFIG_SPLASH_SCREEN
198 # define CONFIG_SPLASH_SCREEN_ALIGN
199 # define CONFIG_BMP_16BPP
200 # define CONFIG_VIDEO_BMP_RLE8
201 # define CONFIG_VIDEO_LOGO
202 # define CONFIG_VIDEO_BMP_LOGO
207 # ifdef CONFIG_NAND_MXS
208 # define CONFIG_SPL_NAND_SUPPORT
210 # define CONFIG_SPL_MMC_SUPPORT
213 # include "imx6_spl.h"
214 # ifdef CONFIG_SPL_BUILD
215 # undef CONFIG_DM_GPIO
216 # undef CONFIG_DM_MMC
220 #endif /* __IMX6QLD_ICORE_CONFIG_H */