1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2011 The Chromium OS Authors.
11 #define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
12 #define CONFIG_TRACE_EARLY_SIZE (16 << 20)
13 #define CONFIG_TRACE_EARLY
14 #define CONFIG_TRACE_EARLY_ADDR 0x00100000
17 #ifndef CONFIG_SPL_BUILD
18 #define CONFIG_IO_TRACE
22 #define CONFIG_SYS_TIMER_RATE 1000000
25 #define CONFIG_HOST_MAX_DEVICES 4
28 * Size of malloc() pool, before and after relocation
30 #define CONFIG_MALLOC_F_ADDR 0x0010000
31 #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
33 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
35 /* turn on command-line edit/c/auto */
37 /* SPI - enable all SPI flash types for testing purposes */
39 #define CONFIG_I2C_EDID
41 #define CONFIG_SYS_FDT_LOAD_ADDR 0x100
43 #define CONFIG_PHYSMEM
45 /* Size of our emulated memory */
46 #define SB_CONCAT(x, y) x ## y
47 #define SB_TO_UL(s) SB_CONCAT(s, UL)
48 #define CONFIG_SYS_SDRAM_BASE 0
49 #define CONFIG_SYS_SDRAM_SIZE \
50 (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20)
51 #define CONFIG_SYS_MONITOR_BASE 0
53 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
56 #define BOOT_TARGET_DEVICES(func) \
63 #include <config_distro_bootcmd.h>
66 #define CONFIG_KEEP_SERVERADDR
67 #define CONFIG_UDP_CHECKSUM
68 #define CONFIG_TIMESTAMP
69 #define CONFIG_BOOTP_SERVERIP
71 #ifndef SANDBOX_NO_SDL
72 #define CONFIG_SANDBOX_SDL
75 /* LCD and keyboard require SDL support */
76 #ifdef CONFIG_SANDBOX_SDL
77 #define LCD_BPP LCD_COLOR16
78 #define CONFIG_LCD_BMP_RLE8
80 #define CONFIG_KEYBOARD
82 #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
83 "stdout=serial,vidconsole\0" \
84 "stderr=serial,vidconsole\0"
86 #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
87 "stdout=serial,vidconsole\0" \
88 "stderr=serial,vidconsole\0"
91 #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
92 "eth2addr=00:00:11:22:33:48\0" \
93 "eth3addr=00:00:11:22:33:45\0" \
94 "eth4addr=00:00:11:22:33:48\0" \
95 "eth5addr=00:00:11:22:33:46\0" \
96 "eth6addr=00:00:11:22:33:47\0" \
99 #define MEM_LAYOUT_ENV_SETTINGS \
100 "bootm_size=0x10000000\0" \
101 "kernel_addr_r=0x1000000\0" \
102 "fdt_addr_r=0xc00000\0" \
103 "ramdisk_addr_r=0x2000000\0" \
104 "scriptaddr=0x1000\0" \
105 "pxefile_addr_r=0x2000\0"
107 #define CONFIG_EXTRA_ENV_SETTINGS \
108 SANDBOX_SERIAL_SETTINGS \
109 SANDBOX_ETH_SETTINGS \
111 MEM_LAYOUT_ENV_SETTINGS
113 #ifndef CONFIG_SPL_BUILD
114 #define CONFIG_SYS_IDE_MAXBUS 1
115 #define CONFIG_SYS_ATA_IDE0_OFFSET 0
116 #define CONFIG_SYS_IDE_MAXDEVICE 2
117 #define CONFIG_SYS_ATA_BASE_ADDR 0x100
118 #define CONFIG_SYS_ATA_DATA_OFFSET 0
119 #define CONFIG_SYS_ATA_REG_OFFSET 1
120 #define CONFIG_SYS_ATA_ALT_OFFSET 2
121 #define CONFIG_SYS_ATA_STRIDE 4
124 #define CONFIG_SCSI_AHCI_PLAT
125 #define CONFIG_SYS_SCSI_MAX_DEVICE 2
126 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
127 #define CONFIG_SYS_SCSI_MAX_LUN 4
129 #define CONFIG_SYS_SATA_MAX_DEVICE 2