1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2016-2018 Toradex, Inc.
11 #include <asm/arch-tegra/ap.h>
14 #include <asm/arch/gpio.h>
15 #include <asm/arch/pinmux.h>
16 #include <env_internal.h>
17 #include <fdt_support.h>
18 #include <pci_tegra.h>
19 #include <linux/delay.h>
20 #include <linux/printk.h>
21 #include <power/as3722.h>
22 #include <power/pmic.h>
24 #include "../common/tdx-common.h"
25 #include "pinmux-config-apalis-tk1.h"
27 #define LAN_DEV_OFF_N TEGRA_GPIO(O, 6)
28 #define LAN_RESET_N TEGRA_GPIO(S, 2)
29 #define FAN_EN TEGRA_GPIO(DD, 2)
30 #define LAN_WAKE_N TEGRA_GPIO(O, 5)
31 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
32 #define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
33 #define RESET_MOCI_CTRL TEGRA_GPIO(U, 4)
34 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
35 #define VCC_USBH TEGRA_GPIO(T, 6)
36 #define VCC_USBH_V1_0 TEGRA_GPIO(N, 5)
37 #define VCC_USBO1 TEGRA_GPIO(T, 5)
38 #define VCC_USBO1_V1_0 TEGRA_GPIO(N, 4)
40 int arch_misc_init(void)
42 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
43 NVBOOTTYPE_RECOVERY) {
44 printf("USB recovery mode, attempting to boot Toradex Easy "
46 env_set("bootdelay", "-2");
47 env_set("defargs", "pcie_aspm=off user_debug=30");
48 env_set("fdt_high", "");
49 env_set("initrd_high", "");
51 env_set("setup", "env set setupargs igb_mac=${ethaddr} "
52 "consoleblank=0 no_console_suspend=1 "
53 "console=${console},${baudrate}n8 ${memargs}");
54 env_set("teziargs", "rootfstype=squashfs root=/dev/ram quiet "
56 env_set("vidargs", "video=HDMI-A-1:640x480-16@60D");
57 env_set("bootcmd", "run setup; env set bootargs ${defargs} "
58 "${setupargs} ${vidargs} ${teziargs}; bootm 0x80208000"
59 "#config@${soc}-${fdt_module}-${fdt_board}.dtb");
62 /* PCB Version Indication: V1.2 and later have GPIO_PV0 wired to GND */
63 gpio_request(TEGRA_GPIO(V, 0), "PCB Version Indication");
64 gpio_direction_input(TEGRA_GPIO(V, 0));
65 if (gpio_get_value(TEGRA_GPIO(V, 0))) {
67 * if using the default device tree for new V1.2 and later HW,
68 * use version for older V1.0 and V1.1 HW
70 char *fdt_env = env_get("fdt_module");
72 if (fdt_env && !strcmp(FDT_MODULE, fdt_env)) {
73 env_set("fdt_module", FDT_MODULE_V1_0);
74 printf("patching fdt_module to " FDT_MODULE_V1_0
75 " for older V1.0 and V1.1 HW\n");
78 /* activate USB power enable GPIOs */
79 gpio_request(VCC_USBH_V1_0, "VCC_USBH");
80 gpio_direction_output(VCC_USBH_V1_0, 1);
81 gpio_request(VCC_USBO1_V1_0, "VCC_USBO1");
82 gpio_direction_output(VCC_USBO1_V1_0, 1);
84 /* activate USB power enable GPIOs */
85 gpio_request(VCC_USBH, "VCC_USBH");
86 gpio_direction_output(VCC_USBH, 1);
87 gpio_request(VCC_USBO1, "VCC_USBO1");
88 gpio_direction_output(VCC_USBO1, 1);
94 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
95 int ft_board_setup(void *blob, struct bd_info *bd)
100 if (eth_env_get_enetaddr("ethaddr", enetaddr)) {
101 int err = fdt_find_and_setprop(blob,
102 "/pcie@1003000/pci@2,0/ethernet@0,0",
103 "local-mac-address", enetaddr, 6, 0);
105 /* Older device trees might have used a different node name */
107 err = fdt_find_and_setprop(blob,
108 "/pcie@1003000/pci@2,0/pcie@0",
109 "local-mac-address", enetaddr, 6, 0);
112 puts(" MAC address updated...\n");
115 return ft_common_board_setup(blob, bd);
120 * Routine: pinmux_init
121 * Description: Do individual peripheral pinmux configs
123 void pinmux_init(void)
125 pinmux_clear_tristate_input_clamping();
127 gpio_config_table(apalis_tk1_gpio_inits,
128 ARRAY_SIZE(apalis_tk1_gpio_inits));
130 pinmux_config_pingrp_table(apalis_tk1_pingrps,
131 ARRAY_SIZE(apalis_tk1_pingrps));
133 pinmux_config_drvgrp_table(apalis_tk1_drvgrps,
134 ARRAY_SIZE(apalis_tk1_drvgrps));
137 #ifdef CONFIG_PCI_TEGRA
138 /* TODO: Convert to driver model */
139 static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
146 err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
148 pr_err("failed to update SD control register: %d", err);
155 /* TODO: Convert to driver model */
156 static int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)
159 u8 ctrl_reg = AS3722_LDO_CONTROL0;
165 ctrl_reg = AS3722_LDO_CONTROL1;
169 err = pmic_clrsetbits(pmic, ctrl_reg, 0, 1 << ldo);
171 pr_err("failed to update LDO control register: %d", err);
178 int tegra_pcie_board_init(void)
183 ret = uclass_get_device_by_driver(UCLASS_PMIC,
184 DM_DRIVER_GET(pmic_as3722), &dev);
186 pr_err("failed to find AS3722 PMIC: %d\n", ret);
190 ret = as3722_sd_enable(dev, 4);
192 pr_err("failed to enable SD4: %d\n", ret);
196 ret = as3722_sd_set_voltage(dev, 4, 0x24);
198 pr_err("failed to set SD4 voltage: %d\n", ret);
202 gpio_request(LAN_DEV_OFF_N, "LAN_DEV_OFF_N");
203 gpio_request(LAN_RESET_N, "LAN_RESET_N");
204 gpio_request(LAN_WAKE_N, "LAN_WAKE_N");
206 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
207 gpio_request(PEX_PERST_N, "PEX_PERST_N");
208 gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
209 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
214 void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
216 int index = tegra_pcie_port_index_of_port(port);
218 if (index == 1) { /* I210 Gigabit Ethernet Controller (On-module) */
222 ret = uclass_get_device_by_driver(UCLASS_PMIC,
223 DM_DRIVER_GET(pmic_as3722),
226 debug("%s: Failed to find PMIC\n", __func__);
230 /* Reset I210 Gigabit Ethernet Controller */
231 gpio_direction_output(LAN_RESET_N, 0);
234 * Make sure we don't get any back feeding from DEV_OFF_N resp.
237 gpio_direction_output(LAN_DEV_OFF_N, 0);
238 gpio_direction_output(LAN_WAKE_N, 0);
240 /* Make sure LDO9 and LDO10 are initially enabled @ 0V */
241 ret = as3722_ldo_enable(dev, 9);
243 pr_err("failed to enable LDO9: %d\n", ret);
246 ret = as3722_ldo_enable(dev, 10);
248 pr_err("failed to enable LDO10: %d\n", ret);
251 ret = as3722_ldo_set_voltage(dev, 9, 0x80);
253 pr_err("failed to set LDO9 voltage: %d\n", ret);
256 ret = as3722_ldo_set_voltage(dev, 10, 0x80);
258 pr_err("failed to set LDO10 voltage: %d\n", ret);
262 /* Make sure controller gets enabled by disabling DEV_OFF_N */
263 gpio_set_value(LAN_DEV_OFF_N, 1);
266 * Enable LDO9 and LDO10 for +V3.3_ETH on patched prototype
267 * V1.0A and sample V1.0B and newer modules
269 ret = as3722_ldo_set_voltage(dev, 9, 0xff);
271 pr_err("failed to set LDO9 voltage: %d\n", ret);
274 ret = as3722_ldo_set_voltage(dev, 10, 0xff);
276 pr_err("failed to set LDO10 voltage: %d\n", ret);
281 * Must be asserted for 100 ms after power and clocks are stable
285 gpio_set_value(LAN_RESET_N, 1);
286 } else if (index == 0) { /* Apalis PCIe */
287 #ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
289 * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on Apalis
292 gpio_direction_output(PEX_PERST_N, 0);
293 gpio_direction_output(RESET_MOCI_CTRL, 0);
296 * Must be asserted for 100 ms after power and clocks are stable
300 gpio_set_value(PEX_PERST_N, 1);
302 * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not Guaranteed
303 * Until 900 us After PEX_PERST# De-assertion
306 gpio_set_value(RESET_MOCI_CTRL, 1);
307 #endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
310 #endif /* CONFIG_PCI_TEGRA */
313 * Enable/start PWM CPU fan
315 void start_cpu_fan(void)
317 gpio_request(FAN_EN, "FAN_EN");
318 gpio_direction_output(FAN_EN, 1);
322 * Backlight off before OS handover
324 void board_preboot_os(void)
326 gpio_request(TEGRA_GPIO(BB, 5), "BL_ON");
327 gpio_direction_output(TEGRA_GPIO(BB, 5), 0);