2 * Copyright (c) 2013 Google, Inc
4 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/clock.h>
16 #include <asm/arch/periph.h>
17 #include <linux/err.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 struct rockchip_mmc_plat {
22 struct mmc_config cfg;
26 struct rockchip_dwmmc_priv {
29 struct dwmci_host host;
32 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
34 struct udevice *dev = host->priv;
35 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
38 ret = clk_set_periph_rate(priv->clk, priv->periph, freq);
40 debug("%s: err=%d\n", __func__, ret);
47 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
49 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
50 struct dwmci_host *host = &priv->host;
52 host->name = dev->name;
53 host->ioaddr = (void *)dev_get_addr(dev);
54 host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
56 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
59 /* use non-removeable as sdcard and emmc as judgement */
60 if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
68 static int rockchip_dwmmc_probe(struct udevice *dev)
71 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
73 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
74 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
75 struct dwmci_host *host = &priv->host;
76 struct udevice *pwr_dev __maybe_unused;
81 ret = clk_get_by_index(dev, 0, &priv->clk);
86 if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
87 "clock-freq-min-max", minmax, 2))
90 fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
95 host->fifoth_val = MSIZE(0x2) |
96 RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
98 if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
99 host->fifo_mode = true;
102 /* Enable power if needed */
103 ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
106 ret = pwrseq_set_power(pwr_dev, true);
112 dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps,
113 minmax[1], minmax[0]);
114 host->mmc = &plat->mmc;
116 ret = add_dwmci(host, minmax[1], minmax[0]);
121 host->mmc->priv = &priv->host;
122 host->mmc->dev = dev;
123 upriv->mmc = host->mmc;
128 static int rockchip_dwmmc_bind(struct udevice *dev)
131 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
134 ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
142 static const struct udevice_id rockchip_dwmmc_ids[] = {
143 { .compatible = "rockchip,rk3288-dw-mshc" },
147 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
148 .name = "rockchip_dwmmc",
150 .of_match = rockchip_dwmmc_ids,
151 .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
152 .bind = rockchip_dwmmc_bind,
153 .probe = rockchip_dwmmc_probe,
154 .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
155 .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
159 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
161 struct gpio_desc reset;
164 ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
167 dm_gpio_set_value(&reset, 1);
169 dm_gpio_set_value(&reset, 0);
175 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
176 .set_power = rockchip_dwmmc_pwrseq_set_power,
179 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
180 { .compatible = "mmc-pwrseq-emmc" },
184 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
185 .name = "mmc_pwrseq_emmc",
187 .of_match = rockchip_dwmmc_pwrseq_ids,
188 .ops = &rockchip_dwmmc_pwrseq_ops,