1 // SPDX-License-Identifier: GPL-2.0+
3 * Common initialisation for Qualcomm Snapdragon boards.
5 * Copyright (c) 2024 Linaro Ltd.
10 #include <asm/armv8/mmu.h>
14 #include <asm/system.h>
15 #include <dm/device.h>
16 #include <dm/pinctrl.h>
17 #include <dm/uclass-internal.h>
21 #include <linux/arm-smccc.h>
22 #include <linux/bug.h>
23 #include <linux/psci.h>
24 #include <linux/sizes.h>
30 DECLARE_GLOBAL_DATA_PTR;
32 static struct mm_region rbx_mem_map[CONFIG_NR_DRAM_BANKS + 2] = { { 0 } };
34 struct mm_region *mem_map = rbx_mem_map;
38 return fdtdec_setup_mem_size_base();
41 static int ddr_bank_cmp(const void *v1, const void *v2)
46 } *res1 = v1, *res2 = v2;
53 return (res1->start >> 24) - (res2->start >> 24);
56 int dram_init_banksize(void)
60 ret = fdtdec_setup_memory_banksize();
64 if (CONFIG_NR_DRAM_BANKS < 2)
67 /* Sort our RAM banks -_- */
68 qsort(gd->bd->bi_dram, CONFIG_NR_DRAM_BANKS, sizeof(gd->bd->bi_dram[0]), ddr_bank_cmp);
73 static void show_psci_version(void)
75 struct arm_smccc_res res;
77 arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
79 debug("PSCI: v%ld.%ld\n",
80 PSCI_VERSION_MAJOR(res.a0),
81 PSCI_VERSION_MINOR(res.a0));
84 void *board_fdt_blob_setup(int *err)
87 /* Return DTB pointer passed by ABL */
89 fdt = get_prev_bl_fdt_addr();
92 * If we bail then the board will simply not boot, instead let's
93 * try and use the FDT built into U-Boot if there is one...
94 * This avoids having a hard dependency on the previous stage bootloader
96 if (IS_ENABLED(CONFIG_OF_SEPARATE) && (!fdt || fdt != ALIGN(fdt, SZ_4K))) {
97 debug("%s: Using built in FDT, bootloader gave us %#llx\n", __func__, fdt);
98 return (void *)gd->fdt_blob;
110 * Some Qualcomm boards require GPIO configuration when switching USB modes.
111 * Support setting this configuration via pinctrl state.
113 int board_usb_init(int index, enum usb_init_type init)
119 ret = uclass_find_device_by_seq(UCLASS_USB, index, &usb);
121 printf("Cannot find USB device\n");
125 ret = dev_read_stringlist_search(usb, "pinctrl-names",
127 /* No "device" pinctrl state, so just bail */
131 /* Select "default" or "device" pinctrl */
134 pinctrl_select_state(usb, "default");
136 case USB_INIT_DEVICE:
137 pinctrl_select_state(usb, "device");
140 debug("Unknown usb_init_type %d\n", init);
148 * Some boards still need board specific init code, they can implement that by
149 * overriding this function.
151 * FIXME: get rid of board specific init code
153 void __weak qcom_board_init(void)
164 /* Sets up the "board", and "soc" environment variables as well as constructing the devicetree
165 * path, with a few quirks to handle non-standard dtb filenames. This is not meant to be a
166 * comprehensive solution to automatically picking the DTB, but aims to be correct for the
167 * majority case. For most devices it should be possible to make this algorithm work by
168 * adjusting the root compatible property in the U-Boot DTS. Handling devices with multiple
169 * variants that are all supported by a single U-Boot image will require implementing device-
170 * specific detection.
172 static void configure_env(void)
174 const char *first_compat, *last_compat;
176 char buf[32] = { 0 };
178 * Most DTB filenames follow the scheme: qcom/<soc>-[vendor]-<board>.dtb
179 * The vendor is skipped when it's a Qualcomm reference board, or the
182 char dt_path[64] = { 0 };
183 int compat_count, ret;
186 root = ofnode_root();
187 /* This is almost always 2, but be explicit that we want the first and last compatibles
188 * not the first and second.
190 compat_count = ofnode_read_string_count(root, "compatible");
191 if (compat_count < 2) {
192 log_warning("%s: only one root compatible bailing!\n", __func__);
196 /* The most specific device compatible (e.g. "thundercomm,db845c") */
197 ret = ofnode_read_string_index(root, "compatible", 0, &first_compat);
199 log_warning("Can't read first compatible\n");
203 /* The last compatible is always the SoC compatible */
204 ret = ofnode_read_string_index(root, "compatible", compat_count - 1, &last_compat);
206 log_warning("Can't read second compatible\n");
210 /* Copy the second compat (e.g. "qcom,sdm845") into buf */
211 strlcpy(buf, last_compat, sizeof(buf) - 1);
214 /* strsep() is destructive, it replaces the comma with a \0 */
215 if (!strsep(&tmp, ",")) {
216 log_warning("second compatible '%s' has no ','\n", buf);
220 /* tmp now points to just the "sdm845" part of the string */
223 /* Now figure out the "board" part from the first compatible */
224 memset(buf, 0, sizeof(buf));
225 strlcpy(buf, first_compat, sizeof(buf) - 1);
228 /* The Qualcomm reference boards (RBx, HDK, etc) */
229 if (!strncmp("qcom", buf, strlen("qcom"))) {
231 * They all have the first compatible as "qcom,<soc>-<board>"
232 * (e.g. "qcom,qrb5165-rb5"). We extract just the part after
235 if (!strsep(&tmp, "-")) {
236 log_warning("compatible '%s' has no '-'\n", buf);
239 /* tmp is now "rb5" */
240 env_set("board", tmp);
242 if (!strsep(&tmp, ",")) {
243 log_warning("compatible '%s' has no ','\n", buf);
246 /* for thundercomm we just want the bit after the comma (e.g. "db845c"),
247 * for all other boards we replace the comma with a '-' and take both
248 * (e.g. "oneplus-enchilada")
250 if (!strncmp("thundercomm", buf, strlen("thundercomm"))) {
251 env_set("board", tmp);
254 env_set("board", buf);
258 /* Now build the full path name */
259 snprintf(dt_path, sizeof(dt_path), "qcom/%s-%s.dtb",
260 env_get("soc"), env_get("board"));
261 env_set("fdtfile", dt_path);
264 void __weak qcom_late_init(void)
268 #define KERNEL_COMP_SIZE SZ_64M
270 #define addr_alloc(lmb, size) lmb_alloc(lmb, size, SZ_2M)
272 /* Stolen from arch/arm/mach-apple/board.c */
273 int board_late_init(void)
278 lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
280 /* We need to be fairly conservative here as we support boards with just 1G of TOTAL RAM */
281 status |= env_set_hex("kernel_addr_r", addr_alloc(&lmb, SZ_128M));
282 status |= env_set_hex("ramdisk_addr_r", addr_alloc(&lmb, SZ_128M));
283 status |= env_set_hex("kernel_comp_addr_r", addr_alloc(&lmb, KERNEL_COMP_SIZE));
284 status |= env_set_hex("kernel_comp_size", KERNEL_COMP_SIZE);
285 status |= env_set_hex("scriptaddr", addr_alloc(&lmb, SZ_4M));
286 status |= env_set_hex("pxefile_addr_r", addr_alloc(&lmb, SZ_4M));
287 status |= env_set_hex("fdt_addr_r", addr_alloc(&lmb, SZ_2M));
290 log_warning("%s: Failed to set run time variables\n", __func__);
298 static void build_mem_map(void)
303 * Ensure the peripheral block is sized to correctly cover the address range
304 * up to the first memory bank.
305 * Don't map the first page to ensure that we actually trigger an abort on a
306 * null pointer access rather than just hanging.
307 * FIXME: we should probably split this into more precise regions
309 mem_map[0].phys = 0x1000;
310 mem_map[0].virt = mem_map[0].phys;
311 mem_map[0].size = gd->bd->bi_dram[0].start - mem_map[0].phys;
312 mem_map[0].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
313 PTE_BLOCK_NON_SHARE |
314 PTE_BLOCK_PXN | PTE_BLOCK_UXN;
316 for (i = 1, j = 0; i < ARRAY_SIZE(rbx_mem_map) - 1 && gd->bd->bi_dram[j].size; i++, j++) {
317 mem_map[i].phys = gd->bd->bi_dram[j].start;
318 mem_map[i].virt = mem_map[i].phys;
319 mem_map[i].size = gd->bd->bi_dram[j].size;
320 mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | \
321 PTE_BLOCK_INNER_SHARE;
324 mem_map[i].phys = UINT64_MAX;
328 debug("Configured memory map:\n");
329 for (i = 0; mem_map[i].size; i++)
330 debug(" 0x%016llx - 0x%016llx: entry %d\n",
331 mem_map[i].phys, mem_map[i].phys + mem_map[i].size, i);
335 u64 get_page_table_size(void)
340 static int fdt_cmp_res(const void *v1, const void *v2)
342 const struct fdt_resource *res1 = v1, *res2 = v2;
344 return res1->start - res2->start;
347 #define N_RESERVED_REGIONS 32
349 /* Mark all no-map regions as PTE_TYPE_FAULT to prevent speculative access.
350 * On some platforms this is enough to trigger a security violation and trap
353 static void carve_out_reserved_memory(void)
355 static struct fdt_resource res[N_RESERVED_REGIONS] = { 0 };
356 int parent, rmem, count, i = 0;
360 /* Some reserved nodes must be carved out, as the cache-prefetcher may otherwise
361 * attempt to access them, causing a security exception.
363 parent = fdt_path_offset(gd->fdt_blob, "/reserved-memory");
365 log_err("No reserved memory regions found\n");
369 /* Collect the reserved memory regions */
370 fdt_for_each_subnode(rmem, gd->fdt_blob, parent) {
373 if (!fdt_getprop(gd->fdt_blob, rmem, "no-map", NULL))
376 if (i == N_RESERVED_REGIONS) {
377 log_err("Too many reserved regions!\n");
381 /* Read the address and size out from the reg property. Doing this "properly" with
382 * fdt_get_resource() takes ~70ms on SDM845, but open-coding the happy path here
383 * takes <1ms... Oh the woes of no dcache.
385 ptr = fdt_getprop(gd->fdt_blob, rmem, "reg", &len);
387 /* Qualcomm devices use #address/size-cells = <2> but all reserved regions are within
388 * the 32-bit address space. So we can cheat here for speed.
390 res[i].start = fdt32_to_cpu(ptr[1]);
391 res[i].end = res[i].start + fdt32_to_cpu(ptr[3]);
396 /* Sort the reserved memory regions by address */
398 qsort(res, count, sizeof(struct fdt_resource), fdt_cmp_res);
400 /* Now set the right attributes for them. Often a lot of the regions are tightly packed together
401 * so we can optimise the number of calls to mmu_change_region_attr() by combining adjacent
404 start = ALIGN_DOWN(res[0].start, SZ_2M);
405 size = ALIGN(res[0].end - start, SZ_2M);
406 for (i = 1; i <= count; i++) {
407 /* We ideally want to 2M align everything for more efficient pagetables, but we must avoid
408 * overwriting reserved memory regions which shouldn't be mapped as FAULT (like those with
409 * compatible properties).
410 * If within 2M of the previous region, bump the size to include this region. Otherwise
411 * start a new region.
413 if (i == count || start + size < res[i].start - SZ_2M) {
414 debug(" 0x%016llx - 0x%016llx: reserved\n",
415 start, start + size);
416 mmu_change_region_attr(start, size, PTE_TYPE_FAULT);
417 /* If this is the final region then quit here before we index
422 start = ALIGN_DOWN(res[i].start, SZ_2M);
423 size = ALIGN(res[i].end - start, SZ_2M);
425 /* Bump size if this region is immediately after the previous one */
426 size = ALIGN(res[i].end - start, SZ_2M);
431 /* This function open-codes setup_all_pgtables() so that we can
432 * insert additional mappings *before* turning on the MMU.
434 void enable_caches(void)
436 u64 tlb_addr = gd->arch.tlb_addr;
437 u64 tlb_size = gd->arch.tlb_size;
439 ulong carveout_start;
441 gd->arch.tlb_fillptr = tlb_addr;
447 /* Create normal system page tables */
450 pt_size = (uintptr_t)gd->arch.tlb_fillptr -
451 (uintptr_t)gd->arch.tlb_addr;
452 debug("Primary pagetable size: %lluKiB\n", pt_size / 1024);
454 /* Create emergency page tables */
455 gd->arch.tlb_size -= pt_size;
456 gd->arch.tlb_addr = gd->arch.tlb_fillptr;
458 gd->arch.tlb_emerg = gd->arch.tlb_addr;
459 gd->arch.tlb_addr = tlb_addr;
460 gd->arch.tlb_size = tlb_size;
462 carveout_start = get_timer(0);
463 /* Takes ~20-50ms on SDM845 */
464 carve_out_reserved_memory();
465 debug("carveout time: %lums\n", get_timer(carveout_start));