2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX7D SABRESD board.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __MX7D_SABRESD_CONFIG_H
10 #define __MX7D_SABRESD_CONFIG_H
12 #include "mx7_common.h"
14 #define CONFIG_DBG_MONITOR
15 #define PHYS_SDRAM_SIZE SZ_1G
17 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
22 #define CONFIG_BOARD_EARLY_INIT_F
25 #define CONFIG_FEC_MXC
27 #define CONFIG_FEC_XCV_TYPE RGMII
28 #define CONFIG_ETHPRIME "FEC"
29 #define CONFIG_FEC_MXC_PHYADDR 0
32 #define CONFIG_PHY_BROADCOM
34 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
37 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
41 #define CONFIG_POWER_I2C
42 #define CONFIG_POWER_PFUZE3000
43 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
45 #undef CONFIG_BOOTM_NETBSD
46 #undef CONFIG_BOOTM_PLAN9
47 #undef CONFIG_BOOTM_RTEMS
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
53 #define CONFIG_SYS_I2C_SPEED 100000
55 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
56 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
58 #ifdef CONFIG_IMX_BOOTAUX
59 /* Set to QSPI1 A flash at default */
60 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
62 #define UPDATE_M4_ENV \
63 "m4image=m4_qspi.bin\0" \
64 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
65 "update_m4_from_sd=" \
66 "if sf probe 0:0; then " \
67 "if run loadm4image; then " \
68 "setexpr fw_sz ${filesize} + 0xffff; " \
69 "setexpr fw_sz ${fw_sz} / 0x10000; " \
70 "setexpr fw_sz ${fw_sz} * 0x10000; " \
71 "sf erase 0x0 ${fw_sz}; " \
72 "sf write ${loadaddr} 0x0 ${filesize}; " \
75 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
77 #define UPDATE_M4_ENV ""
80 #define CONFIG_MFG_ENV_SETTINGS \
81 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
83 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
84 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
85 "g_mass_storage.iSerialNumber=\"\" "\
88 "initrd_addr=0x83800000\0" \
89 "initrd_high=0xffffffff\0" \
90 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
92 #define CONFIG_DFU_ENV_SETTINGS \
93 "dfu_alt_info=image raw 0 0x800000;"\
94 "u-boot raw 0 0x4000;"\
98 #define CONFIG_EXTRA_ENV_SETTINGS \
100 CONFIG_MFG_ENV_SETTINGS \
101 CONFIG_DFU_ENV_SETTINGS \
102 "script=boot.scr\0" \
104 "console=ttymxc0\0" \
105 "fdt_high=0xffffffff\0" \
106 "initrd_high=0xffffffff\0" \
107 "fdt_file=imx7d-sdb.dtb\0" \
108 "fdt_addr=0x83000000\0" \
111 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
112 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
113 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
114 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
115 "mmcautodetect=yes\0" \
116 "mmcargs=setenv bootargs console=${console},${baudrate} " \
117 "root=${mmcroot}\0" \
119 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
120 "bootscript=echo Running bootscript from mmc ...; " \
122 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
123 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
124 "mmcboot=echo Booting from mmc ...; " \
126 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
127 "if run loadfdt; then " \
128 "bootz ${loadaddr} - ${fdt_addr}; " \
130 "if test ${boot_fdt} = try; then " \
133 "echo WARN: Cannot load the DT; " \
139 "netargs=setenv bootargs console=${console},${baudrate} " \
141 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
142 "netboot=echo Booting from net ...; " \
144 "if test ${ip_dyn} = yes; then " \
145 "setenv get_cmd dhcp; " \
147 "setenv get_cmd tftp; " \
149 "${get_cmd} ${image}; " \
150 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
151 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
152 "bootz ${loadaddr} - ${fdt_addr}; " \
154 "if test ${boot_fdt} = try; then " \
157 "echo WARN: Cannot load the DT; " \
164 #define CONFIG_BOOTCOMMAND \
165 "mmc dev ${mmcdev};" \
166 "mmc dev ${mmcdev}; if mmc rescan; then " \
167 "if run loadbootscript; then " \
170 "if run loadimage; then " \
172 "else run netboot; " \
175 "else run netboot; fi"
177 #define CONFIG_SYS_MEMTEST_START 0x80000000
178 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
180 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
181 #define CONFIG_SYS_HZ 1000
183 #define CONFIG_STACKSIZE SZ_128K
185 /* Physical Memory Map */
186 #define CONFIG_NR_DRAM_BANKS 1
187 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
189 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
190 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
191 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
193 #define CONFIG_SYS_INIT_SP_OFFSET \
194 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
195 #define CONFIG_SYS_INIT_SP_ADDR \
196 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
198 /* FLASH and environment organization */
199 #define CONFIG_SYS_NO_FLASH
200 #define CONFIG_ENV_SIZE SZ_8K
201 #define CONFIG_ENV_IS_IN_MMC
203 /* MXC SPI driver support */
204 #define CONFIG_MXC_SPI
207 * If want to use nand, define CONFIG_NAND_MXS and rework board
208 * to support nand, since emmc has pin conflicts with nand
210 #ifdef CONFIG_NAND_MXS
211 #define CONFIG_CMD_NAND
212 #define CONFIG_CMD_NAND_TRIMFFS
215 #define CONFIG_SYS_MAX_NAND_DEVICE 1
216 #define CONFIG_SYS_NAND_BASE 0x40000000
217 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
218 #define CONFIG_SYS_NAND_ONFI_DETECTION
220 /* DMA stuff, needed for GPMI/MXS NAND support */
221 #define CONFIG_APBH_DMA
222 #define CONFIG_APBH_DMA_BURST
223 #define CONFIG_APBH_DMA_BURST8
226 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
227 #ifdef CONFIG_NAND_MXS
228 #define CONFIG_SYS_FSL_USDHC_NUM 1
230 #define CONFIG_SYS_FSL_USDHC_NUM 2
233 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
234 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
235 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
238 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
239 #define CONFIG_USB_HOST_ETHER
240 #define CONFIG_USB_ETHER_ASIX
241 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
242 #define CONFIG_MXC_USB_FLAGS 0
243 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
245 #define CONFIG_IMX_THERMAL
247 #define CONFIG_USBD_HS
249 #define CONFIG_USB_FUNCTION_MASS_STORAGE
252 #define CONFIG_VIDEO_MXS
253 #define CONFIG_VIDEO_LOGO
254 #define CONFIG_SPLASH_SCREEN
255 #define CONFIG_SPLASH_SCREEN_ALIGN
256 #define CONFIG_CMD_BMP
257 #define CONFIG_BMP_16BPP
258 #define CONFIG_VIDEO_BMP_RLE8
259 #define CONFIG_VIDEO_BMP_LOGO
262 #ifdef CONFIG_FSL_QSPI
263 #define CONFIG_SPI_FLASH
264 #define CONFIG_SPI_FLASH_MACRONIX
265 #define CONFIG_SPI_FLASH_BAR
266 #define CONFIG_SF_DEFAULT_BUS 0
267 #define CONFIG_SF_DEFAULT_CS 0
268 #define CONFIG_SF_DEFAULT_SPEED 40000000
269 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
270 #define FSL_QSPI_FLASH_NUM 1
271 #define FSL_QSPI_FLASH_SIZE SZ_64M
272 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
273 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
276 #endif /* __CONFIG_H */