include/configs/pcm052.h

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the phytec PCM-052 SoM.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONFIG_SKIP_LOWLEVEL_INIT
  15
  16 /* Enable passing of ATAGs */
  17 #define CONFIG_CMDLINE_TAG
  18
  19 /* Size of malloc() pool */
  20 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  21
  22 /* Allow to overwrite serial and ethaddr */
  23 #define CONFIG_ENV_OVERWRITE
  24
  25 /* NAND support */
  26 #define CONFIG_SYS_NAND_ONFI_DETECTION
  27
  28 #ifdef CONFIG_CMD_NAND
  29 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  30 #define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR
  31
  32 #define CONFIG_JFFS2_NAND
  33
  34 /* Dynamic MTD partition support */
  35 #define CONFIG_MTD_PARTITIONS
  36 #define CONFIG_MTD_DEVICE
  37
  38 #ifndef MTDIDS_DEFAULT
  39 #define MTDIDS_DEFAULT                  "nand0=NAND"
  40 #endif
  41
  42 #ifndef MTDPARTS_DEFAULT
  43 #define MTDPARTS_DEFAULT                "mtdparts=NAND:640k(bootloader)"\
  44                                         ",128k(env1)"\
  45                                         ",128k(env2)"\
  46                                         ",128k(dtb)"\
  47                                         ",6144k(kernel)"\
  48                                         ",-(root)"
  49 #endif
  50
  51 #endif
  52
  53 #define CONFIG_FSL_ESDHC
  54 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  55 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  56
  57 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
  58
  59 #define CONFIG_FEC_MXC
  60 #define CONFIG_MII
  61 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  62 #define CONFIG_FEC_XCV_TYPE             RMII
  63 #define CONFIG_FEC_MXC_PHYADDR          0
  64
  65 /* QSPI Configs*/
  66
  67 #ifdef CONFIG_FSL_QSPI
  68 #define FSL_QSPI_FLASH_SIZE             (1 << 24)
  69 #define FSL_QSPI_FLASH_NUM              2
  70 #define CONFIG_SYS_FSL_QSPI_LE
  71 #endif
  72
  73 /* I2C Configs */
  74 #define CONFIG_SYS_I2C
  75 #define CONFIG_SYS_I2C_MXC_I2C3
  76 #define CONFIG_SYS_I2C_MXC
  77
  78 /* RTC (actually an RV-4162 but M41T62-compatible) */
  79 #define CONFIG_RTC_M41T62
  80 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
  81 #define CONFIG_SYS_RTC_BUS_NUM 2
  82
  83 /* EEPROM (24FC256) */
  84 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
  85 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
  86 #define CONFIG_SYS_I2C_EEPROM_BUS 2
  87
  88
  89 #define CONFIG_LOADADDR                 0x82000000
  90
  91 /* We boot from the gfxRAM area of the OCRAM. */
  92 #define CONFIG_SYS_TEXT_BASE            0x3f408000
  93 #define CONFIG_BOARD_SIZE_LIMIT         524288
  94
  95 /* if no target-specific extra environment settings were defined by the
  96    target, define an empty one */
  97 #ifndef PCM052_EXTRA_ENV_SETTINGS
  98 #define PCM052_EXTRA_ENV_SETTINGS
  99 #endif
 100
 101 /* if no target-specific boot command was defined by the target,
 102    define an empty one */
 103 #ifndef PCM052_BOOTCOMMAND
 104 #define PCM052_BOOTCOMMAND
 105 #endif
 106
 107 /* if no target-specific extra environment settings were defined by the
 108    target, define an empty one */
 109 #ifndef PCM052_NET_INIT
 110 #define PCM052_NET_INIT
 111 #endif
 112
 113 /* boot command, including the target-defined one if any */
 114 #define CONFIG_BOOTCOMMAND      PCM052_BOOTCOMMAND "run bootcmd_nand"
 115
 116 /* Extra env settings (including the target-defined ones if any) */
 117 #define CONFIG_EXTRA_ENV_SETTINGS \
 118         PCM052_EXTRA_ENV_SETTINGS \
 119         "autoload=no\0" \
 120         "fdt_high=0xffffffff\0" \
 121         "initrd_high=0xffffffff\0" \
 122         "blimg_file=u-boot.vyb\0" \
 123         "blimg_addr=0x81000000\0" \
 124         "kernel_file=zImage\0" \
 125         "kernel_addr=0x82000000\0" \
 126         "fdt_file=zImage.dtb\0" \
 127         "fdt_addr=0x81000000\0" \
 128         "ram_file=uRamdisk\0" \
 129         "ram_addr=0x83000000\0" \
 130         "filesys=rootfs.ubifs\0" \
 131         "sys_addr=0x81000000\0" \
 132         "tftploc=/path/to/tftp/directory/\0" \
 133         "nfs_root=/path/to/nfs/root\0" \
 134         "tftptimeout=1000\0" \
 135         "tftptimeoutcountmax=1000000\0" \
 136         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 137         "bootargs_base=setenv bootargs rw " \
 138                 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
 139                 "console=ttyLP1,115200n8\0" \
 140         "bootargs_sd=setenv bootargs ${bootargs} " \
 141                 "root=/dev/mmcblk0p2 rootwait\0" \
 142         "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
 143                 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
 144         "bootargs_nand=setenv bootargs ${bootargs} " \
 145                 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
 146         "bootargs_ram=setenv bootargs ${bootargs} " \
 147                 "root=/dev/ram rw initrd=${ram_addr}\0" \
 148         "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
 149         "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
 150                 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
 151                 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
 152                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 153         "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
 154                 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
 155                 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
 156                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 157         "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
 158                 "nand read ${fdt_addr} dtb; " \
 159                 "nand read ${kernel_addr} kernel; " \
 160                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 161         "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
 162                 "nand read ${fdt_addr} dtb; " \
 163                 "nand read ${kernel_addr} kernel; " \
 164                 "nand read ${ram_addr} root; " \
 165                 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
 166         "update_bootloader_from_tftp=" PCM052_NET_INIT \
 167                 "if tftp ${blimg_addr} "\
 168                 "${tftpdir}${blimg_file}; then " \
 169                 "mtdparts default; " \
 170                 "nand erase.part bootloader; " \
 171                 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
 172         "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
 173                 "${kernel_file}; " \
 174                 "then mtdparts default; " \
 175                 "nand erase.part kernel; " \
 176                 "nand write ${kernel_addr} kernel ${filesize}; " \
 177                 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
 178                 "nand erase.part dtb; " \
 179                 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
 180         "update_kernel_from_tftp=" PCM052_NET_INIT \
 181                 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
 182                 "then setenv fdtsize ${filesize}; " \
 183                 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
 184                 "mtdparts default; " \
 185                 "nand erase.part dtb; " \
 186                 "nand write ${fdt_addr} dtb ${fdtsize}; " \
 187                 "nand erase.part kernel; " \
 188                 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
 189         "update_rootfs_from_tftp=" PCM052_NET_INIT \
 190                 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
 191                 "then mtdparts default; " \
 192                 "nand erase.part root; " \
 193                 "ubi part root; " \
 194                 "ubi create rootfs; " \
 195                 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
 196         "update_ramdisk_from_tftp=" PCM052_NET_INIT \
 197                 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
 198                 "then mtdparts default; " \
 199                 "nand erase.part root; " \
 200                 "nand write ${ram_addr} root ${filesize}; fi\0"
 201
 202 /* Miscellaneous configurable options */
 203 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 204 #define CONFIG_AUTO_COMPLETE
 205 #define CONFIG_CMDLINE_EDITING
 206 #define CONFIG_SYS_PBSIZE               \
 207                         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 208 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 209 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 210
 211 #define CONFIG_SYS_MEMTEST_START        0x80010000
 212 #define CONFIG_SYS_MEMTEST_END          0x87C00000
 213
 214 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 215
 216 /* Physical memory map */
 217 #define CONFIG_NR_DRAM_BANKS            1
 218 #define PHYS_SDRAM                      (0x80000000)
 219 #define PHYS_SDRAM_SIZE                 (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
 220
 221 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 222 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 223 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 224
 225 #define CONFIG_SYS_INIT_SP_OFFSET \
 226         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 227 #define CONFIG_SYS_INIT_SP_ADDR \
 228         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 229
 230 /* environment organization */
 231 #ifdef CONFIG_ENV_IS_IN_MMC
 232 #define CONFIG_ENV_SIZE                 (8 * 1024)
 233
 234 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
 235 #define CONFIG_SYS_MMC_ENV_DEV          0
 236 #endif
 237
 238 #ifdef CONFIG_ENV_IS_IN_NAND
 239 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
 240 #define CONFIG_ENV_SIZE                 (8 * 1024)
 241 #define CONFIG_ENV_OFFSET               0xA0000
 242 #define CONFIG_ENV_SIZE_REDUND          (8 * 1024)
 243 #define CONFIG_ENV_OFFSET_REDUND        0xC0000
 244 #endif
 245
 246 #endif