arch/arm/mach-stm32mp/bsec.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
   4  */
   5
   6 #define LOG_CATEGORY UCLASS_MISC
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <log.h>
  11 #include <misc.h>
  12 #include <asm/io.h>
  13 #include <asm/arch/bsec.h>
  14 #include <asm/arch/stm32mp1_smc.h>
  15 #include <dm/device_compat.h>
  16 #include <linux/arm-smccc.h>
  17 #include <linux/iopoll.h>
  18
  19 #define BSEC_OTP_MAX_VALUE              95
  20 #define BSEC_TIMEOUT_US                 10000
  21
  22 /* BSEC REGISTER OFFSET (base relative) */
  23 #define BSEC_OTP_CONF_OFF               0x000
  24 #define BSEC_OTP_CTRL_OFF               0x004
  25 #define BSEC_OTP_WRDATA_OFF             0x008
  26 #define BSEC_OTP_STATUS_OFF             0x00C
  27 #define BSEC_OTP_LOCK_OFF               0x010
  28 #define BSEC_DENABLE_OFF                0x014
  29 #define BSEC_DISTURBED_OFF              0x01C
  30 #define BSEC_ERROR_OFF                  0x034
  31 #define BSEC_WRLOCK_OFF                 0x04C /* OTP write permananet lock */
  32 #define BSEC_SPLOCK_OFF                 0x064 /* OTP write sticky lock */
  33 #define BSEC_SWLOCK_OFF                 0x07C /* shadow write sticky lock */
  34 #define BSEC_SRLOCK_OFF                 0x094 /* shadow read sticky lock */
  35 #define BSEC_OTP_DATA_OFF               0x200
  36
  37 /* BSEC_CONFIGURATION Register MASK */
  38 #define BSEC_CONF_POWER_UP              0x001
  39
  40 /* BSEC_CONTROL Register */
  41 #define BSEC_READ                       0x000
  42 #define BSEC_WRITE                      0x100
  43
  44 /* LOCK Register */
  45 #define OTP_LOCK_MASK                   0x1F
  46 #define OTP_LOCK_BANK_SHIFT             0x05
  47 #define OTP_LOCK_BIT_MASK               0x01
  48
  49 /* STATUS Register */
  50 #define BSEC_MODE_BUSY_MASK             0x08
  51 #define BSEC_MODE_PROGFAIL_MASK         0x10
  52 #define BSEC_MODE_PWR_MASK              0x20
  53
  54 /* DENABLE Register */
  55 #define BSEC_DENABLE_DBGSWENABLE        BIT(10)
  56
  57 /*
  58  * OTP Lock services definition
  59  * Value must corresponding to the bit number in the register
  60  */
  61 #define BSEC_LOCK_PROGRAM               0x04
  62
  63 /**
  64  * bsec_lock() - manage lock for each type SR/SP/SW
  65  * @address: address of bsec IP register
  66  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
  67  * Return: true if locked else false
  68  */
  69 static bool bsec_read_lock(u32 address, u32 otp)
  70 {
  71         u32 bit;
  72         u32 bank;
  73
  74         bit = 1 << (otp & OTP_LOCK_MASK);
  75         bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
  76
  77         return !!(readl(address + bank) & bit);
  78 }
  79
  80 /**
  81  * bsec_check_error() - Check status of one otp
  82  * @base: base address of bsec IP
  83  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
  84  * Return: 0 if no error, -EAGAIN or -ENOTSUPP
  85  */
  86 static u32 bsec_check_error(u32 base, u32 otp)
  87 {
  88         u32 bit;
  89         u32 bank;
  90
  91         bit = 1 << (otp & OTP_LOCK_MASK);
  92         bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32);
  93
  94         if (readl(base + BSEC_DISTURBED_OFF + bank) & bit)
  95                 return -EAGAIN;
  96         else if (readl(base + BSEC_ERROR_OFF + bank) & bit)
  97                 return -ENOTSUPP;
  98
  99         return 0;
 100 }
 101
 102 /**
 103  * bsec_read_SR_lock() - read SR lock (Shadowing)
 104  * @base: base address of bsec IP
 105  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 106  * Return: true if locked else false
 107  */
 108 static bool bsec_read_SR_lock(u32 base, u32 otp)
 109 {
 110         return bsec_read_lock(base + BSEC_SRLOCK_OFF, otp);
 111 }
 112
 113 /**
 114  * bsec_read_SP_lock() - read SP lock (program Lock)
 115  * @base: base address of bsec IP
 116  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 117  * Return: true if locked else false
 118  */
 119 static bool bsec_read_SP_lock(u32 base, u32 otp)
 120 {
 121         return bsec_read_lock(base + BSEC_SPLOCK_OFF, otp);
 122 }
 123
 124 /**
 125  * bsec_SW_lock() - manage SW lock (Write in Shadow)
 126  * @base: base address of bsec IP
 127  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 128  * Return: true if locked else false
 129  */
 130 static bool bsec_read_SW_lock(u32 base, u32 otp)
 131 {
 132         return bsec_read_lock(base + BSEC_SWLOCK_OFF, otp);
 133 }
 134
 135 /**
 136  * bsec_power_safmem() - Activate or deactivate safmem power
 137  * @base: base address of bsec IP
 138  * @power: true to power up , false to power down
 139  * Return: 0 if succeed
 140  */
 141 static int bsec_power_safmem(u32 base, bool power)
 142 {
 143         u32 val;
 144         u32 mask;
 145
 146         if (power) {
 147                 setbits_le32(base + BSEC_OTP_CONF_OFF, BSEC_CONF_POWER_UP);
 148                 mask = BSEC_MODE_PWR_MASK;
 149         } else {
 150                 clrbits_le32(base + BSEC_OTP_CONF_OFF, BSEC_CONF_POWER_UP);
 151                 mask = 0;
 152         }
 153
 154         /* waiting loop */
 155         return readl_poll_timeout(base + BSEC_OTP_STATUS_OFF,
 156                                   val, (val & BSEC_MODE_PWR_MASK) == mask,
 157                                   BSEC_TIMEOUT_US);
 158 }
 159
 160 /**
 161  * bsec_shadow_register() - copy safmen otp to bsec data
 162  * @base: base address of bsec IP
 163  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 164  * Return: 0 if no error
 165  */
 166 static int bsec_shadow_register(struct udevice *dev, u32 base, u32 otp)
 167 {
 168         u32 val;
 169         int ret;
 170         bool power_up = false;
 171
 172         /* check if shadowing of otp is locked */
 173         if (bsec_read_SR_lock(base, otp))
 174                 dev_dbg(dev, "OTP %d is locked and refreshed with 0\n",
 175                         otp);
 176
 177         /* check if safemem is power up */
 178         val = readl(base + BSEC_OTP_STATUS_OFF);
 179         if (!(val & BSEC_MODE_PWR_MASK)) {
 180                 ret = bsec_power_safmem(base, true);
 181                 if (ret)
 182                         return ret;
 183                 power_up = true;
 184         }
 185         /* set BSEC_OTP_CTRL_OFF with the otp value*/
 186         writel(otp | BSEC_READ, base + BSEC_OTP_CTRL_OFF);
 187
 188         /* check otp status*/
 189         ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF,
 190                                  val, (val & BSEC_MODE_BUSY_MASK) == 0,
 191                                  BSEC_TIMEOUT_US);
 192         if (ret)
 193                 return ret;
 194
 195         ret = bsec_check_error(base, otp);
 196
 197         if (power_up)
 198                 bsec_power_safmem(base, false);
 199
 200         return ret;
 201 }
 202
 203 /**
 204  * bsec_read_shadow() - read an otp data value from shadow
 205  * @base: base address of bsec IP
 206  * @val: read value
 207  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 208  * Return: 0 if no error
 209  */
 210 static int bsec_read_shadow(struct udevice *dev, u32 base, u32 *val, u32 otp)
 211 {
 212         *val = readl(base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
 213
 214         return bsec_check_error(base, otp);
 215 }
 216
 217 /**
 218  * bsec_write_shadow() - write value in BSEC data register in shadow
 219  * @base: base address of bsec IP
 220  * @val: value to write
 221  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 222  * Return: 0 if no error
 223  */
 224 static int bsec_write_shadow(struct udevice *dev, u32 base, u32 val, u32 otp)
 225 {
 226         /* check if programming of otp is locked */
 227         if (bsec_read_SW_lock(base, otp))
 228                 dev_dbg(dev, "OTP %d is lock, write will be ignore\n", otp);
 229
 230         writel(val, base + BSEC_OTP_DATA_OFF + otp * sizeof(u32));
 231
 232         return bsec_check_error(base, otp);
 233 }
 234
 235 /**
 236  * bsec_program_otp() - program a bit in SAFMEM
 237  * @base: base address of bsec IP
 238  * @val: value to program
 239  * @otp: otp number (0 - BSEC_OTP_MAX_VALUE)
 240  * after the function the otp data is not refreshed in shadow
 241  * Return: 0 if no error
 242  */
 243 static int bsec_program_otp(struct udevice *dev, long base, u32 val, u32 otp)
 244 {
 245         u32 ret;
 246         bool power_up = false;
 247
 248         if (bsec_read_SP_lock(base, otp))
 249                 dev_dbg(dev, "OTP %d locked, prog will be ignore\n", otp);
 250
 251         if (readl(base + BSEC_OTP_LOCK_OFF) & (1 << BSEC_LOCK_PROGRAM))
 252                 dev_dbg(dev, "Global lock, prog will be ignore\n");
 253
 254         /* check if safemem is power up */
 255         if (!(readl(base + BSEC_OTP_STATUS_OFF) & BSEC_MODE_PWR_MASK)) {
 256                 ret = bsec_power_safmem(base, true);
 257                 if (ret)
 258                         return ret;
 259
 260                 power_up = true;
 261         }
 262         /* set value in write register*/
 263         writel(val, base + BSEC_OTP_WRDATA_OFF);
 264
 265         /* set BSEC_OTP_CTRL_OFF with the otp value */
 266         writel(otp | BSEC_WRITE, base + BSEC_OTP_CTRL_OFF);
 267
 268         /* check otp status*/
 269         ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF,
 270                                  val, (val & BSEC_MODE_BUSY_MASK) == 0,
 271                                  BSEC_TIMEOUT_US);
 272         if (ret)
 273                 return ret;
 274
 275         if (val & BSEC_MODE_PROGFAIL_MASK)
 276                 ret = -EACCES;
 277         else
 278                 ret = bsec_check_error(base, otp);
 279
 280         if (power_up)
 281                 bsec_power_safmem(base, false);
 282
 283         return ret;
 284 }
 285
 286 /* BSEC MISC driver *******************************************************/
 287 struct stm32mp_bsec_plat {
 288         u32 base;
 289 };
 290
 291 static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
 292 {
 293         struct stm32mp_bsec_plat *plat;
 294         u32 tmp_data = 0;
 295         int ret;
 296
 297         if (IS_ENABLED(CONFIG_TFABOOT))
 298                 return stm32_smc(STM32_SMC_BSEC,
 299                                  STM32_SMC_READ_OTP,
 300                                  otp, 0, val);
 301
 302         plat = dev_get_plat(dev);
 303
 304         /* read current shadow value */
 305         ret = bsec_read_shadow(dev, plat->base, &tmp_data, otp);
 306         if (ret)
 307                 return ret;
 308
 309         /* copy otp in shadow */
 310         ret = bsec_shadow_register(dev, plat->base, otp);
 311         if (ret)
 312                 return ret;
 313
 314         ret = bsec_read_shadow(dev, plat->base, val, otp);
 315         if (ret)
 316                 return ret;
 317
 318         /* restore shadow value */
 319         ret = bsec_write_shadow(dev, plat->base, tmp_data, otp);
 320
 321         return ret;
 322 }
 323
 324 static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp)
 325 {
 326         struct stm32mp_bsec_plat *plat;
 327
 328         if (IS_ENABLED(CONFIG_TFABOOT))
 329                 return stm32_smc(STM32_SMC_BSEC,
 330                                  STM32_SMC_READ_SHADOW,
 331                                  otp, 0, val);
 332
 333         plat = dev_get_plat(dev);
 334
 335         return bsec_read_shadow(dev, plat->base, val, otp);
 336 }
 337
 338 static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp)
 339 {
 340         struct stm32mp_bsec_plat *plat = dev_get_plat(dev);
 341
 342         /* return OTP permanent write lock status */
 343         *val = bsec_read_lock(plat->base + BSEC_WRLOCK_OFF, otp);
 344
 345         return 0;
 346 }
 347
 348 static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp)
 349 {
 350         struct stm32mp_bsec_plat *plat;
 351
 352         if (IS_ENABLED(CONFIG_TFABOOT))
 353                 return stm32_smc_exec(STM32_SMC_BSEC,
 354                                       STM32_SMC_PROG_OTP,
 355                                       otp, val);
 356
 357         plat = dev_get_plat(dev);
 358
 359         return bsec_program_otp(dev, plat->base, val, otp);
 360
 361 }
 362
 363 static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
 364 {
 365         struct stm32mp_bsec_plat *plat;
 366
 367         if (IS_ENABLED(CONFIG_TFABOOT))
 368                 return stm32_smc_exec(STM32_SMC_BSEC,
 369                                       STM32_SMC_WRITE_SHADOW,
 370                                       otp, val);
 371
 372         plat = dev_get_plat(dev);
 373
 374         return bsec_write_shadow(dev, plat->base, val, otp);
 375 }
 376
 377 static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp)
 378 {
 379         if (!IS_ENABLED(CONFIG_TFABOOT))
 380                 return -ENOTSUPP;
 381
 382         if (val == 1)
 383                 return stm32_smc_exec(STM32_SMC_BSEC,
 384                                       STM32_SMC_WRLOCK_OTP,
 385                                       otp, 0);
 386         if (val == 0)
 387                 return 0; /* nothing to do */
 388
 389         return -EINVAL;
 390 }
 391
 392 static int stm32mp_bsec_read(struct udevice *dev, int offset,
 393                              void *buf, int size)
 394 {
 395         int ret;
 396         int i;
 397         bool shadow = true, lock = false;
 398         int nb_otp = size / sizeof(u32);
 399         int otp;
 400         unsigned int offs = offset;
 401
 402         if (offs >= STM32_BSEC_LOCK_OFFSET) {
 403                 offs -= STM32_BSEC_LOCK_OFFSET;
 404                 lock = true;
 405         } else if (offs >= STM32_BSEC_OTP_OFFSET) {
 406                 offs -= STM32_BSEC_OTP_OFFSET;
 407                 shadow = false;
 408         }
 409
 410         if ((offs % 4) || (size % 4))
 411                 return -EINVAL;
 412
 413         otp = offs / sizeof(u32);
 414
 415         for (i = otp; i < (otp + nb_otp) && i <= BSEC_OTP_MAX_VALUE; i++) {
 416                 u32 *addr = &((u32 *)buf)[i - otp];
 417
 418                 if (lock)
 419                         ret = stm32mp_bsec_read_lock(dev, addr, i);
 420                 else if (shadow)
 421                         ret = stm32mp_bsec_read_shadow(dev, addr, i);
 422                 else
 423                         ret = stm32mp_bsec_read_otp(dev, addr, i);
 424
 425                 if (ret)
 426                         break;
 427         }
 428         if (ret)
 429                 return ret;
 430         else
 431                 return (i - otp) * 4;
 432 }
 433
 434 static int stm32mp_bsec_write(struct udevice *dev, int offset,
 435                               const void *buf, int size)
 436 {
 437         int ret = 0;
 438         int i;
 439         bool shadow = true, lock = false;
 440         int nb_otp = size / sizeof(u32);
 441         int otp;
 442         unsigned int offs = offset;
 443
 444         if (offs >= STM32_BSEC_LOCK_OFFSET) {
 445                 offs -= STM32_BSEC_LOCK_OFFSET;
 446                 lock = true;
 447         } else if (offs >= STM32_BSEC_OTP_OFFSET) {
 448                 offs -= STM32_BSEC_OTP_OFFSET;
 449                 shadow = false;
 450         }
 451
 452         if ((offs % 4) || (size % 4))
 453                 return -EINVAL;
 454
 455         otp = offs / sizeof(u32);
 456
 457         for (i = otp; i < otp + nb_otp && i <= BSEC_OTP_MAX_VALUE; i++) {
 458                 u32 *val = &((u32 *)buf)[i - otp];
 459
 460                 if (lock)
 461                         ret = stm32mp_bsec_write_lock(dev, *val, i);
 462                 else if (shadow)
 463                         ret = stm32mp_bsec_write_shadow(dev, *val, i);
 464                 else
 465                         ret = stm32mp_bsec_write_otp(dev, *val, i);
 466                 if (ret)
 467                         break;
 468         }
 469         if (ret)
 470                 return ret;
 471         else
 472                 return (i - otp) * 4;
 473 }
 474
 475 static const struct misc_ops stm32mp_bsec_ops = {
 476         .read = stm32mp_bsec_read,
 477         .write = stm32mp_bsec_write,
 478 };
 479
 480 static int stm32mp_bsec_of_to_plat(struct udevice *dev)
 481 {
 482         struct stm32mp_bsec_plat *plat = dev_get_plat(dev);
 483
 484         plat->base = (u32)dev_read_addr_ptr(dev);
 485
 486         return 0;
 487 }
 488
 489 static int stm32mp_bsec_probe(struct udevice *dev)
 490 {
 491         int otp;
 492         struct stm32mp_bsec_plat *plat;
 493
 494         /*
 495          * update unlocked shadow for OTP cleared by the rom code
 496          * only executed in U-Boot proper when TF-A is not used
 497          */
 498
 499         if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) {
 500                 plat = dev_get_plat(dev);
 501
 502                 for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
 503                         if (!bsec_read_SR_lock(plat->base, otp))
 504                                 bsec_shadow_register(dev, plat->base, otp);
 505         }
 506
 507         return 0;
 508 }
 509
 510 static const struct udevice_id stm32mp_bsec_ids[] = {
 511         { .compatible = "st,stm32mp15-bsec" },
 512         {}
 513 };
 514
 515 U_BOOT_DRIVER(stm32mp_bsec) = {
 516         .name = "stm32mp_bsec",
 517         .id = UCLASS_MISC,
 518         .of_match = stm32mp_bsec_ids,
 519         .of_to_plat = stm32mp_bsec_of_to_plat,
 520         .plat_auto      = sizeof(struct stm32mp_bsec_plat),
 521         .ops = &stm32mp_bsec_ops,
 522         .probe = stm32mp_bsec_probe,
 523 };
 524
 525 bool bsec_dbgswenable(void)
 526 {
 527         struct udevice *dev;
 528         struct stm32mp_bsec_plat *plat;
 529         int ret;
 530
 531         ret = uclass_get_device_by_driver(UCLASS_MISC,
 532                                           DM_DRIVER_GET(stm32mp_bsec), &dev);
 533         if (ret || !dev) {
 534                 log_debug("bsec driver not available\n");
 535                 return false;
 536         }
 537
 538         plat = dev_get_plat(dev);
 539         if (readl(plat->base + BSEC_DENABLE_OFF) & BSEC_DENABLE_DBGSWENABLE)
 540                 return true;
 541
 542         return false;
 543 }