drivers/usb/host/xhci-rcar.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2017 Marek Vasut <[email protected]>
   4  *
   5  * Renesas RCar USB HOST xHCI Controller
   6  */
   7
   8 #include <common.h>
   9 #include <clk.h>
  10 #include <dm.h>
  11 #include <fdtdec.h>
  12 #include <malloc.h>
  13 #include <usb.h>
  14 #include <wait_bit.h>
  15 #include <dm/device_compat.h>
  16
  17 #include <usb/xhci.h>
  18 #include "xhci-rcar-r8a779x_usb3_v3.h"
  19
  20 /* Register Offset */
  21 #define RCAR_USB3_DL_CTRL       0x250   /* FW Download Control & Status */
  22 #define RCAR_USB3_FW_DATA0      0x258   /* FW Data0 */
  23
  24 /* Register Settings */
  25 /* FW Download Control & Status */
  26 #define RCAR_USB3_DL_CTRL_ENABLE        BIT(0)
  27 #define RCAR_USB3_DL_CTRL_FW_SUCCESS    BIT(4)
  28 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0  BIT(8)
  29
  30 struct rcar_xhci_platdata {
  31         fdt_addr_t      hcd_base;
  32         struct clk      clk;
  33 };
  34
  35 /**
  36  * Contains pointers to register base addresses
  37  * for the usb controller.
  38  */
  39 struct rcar_xhci {
  40         struct xhci_ctrl ctrl;  /* Needs to come first in this struct! */
  41         struct usb_platdata usb_plat;
  42         struct xhci_hccr *hcd;
  43 };
  44
  45 static int xhci_rcar_download_fw(struct rcar_xhci *ctx, const u32 *fw_data,
  46                                  const size_t fw_array_size)
  47 {
  48         void __iomem *regs = (void __iomem *)ctx->hcd;
  49         int i, ret;
  50
  51         /* Download R-Car USB3.0 firmware */
  52         setbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
  53
  54         for (i = 0; i < fw_array_size; i++) {
  55                 writel(fw_data[i], regs + RCAR_USB3_FW_DATA0);
  56                 setbits_le32(regs + RCAR_USB3_DL_CTRL,
  57                              RCAR_USB3_DL_CTRL_FW_SET_DATA0);
  58
  59                 ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
  60                                         RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
  61                                         10, false);
  62                 if (ret)
  63                         break;
  64         }
  65
  66         clrbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
  67
  68         ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
  69                                 RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
  70                                 10, false);
  71
  72         return ret;
  73 }
  74
  75 static int xhci_rcar_probe(struct udevice *dev)
  76 {
  77         struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
  78         struct rcar_xhci *ctx = dev_get_priv(dev);
  79         struct xhci_hcor *hcor;
  80         int len, ret;
  81
  82         ret = clk_get_by_index(dev, 0, &plat->clk);
  83         if (ret < 0) {
  84                 dev_err(dev, "Failed to get USB3 clock\n");
  85                 return ret;
  86         }
  87
  88         ret = clk_enable(&plat->clk);
  89         if (ret) {
  90                 dev_err(dev, "Failed to enable USB3 clock\n");
  91                 goto err_clk;
  92         }
  93
  94         ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
  95         len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));
  96         hcor = (struct xhci_hcor *)((uintptr_t)ctx->hcd + len);
  97
  98         ret = xhci_rcar_download_fw(ctx, firmware_r8a779x_usb3_v3,
  99                                     ARRAY_SIZE(firmware_r8a779x_usb3_v3));
 100         if (ret) {
 101                 dev_err(dev, "Failed to download firmware\n");
 102                 goto err_fw;
 103         }
 104
 105         ret = xhci_register(dev, ctx->hcd, hcor);
 106         if (ret) {
 107                 dev_err(dev, "Failed to register xHCI\n");
 108                 goto err_fw;
 109         }
 110
 111         return 0;
 112
 113 err_fw:
 114         clk_disable(&plat->clk);
 115 err_clk:
 116         clk_free(&plat->clk);
 117         return ret;
 118 }
 119
 120 static int xhci_rcar_deregister(struct udevice *dev)
 121 {
 122         int ret;
 123         struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
 124
 125         ret = xhci_deregister(dev);
 126
 127         clk_disable(&plat->clk);
 128         clk_free(&plat->clk);
 129
 130         return ret;
 131 }
 132
 133 static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)
 134 {
 135         struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
 136
 137         plat->hcd_base = devfdt_get_addr(dev);
 138         if (plat->hcd_base == FDT_ADDR_T_NONE) {
 139                 debug("Can't get the XHCI register base address\n");
 140                 return -ENXIO;
 141         }
 142
 143         return 0;
 144 }
 145
 146 static const struct udevice_id xhci_rcar_ids[] = {
 147         { .compatible = "renesas,xhci-r8a7795" },
 148         { .compatible = "renesas,xhci-r8a7796" },
 149         { .compatible = "renesas,xhci-r8a77965" },
 150         { }
 151 };
 152
 153 U_BOOT_DRIVER(usb_xhci) = {
 154         .name           = "xhci_rcar",
 155         .id             = UCLASS_USB,
 156         .probe          = xhci_rcar_probe,
 157         .remove         = xhci_rcar_deregister,
 158         .ops            = &xhci_usb_ops,
 159         .of_match       = xhci_rcar_ids,
 160         .ofdata_to_platdata = xhci_rcar_ofdata_to_platdata,
 161         .platdata_auto_alloc_size = sizeof(struct rcar_xhci_platdata),
 162         .priv_auto_alloc_size = sizeof(struct rcar_xhci),
 163         .flags          = DM_FLAG_ALLOC_PRIV_DMA,
 164 };