drivers/pinctrl/pinctrl-single.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) EETS GmbH, 2017, Felix Brack <[email protected]>
   4  */
   5
   6 #include <common.h>
   7 #include <dm.h>
   8 #include <dm/device_compat.h>
   9 #include <dm/pinctrl.h>
  10 #include <linux/libfdt.h>
  11 #include <asm/io.h>
  12
  13 DECLARE_GLOBAL_DATA_PTR;
  14
  15 struct single_pdata {
  16         fdt_addr_t base;        /* first configuration register */
  17         int offset;             /* index of last configuration register */
  18         u32 mask;               /* configuration-value mask bits */
  19         int width;              /* configuration register bit width */
  20         bool bits_per_mux;
  21 };
  22
  23 struct single_fdt_pin_cfg {
  24         fdt32_t reg;            /* configuration register offset */
  25         fdt32_t val;            /* configuration register value */
  26 };
  27
  28 struct single_fdt_bits_cfg {
  29         fdt32_t reg;            /* configuration register offset */
  30         fdt32_t val;            /* configuration register value */
  31         fdt32_t mask;           /* configuration register mask */
  32 };
  33
  34 /**
  35  * single_configure_pins() - Configure pins based on FDT data
  36  *
  37  * @dev: Pointer to single pin configuration device which is the parent of
  38  *       the pins node holding the pin configuration data.
  39  * @pins: Pointer to the first element of an array of register/value pairs
  40  *        of type 'struct single_fdt_pin_cfg'. Each such pair describes the
  41  *        the pin to be configured and the value to be used for configuration.
  42  *        This pointer points to a 'pinctrl-single,pins' property in the
  43  *        device-tree.
  44  * @size: Size of the 'pins' array in bytes.
  45  *        The number of register/value pairs in the 'pins' array therefore
  46  *        equals to 'size / sizeof(struct single_fdt_pin_cfg)'.
  47  */
  48 static int single_configure_pins(struct udevice *dev,
  49                                  const struct single_fdt_pin_cfg *pins,
  50                                  int size)
  51 {
  52         struct single_pdata *pdata = dev->platdata;
  53         int count = size / sizeof(struct single_fdt_pin_cfg);
  54         phys_addr_t n, reg;
  55         u32 val;
  56
  57         for (n = 0; n < count; n++, pins++) {
  58                 reg = fdt32_to_cpu(pins->reg);
  59                 if ((reg < 0) || (reg > pdata->offset)) {
  60                         dev_dbg(dev, "  invalid register offset 0x%pa\n", &reg);
  61                         continue;
  62                 }
  63                 reg += pdata->base;
  64                 val = fdt32_to_cpu(pins->val) & pdata->mask;
  65                 switch (pdata->width) {
  66                 case 16:
  67                         writew((readw(reg) & ~pdata->mask) | val, reg);
  68                         break;
  69                 case 32:
  70                         writel((readl(reg) & ~pdata->mask) | val, reg);
  71                         break;
  72                 default:
  73                         dev_warn(dev, "unsupported register width %i\n",
  74                                  pdata->width);
  75                         continue;
  76                 }
  77                 dev_dbg(dev, "  reg/val 0x%pa/0x%08x\n", &reg, val);
  78         }
  79         return 0;
  80 }
  81
  82 static int single_configure_bits(struct udevice *dev,
  83                                  const struct single_fdt_bits_cfg *pins,
  84                                  int size)
  85 {
  86         struct single_pdata *pdata = dev->platdata;
  87         int count = size / sizeof(struct single_fdt_bits_cfg);
  88         phys_addr_t n, reg;
  89         u32 val, mask;
  90
  91         for (n = 0; n < count; n++, pins++) {
  92                 reg = fdt32_to_cpu(pins->reg);
  93                 if ((reg < 0) || (reg > pdata->offset)) {
  94                         dev_dbg(dev, "  invalid register offset 0x%pa\n", &reg);
  95                         continue;
  96                 }
  97                 reg += pdata->base;
  98
  99                 mask = fdt32_to_cpu(pins->mask);
 100                 val = fdt32_to_cpu(pins->val) & mask;
 101
 102                 switch (pdata->width) {
 103                 case 16:
 104                         writew((readw(reg) & ~mask) | val, reg);
 105                         break;
 106                 case 32:
 107                         writel((readl(reg) & ~mask) | val, reg);
 108                         break;
 109                 default:
 110                         dev_warn(dev, "unsupported register width %i\n",
 111                                  pdata->width);
 112                         continue;
 113                 }
 114                 dev_dbg(dev, "  reg/val 0x%pa/0x%08x\n", &reg, val);
 115         }
 116         return 0;
 117 }
 118 static int single_set_state(struct udevice *dev,
 119                             struct udevice *config)
 120 {
 121         const void *fdt = gd->fdt_blob;
 122         const struct single_fdt_pin_cfg *prop;
 123         const struct single_fdt_bits_cfg *prop_bits;
 124         int len;
 125
 126         prop = fdt_getprop(fdt, dev_of_offset(config), "pinctrl-single,pins",
 127                            &len);
 128
 129         if (prop) {
 130                 dev_dbg(dev, "configuring pins for %s\n", config->name);
 131                 if (len % sizeof(struct single_fdt_pin_cfg)) {
 132                         dev_dbg(dev, "  invalid pin configuration in fdt\n");
 133                         return -FDT_ERR_BADSTRUCTURE;
 134                 }
 135                 single_configure_pins(dev, prop, len);
 136                 return 0;
 137         }
 138
 139         /* pinctrl-single,pins not found so check for pinctrl-single,bits */
 140         prop_bits = fdt_getprop(fdt, dev_of_offset(config),
 141                                 "pinctrl-single,bits",
 142                                     &len);
 143         if (prop_bits) {
 144                 dev_dbg(dev, "configuring pins for %s\n", config->name);
 145                 if (len % sizeof(struct single_fdt_bits_cfg)) {
 146                         dev_dbg(dev, "  invalid bits configuration in fdt\n");
 147                         return -FDT_ERR_BADSTRUCTURE;
 148                 }
 149                 single_configure_bits(dev, prop_bits, len);
 150                 return 0;
 151         }
 152
 153         /* Neither 'pinctrl-single,pins' nor 'pinctrl-single,bits' were found */
 154         return len;
 155 }
 156
 157 static int single_ofdata_to_platdata(struct udevice *dev)
 158 {
 159         fdt_addr_t addr;
 160         u32 of_reg[2];
 161         int res;
 162         struct single_pdata *pdata = dev->platdata;
 163
 164         pdata->width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 165                                       "pinctrl-single,register-width", 0);
 166
 167         res = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
 168                                    "reg", of_reg, 2);
 169         if (res)
 170                 return res;
 171         pdata->offset = of_reg[1] - pdata->width / 8;
 172
 173         addr = devfdt_get_addr(dev);
 174         if (addr == FDT_ADDR_T_NONE) {
 175                 dev_dbg(dev, "no valid base register address\n");
 176                 return -EINVAL;
 177         }
 178         pdata->base = addr;
 179
 180         pdata->mask = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 181                                      "pinctrl-single,function-mask",
 182                                      0xffffffff);
 183         pdata->bits_per_mux = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
 184                                               "pinctrl-single,bit-per-mux");
 185
 186         return 0;
 187 }
 188
 189 const struct pinctrl_ops single_pinctrl_ops = {
 190         .set_state = single_set_state,
 191 };
 192
 193 static const struct udevice_id single_pinctrl_match[] = {
 194         { .compatible = "pinctrl-single" },
 195         { /* sentinel */ }
 196 };
 197
 198 U_BOOT_DRIVER(single_pinctrl) = {
 199         .name = "single-pinctrl",
 200         .id = UCLASS_PINCTRL,
 201         .of_match = single_pinctrl_match,
 202         .ops = &single_pinctrl_ops,
 203         .platdata_auto_alloc_size = sizeof(struct single_pdata),
 204         .ofdata_to_platdata = single_ofdata_to_platdata,
 205 };