drivers/nand_legacy/nand_legacy.c

   1 /*
   2  * (C) 2006 Denx
   3  * Driver for NAND support, Rick Bronson
   4  * borrowed heavily from:
   5  * (c) 1999 Machine Vision Holdings, Inc.
   6  * (c) 1999, 2000 David Woodhouse <[email protected]>
   7  *
   8  * Added 16-bit nand support
   9  * (C) 2004 Texas Instruments
  10  */
  11
  12 #include <common.h>
  13 #include <command.h>
  14 #include <malloc.h>
  15 #include <asm/io.h>
  16 #include <watchdog.h>
  17
  18 #if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
  19
  20 #include <linux/mtd/nand_legacy.h>
  21 #include <linux/mtd/nand_ids.h>
  22 #include <jffs2/jffs2.h>
  23
  24 #ifdef CONFIG_OMAP1510
  25 void archflashwp(void *archdata, int wp);
  26 #endif
  27
  28 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
  29
  30 #undef  PSYCHO_DEBUG
  31 #undef  NAND_DEBUG
  32
  33 /* ****************** WARNING *********************
  34  * When ALLOW_ERASE_BAD_DEBUG is non-zero the erase command will
  35  * erase (or at least attempt to erase) blocks that are marked
  36  * bad. This can be very handy if you are _sure_ that the block
  37  * is OK, say because you marked a good block bad to test bad
  38  * block handling and you are done testing, or if you have
  39  * accidentally marked blocks bad.
  40  *
  41  * Erasing factory marked bad blocks is a _bad_ idea. If the
  42  * erase succeeds there is no reliable way to find them again,
  43  * and attempting to program or erase bad blocks can affect
  44  * the data in _other_ (good) blocks.
  45  */
  46 #define  ALLOW_ERASE_BAD_DEBUG 0
  47
  48 #define CONFIG_MTD_NAND_ECC  /* enable ECC */
  49 #define CONFIG_MTD_NAND_ECC_JFFS2
  50
  51 /* bits for nand_legacy_rw() `cmd'; or together as needed */
  52 #define NANDRW_READ     0x01
  53 #define NANDRW_WRITE    0x00
  54 #define NANDRW_JFFS2    0x02
  55 #define NANDRW_JFFS2_SKIP       0x04
  56
  57
  58 /*
  59  * Exported variables etc.
  60  */
  61
  62 /* Definition of the out of band configuration structure */
  63 struct nand_oob_config {
  64         /* position of ECC bytes inside oob */
  65         int ecc_pos[6];
  66         /* position of  bad blk flag inside oob -1 = inactive */
  67         int badblock_pos;
  68         /* position of ECC valid flag inside oob -1 = inactive */
  69         int eccvalid_pos;
  70 } oob_config = { {0}, 0, 0};
  71
  72 struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}};
  73
  74 int curr_device = -1; /* Current NAND Device */
  75
  76
  77 /*
  78  * Exported functionss
  79  */
  80 int nand_legacy_erase(struct nand_chip* nand, size_t ofs,
  81                      size_t len, int clean);
  82 int nand_legacy_rw(struct nand_chip* nand, int cmd,
  83                   size_t start, size_t len,
  84                   size_t * retlen, u_char * buf);
  85 void nand_print(struct nand_chip *nand);
  86 void nand_print_bad(struct nand_chip *nand);
  87 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
  88                  size_t * retlen, u_char * buf);
  89 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
  90                  size_t * retlen, const u_char * buf);
  91
  92 /*
  93  * Internals
  94  */
  95 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
  96 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
  97                  size_t * retlen, u_char *buf, u_char *ecc_code);
  98 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
  99                            size_t * retlen, const u_char * buf,
 100                            u_char * ecc_code);
 101 #ifdef CONFIG_MTD_NAND_ECC
 102 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
 103 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
 104 #endif
 105
 106
 107 /*
 108  *
 109  * Function definitions
 110  *
 111  */
 112
 113 /* returns 0 if block containing pos is OK:
 114  *              valid erase block and
 115  *              not marked bad, or no bad mark position is specified
 116  * returns 1 if marked bad or otherwise invalid
 117  */
 118 static int check_block (struct nand_chip *nand, unsigned long pos)
 119 {
 120         size_t retlen;
 121         uint8_t oob_data;
 122         uint16_t oob_data16[6];
 123         int page0 = pos & (-nand->erasesize);
 124         int page1 = page0 + nand->oobblock;
 125         int badpos = oob_config.badblock_pos;
 126
 127         if (pos >= nand->totlen)
 128                 return 1;
 129
 130         if (badpos < 0)
 131                 return 0;       /* no way to check, assume OK */
 132
 133         if (nand->bus16) {
 134                 if (nand_read_oob(nand, (page0 + 0), 12, &retlen, (uint8_t *)oob_data16)
 135                     || (oob_data16[2] & 0xff00) != 0xff00)
 136                         return 1;
 137                 if (nand_read_oob(nand, (page1 + 0), 12, &retlen, (uint8_t *)oob_data16)
 138                     || (oob_data16[2] & 0xff00) != 0xff00)
 139                         return 1;
 140         } else {
 141                 /* Note - bad block marker can be on first or second page */
 142                 if (nand_read_oob(nand, page0 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 143                     || oob_data != 0xff
 144                     || nand_read_oob (nand, page1 + badpos, 1, &retlen, (unsigned char *)&oob_data)
 145                     || oob_data != 0xff)
 146                         return 1;
 147         }
 148
 149         return 0;
 150 }
 151
 152 /* print bad blocks in NAND flash */
 153 void nand_print_bad(struct nand_chip* nand)
 154 {
 155         unsigned long pos;
 156
 157         for (pos = 0; pos < nand->totlen; pos += nand->erasesize) {
 158                 if (check_block(nand, pos))
 159                         printf(" 0x%8.8lx\n", pos);
 160         }
 161         puts("\n");
 162 }
 163
 164 /* cmd: 0: NANDRW_WRITE                 write, fail on bad block
 165  *      1: NANDRW_READ                  read, fail on bad block
 166  *      2: NANDRW_WRITE | NANDRW_JFFS2  write, skip bad blocks
 167  *      3: NANDRW_READ | NANDRW_JFFS2   read, data all 0xff for bad blocks
 168  *      7: NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP read, skip bad blocks
 169  */
 170 int nand_legacy_rw (struct nand_chip* nand, int cmd,
 171                    size_t start, size_t len,
 172                    size_t * retlen, u_char * buf)
 173 {
 174         int ret = 0, n, total = 0;
 175         char eccbuf[6];
 176         /* eblk (once set) is the start of the erase block containing the
 177          * data being processed.
 178          */
 179         unsigned long eblk = ~0;        /* force mismatch on first pass */
 180         unsigned long erasesize = nand->erasesize;
 181
 182         while (len) {
 183                 if ((start & (-erasesize)) != eblk) {
 184                         /* have crossed into new erase block, deal with
 185                          * it if it is sure marked bad.
 186                          */
 187                         eblk = start & (-erasesize); /* start of block */
 188                         if (check_block(nand, eblk)) {
 189                                 if (cmd == (NANDRW_READ | NANDRW_JFFS2)) {
 190                                         while (len > 0 &&
 191                                                start - eblk < erasesize) {
 192                                                 *(buf++) = 0xff;
 193                                                 ++start;
 194                                                 ++total;
 195                                                 --len;
 196                                         }
 197                                         continue;
 198                                 } else if (cmd == (NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP)) {
 199                                         start += erasesize;
 200                                         continue;
 201                                 } else if (cmd == (NANDRW_WRITE | NANDRW_JFFS2)) {
 202                                         /* skip bad block */
 203                                         start += erasesize;
 204                                         continue;
 205                                 } else {
 206                                         ret = 1;
 207                                         break;
 208                                 }
 209                         }
 210                 }
 211                 /* The ECC will not be calculated correctly if
 212                    less than 512 is written or read */
 213                 /* Is request at least 512 bytes AND it starts on a proper boundry */
 214                 if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
 215                         printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
 216
 217                 if (cmd & NANDRW_READ) {
 218                         ret = nand_read_ecc(nand, start,
 219                                            min(len, eblk + erasesize - start),
 220                                            (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 221                 } else {
 222                         ret = nand_write_ecc(nand, start,
 223                                             min(len, eblk + erasesize - start),
 224                                             (size_t *)&n, (u_char*)buf, (u_char *)eccbuf);
 225                 }
 226
 227                 if (ret)
 228                         break;
 229
 230                 start  += n;
 231                 buf   += n;
 232                 total += n;
 233                 len   -= n;
 234         }
 235         if (retlen)
 236                 *retlen = total;
 237
 238         return ret;
 239 }
 240
 241 void nand_print(struct nand_chip *nand)
 242 {
 243         if (nand->numchips > 1) {
 244                 printf("%s at 0x%lx,\n"
 245                        "\t  %d chips %s, size %d MB, \n"
 246                        "\t  total size %ld MB, sector size %ld kB\n",
 247                        nand->name, nand->IO_ADDR, nand->numchips,
 248                        nand->chips_name, 1 << (nand->chipshift - 20),
 249                        nand->totlen >> 20, nand->erasesize >> 10);
 250         }
 251         else {
 252                 printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR);
 253                 print_size(nand->totlen, ", ");
 254                 print_size(nand->erasesize, " sector)\n");
 255         }
 256 }
 257
 258 /* ------------------------------------------------------------------------- */
 259
 260 static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
 261 {
 262         /* This is inline, to optimise the common case, where it's ready instantly */
 263         int ret = 0;
 264
 265 #ifdef NAND_NO_RB       /* in config file, shorter delays currently wrap accesses */
 266         if(ale_wait)
 267                 NAND_WAIT_READY(nand);  /* do the worst case 25us wait */
 268         else
 269                 udelay(10);
 270 #else   /* has functional r/b signal */
 271         NAND_WAIT_READY(nand);
 272 #endif
 273         return ret;
 274 }
 275
 276 /* NanD_Command: Send a flash command to the flash chip */
 277
 278 static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
 279 {
 280         unsigned long nandptr = nand->IO_ADDR;
 281
 282         /* Assert the CLE (Command Latch Enable) line to the flash chip */
 283         NAND_CTL_SETCLE(nandptr);
 284
 285         /* Send the command */
 286         WRITE_NAND_COMMAND(command, nandptr);
 287
 288         /* Lower the CLE line */
 289         NAND_CTL_CLRCLE(nandptr);
 290
 291 #ifdef NAND_NO_RB
 292         if(command == NAND_CMD_RESET){
 293                 u_char ret_val;
 294                 NanD_Command(nand, NAND_CMD_STATUS);
 295                 do {
 296                         ret_val = READ_NAND(nandptr);/* wait till ready */
 297                 } while((ret_val & 0x40) != 0x40);
 298         }
 299 #endif
 300         return NanD_WaitReady(nand, 0);
 301 }
 302
 303 /* NanD_Address: Set the current address for the flash chip */
 304
 305 static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
 306 {
 307         unsigned long nandptr;
 308         int i;
 309
 310         nandptr = nand->IO_ADDR;
 311
 312         /* Assert the ALE (Address Latch Enable) line to the flash chip */
 313         NAND_CTL_SETALE(nandptr);
 314
 315         /* Send the address */
 316         /* Devices with 256-byte page are addressed as:
 317          * Column (bits 0-7), Page (bits 8-15, 16-23, 24-31)
 318          * there is no device on the market with page256
 319          * and more than 24 bits.
 320          * Devices with 512-byte page are addressed as:
 321          * Column (bits 0-7), Page (bits 9-16, 17-24, 25-31)
 322          * 25-31 is sent only if the chip support it.
 323          * bit 8 changes the read command to be sent
 324          * (NAND_CMD_READ0 or NAND_CMD_READ1).
 325          */
 326
 327         if (numbytes == ADDR_COLUMN || numbytes == ADDR_COLUMN_PAGE)
 328                 WRITE_NAND_ADDRESS(ofs, nandptr);
 329
 330         ofs = ofs >> nand->page_shift;
 331
 332         if (numbytes == ADDR_PAGE || numbytes == ADDR_COLUMN_PAGE) {
 333                 for (i = 0; i < nand->pageadrlen; i++, ofs = ofs >> 8) {
 334                         WRITE_NAND_ADDRESS(ofs, nandptr);
 335                 }
 336         }
 337
 338         /* Lower the ALE line */
 339         NAND_CTL_CLRALE(nandptr);
 340
 341         /* Wait for the chip to respond */
 342         return NanD_WaitReady(nand, 1);
 343 }
 344
 345 /* NanD_SelectChip: Select a given flash chip within the current floor */
 346
 347 static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
 348 {
 349         /* Wait for it to be ready */
 350         return NanD_WaitReady(nand, 0);
 351 }
 352
 353 /* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
 354
 355 static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
 356 {
 357         int mfr, id, i;
 358
 359         NAND_ENABLE_CE(nand);  /* set pin low */
 360         /* Reset the chip */
 361         if (NanD_Command(nand, NAND_CMD_RESET)) {
 362 #ifdef NAND_DEBUG
 363                 printf("NanD_Command (reset) for %d,%d returned true\n",
 364                        floor, chip);
 365 #endif
 366                 NAND_DISABLE_CE(nand);  /* set pin high */
 367                 return 0;
 368         }
 369
 370         /* Read the NAND chip ID: 1. Send ReadID command */
 371         if (NanD_Command(nand, NAND_CMD_READID)) {
 372 #ifdef NAND_DEBUG
 373                 printf("NanD_Command (ReadID) for %d,%d returned true\n",
 374                        floor, chip);
 375 #endif
 376                 NAND_DISABLE_CE(nand);  /* set pin high */
 377                 return 0;
 378         }
 379
 380         /* Read the NAND chip ID: 2. Send address byte zero */
 381         NanD_Address(nand, ADDR_COLUMN, 0);
 382
 383         /* Read the manufacturer and device id codes from the device */
 384
 385         mfr = READ_NAND(nand->IO_ADDR);
 386
 387         id = READ_NAND(nand->IO_ADDR);
 388
 389         NAND_DISABLE_CE(nand);  /* set pin high */
 390
 391 #ifdef NAND_DEBUG
 392         printf("NanD_Command (ReadID) got %x %x\n", mfr, id);
 393 #endif
 394         if (mfr == 0xff || mfr == 0) {
 395                 /* No response - return failure */
 396                 return 0;
 397         }
 398
 399         /* Check it's the same as the first chip we identified.
 400          * M-Systems say that any given nand_chip device should only
 401          * contain _one_ type of flash part, although that's not a
 402          * hardware restriction. */
 403         if (nand->mfr) {
 404                 if (nand->mfr == mfr && nand->id == id) {
 405                         return 1;       /* This is another the same the first */
 406                 } else {
 407                         printf("Flash chip at floor %d, chip %d is different:\n",
 408                                floor, chip);
 409                 }
 410         }
 411
 412         /* Print and store the manufacturer and ID codes. */
 413         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
 414                 if (mfr == nand_flash_ids[i].manufacture_id &&
 415                     id == nand_flash_ids[i].model_id) {
 416 #ifdef NAND_DEBUG
 417                         printf("Flash chip found:\n\t Manufacturer ID: 0x%2.2X, "
 418                                "Chip ID: 0x%2.2X (%s)\n", mfr, id,
 419                                nand_flash_ids[i].name);
 420 #endif
 421                         if (!nand->mfr) {
 422                                 nand->mfr = mfr;
 423                                 nand->id = id;
 424                                 nand->chipshift =
 425                                     nand_flash_ids[i].chipshift;
 426                                 nand->page256 = nand_flash_ids[i].page256;
 427                                 nand->eccsize = 256;
 428                                 if (nand->page256) {
 429                                         nand->oobblock = 256;
 430                                         nand->oobsize = 8;
 431                                         nand->page_shift = 8;
 432                                 } else {
 433                                         nand->oobblock = 512;
 434                                         nand->oobsize = 16;
 435                                         nand->page_shift = 9;
 436                                 }
 437                                 nand->pageadrlen = nand_flash_ids[i].pageadrlen;
 438                                 nand->erasesize  = nand_flash_ids[i].erasesize;
 439                                 nand->chips_name = nand_flash_ids[i].name;
 440                                 nand->bus16      = nand_flash_ids[i].bus16;
 441                                 return 1;
 442                         }
 443                         return 0;
 444                 }
 445         }
 446
 447
 448 #ifdef NAND_DEBUG
 449         /* We haven't fully identified the chip. Print as much as we know. */
 450         printf("Unknown flash chip found: %2.2X %2.2X\n",
 451                id, mfr);
 452 #endif
 453
 454         return 0;
 455 }
 456
 457 /* NanD_ScanChips: Find all NAND chips present in a nand_chip, and identify them */
 458
 459 static void NanD_ScanChips(struct nand_chip *nand)
 460 {
 461         int floor, chip;
 462         int numchips[NAND_MAX_FLOORS];
 463         int maxchips = NAND_MAX_CHIPS;
 464         int ret = 1;
 465
 466         nand->numchips = 0;
 467         nand->mfr = 0;
 468         nand->id = 0;
 469
 470
 471         /* For each floor, find the number of valid chips it contains */
 472         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 473                 ret = 1;
 474                 numchips[floor] = 0;
 475                 for (chip = 0; chip < maxchips && ret != 0; chip++) {
 476
 477                         ret = NanD_IdentChip(nand, floor, chip);
 478                         if (ret) {
 479                                 numchips[floor]++;
 480                                 nand->numchips++;
 481                         }
 482                 }
 483         }
 484
 485         /* If there are none at all that we recognise, bail */
 486         if (!nand->numchips) {
 487 #ifdef NAND_DEBUG
 488                 puts ("No NAND flash chips recognised.\n");
 489 #endif
 490                 return;
 491         }
 492
 493         /* Allocate an array to hold the information for each chip */
 494         nand->chips = malloc(sizeof(struct Nand) * nand->numchips);
 495         if (!nand->chips) {
 496                 puts ("No memory for allocating chip info structures\n");
 497                 return;
 498         }
 499
 500         ret = 0;
 501
 502         /* Fill out the chip array with {floor, chipno} for each
 503          * detected chip in the device. */
 504         for (floor = 0; floor < NAND_MAX_FLOORS; floor++) {
 505                 for (chip = 0; chip < numchips[floor]; chip++) {
 506                         nand->chips[ret].floor = floor;
 507                         nand->chips[ret].chip = chip;
 508                         nand->chips[ret].curadr = 0;
 509                         nand->chips[ret].curmode = 0x50;
 510                         ret++;
 511                 }
 512         }
 513
 514         /* Calculate and print the total size of the device */
 515         nand->totlen = nand->numchips * (1 << nand->chipshift);
 516
 517 #ifdef NAND_DEBUG
 518         printf("%d flash chips found. Total nand_chip size: %ld MB\n",
 519                nand->numchips, nand->totlen >> 20);
 520 #endif
 521 }
 522
 523 /* we need to be fast here, 1 us per read translates to 1 second per meg */
 524 static void NanD_ReadBuf (struct nand_chip *nand, u_char * data_buf, int cntr)
 525 {
 526         unsigned long nandptr = nand->IO_ADDR;
 527
 528         NanD_Command (nand, NAND_CMD_READ0);
 529
 530         if (nand->bus16) {
 531                 u16 val;
 532
 533                 while (cntr >= 16) {
 534                         val = READ_NAND (nandptr);
 535                         *data_buf++ = val & 0xff;
 536                         *data_buf++ = val >> 8;
 537                         val = READ_NAND (nandptr);
 538                         *data_buf++ = val & 0xff;
 539                         *data_buf++ = val >> 8;
 540                         val = READ_NAND (nandptr);
 541                         *data_buf++ = val & 0xff;
 542                         *data_buf++ = val >> 8;
 543                         val = READ_NAND (nandptr);
 544                         *data_buf++ = val & 0xff;
 545                         *data_buf++ = val >> 8;
 546                         val = READ_NAND (nandptr);
 547                         *data_buf++ = val & 0xff;
 548                         *data_buf++ = val >> 8;
 549                         val = READ_NAND (nandptr);
 550                         *data_buf++ = val & 0xff;
 551                         *data_buf++ = val >> 8;
 552                         val = READ_NAND (nandptr);
 553                         *data_buf++ = val & 0xff;
 554                         *data_buf++ = val >> 8;
 555                         val = READ_NAND (nandptr);
 556                         *data_buf++ = val & 0xff;
 557                         *data_buf++ = val >> 8;
 558                         cntr -= 16;
 559                 }
 560
 561                 while (cntr > 0) {
 562                         val = READ_NAND (nandptr);
 563                         *data_buf++ = val & 0xff;
 564                         *data_buf++ = val >> 8;
 565                         cntr -= 2;
 566                 }
 567         } else {
 568                 while (cntr >= 16) {
 569                         *data_buf++ = READ_NAND (nandptr);
 570                         *data_buf++ = READ_NAND (nandptr);
 571                         *data_buf++ = READ_NAND (nandptr);
 572                         *data_buf++ = READ_NAND (nandptr);
 573                         *data_buf++ = READ_NAND (nandptr);
 574                         *data_buf++ = READ_NAND (nandptr);
 575                         *data_buf++ = READ_NAND (nandptr);
 576                         *data_buf++ = READ_NAND (nandptr);
 577                         *data_buf++ = READ_NAND (nandptr);
 578                         *data_buf++ = READ_NAND (nandptr);
 579                         *data_buf++ = READ_NAND (nandptr);
 580                         *data_buf++ = READ_NAND (nandptr);
 581                         *data_buf++ = READ_NAND (nandptr);
 582                         *data_buf++ = READ_NAND (nandptr);
 583                         *data_buf++ = READ_NAND (nandptr);
 584                         *data_buf++ = READ_NAND (nandptr);
 585                         cntr -= 16;
 586                 }
 587
 588                 while (cntr > 0) {
 589                         *data_buf++ = READ_NAND (nandptr);
 590                         cntr--;
 591                 }
 592         }
 593 }
 594
 595 /*
 596  * NAND read with ECC
 597  */
 598 static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
 599                  size_t * retlen, u_char *buf, u_char *ecc_code)
 600 {
 601         int col, page;
 602         int ecc_status = 0;
 603 #ifdef CONFIG_MTD_NAND_ECC
 604         int j;
 605         int ecc_failed = 0;
 606         u_char *data_poi;
 607         u_char ecc_calc[6];
 608 #endif
 609
 610         /* Do not allow reads past end of device */
 611         if ((start + len) > nand->totlen) {
 612                 printf ("%s: Attempt read beyond end of device %x %x %x\n",
 613                         __FUNCTION__, (uint) start, (uint) len, (uint) nand->totlen);
 614                 *retlen = 0;
 615                 return -1;
 616         }
 617
 618         /* First we calculate the starting page */
 619         /*page = shr(start, nand->page_shift);*/
 620         page = start >> nand->page_shift;
 621
 622         /* Get raw starting column */
 623         col = start & (nand->oobblock - 1);
 624
 625         /* Initialize return value */
 626         *retlen = 0;
 627
 628         /* Select the NAND device */
 629         NAND_ENABLE_CE(nand);  /* set pin low */
 630
 631         /* Loop until all data read */
 632         while (*retlen < len) {
 633
 634 #ifdef CONFIG_MTD_NAND_ECC
 635                 /* Do we have this page in cache ? */
 636                 if (nand->cache_page == page)
 637                         goto readdata;
 638                 /* Send the read command */
 639                 NanD_Command(nand, NAND_CMD_READ0);
 640                 if (nand->bus16) {
 641                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 642                                      (page << nand->page_shift) + (col >> 1));
 643                 } else {
 644                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 645                                      (page << nand->page_shift) + col);
 646                 }
 647
 648                 /* Read in a page + oob data */
 649                 NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize);
 650
 651                 /* copy data into cache, for read out of cache and if ecc fails */
 652                 if (nand->data_cache) {
 653                         memcpy (nand->data_cache, nand->data_buf,
 654                                 nand->oobblock + nand->oobsize);
 655                 }
 656
 657                 /* Pick the ECC bytes out of the oob data */
 658                 for (j = 0; j < 6; j++) {
 659                         ecc_code[j] = nand->data_buf[(nand->oobblock + oob_config.ecc_pos[j])];
 660                 }
 661
 662                 /* Calculate the ECC and verify it */
 663                 /* If block was not written with ECC, skip ECC */
 664                 if (oob_config.eccvalid_pos != -1 &&
 665                     (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0x0f) != 0x0f) {
 666
 667                         nand_calculate_ecc (&nand->data_buf[0], &ecc_calc[0]);
 668                         switch (nand_correct_data (&nand->data_buf[0], &ecc_code[0], &ecc_calc[0])) {
 669                         case -1:
 670                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 671                                 ecc_failed++;
 672                                 break;
 673                         case 1:
 674                         case 2: /* transfer ECC corrected data to cache */
 675                                 if (nand->data_cache)
 676                                         memcpy (nand->data_cache, nand->data_buf, 256);
 677                                 break;
 678                         }
 679                 }
 680
 681                 if (oob_config.eccvalid_pos != -1 &&
 682                     nand->oobblock == 512 && (nand->data_buf[nand->oobblock + oob_config.eccvalid_pos] & 0xf0) != 0xf0) {
 683
 684                         nand_calculate_ecc (&nand->data_buf[256], &ecc_calc[3]);
 685                         switch (nand_correct_data (&nand->data_buf[256], &ecc_code[3], &ecc_calc[3])) {
 686                         case -1:
 687                                 printf ("%s: Failed ECC read, page 0x%08x\n", __FUNCTION__, page);
 688                                 ecc_failed++;
 689                                 break;
 690                         case 1:
 691                         case 2: /* transfer ECC corrected data to cache */
 692                                 if (nand->data_cache)
 693                                         memcpy (&nand->data_cache[256], &nand->data_buf[256], 256);
 694                                 break;
 695                         }
 696                 }
 697 readdata:
 698                 /* Read the data from ECC data buffer into return buffer */
 699                 data_poi = (nand->data_cache) ? nand->data_cache : nand->data_buf;
 700                 data_poi += col;
 701                 if ((*retlen + (nand->oobblock - col)) >= len) {
 702                         memcpy (buf + *retlen, data_poi, len - *retlen);
 703                         *retlen = len;
 704                 } else {
 705                         memcpy (buf + *retlen, data_poi,  nand->oobblock - col);
 706                         *retlen += nand->oobblock - col;
 707                 }
 708                 /* Set cache page address, invalidate, if ecc_failed */
 709                 nand->cache_page = (nand->data_cache && !ecc_failed) ? page : -1;
 710
 711                 ecc_status += ecc_failed;
 712                 ecc_failed = 0;
 713
 714 #else
 715                 /* Send the read command */
 716                 NanD_Command(nand, NAND_CMD_READ0);
 717                 if (nand->bus16) {
 718                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 719                                      (page << nand->page_shift) + (col >> 1));
 720                 } else {
 721                         NanD_Address(nand, ADDR_COLUMN_PAGE,
 722                                      (page << nand->page_shift) + col);
 723                 }
 724
 725                 /* Read the data directly into the return buffer */
 726                 if ((*retlen + (nand->oobblock - col)) >= len) {
 727                         NanD_ReadBuf(nand, buf + *retlen, len - *retlen);
 728                         *retlen = len;
 729                         /* We're done */
 730                         continue;
 731                 } else {
 732                         NanD_ReadBuf(nand, buf + *retlen, nand->oobblock - col);
 733                         *retlen += nand->oobblock - col;
 734                         }
 735 #endif
 736                 /* For subsequent reads align to page boundary. */
 737                 col = 0;
 738                 /* Increment page address */
 739                 page++;
 740         }
 741
 742         /* De-select the NAND device */
 743         NAND_DISABLE_CE(nand);  /* set pin high */
 744
 745         /*
 746          * Return success, if no ECC failures, else -EIO
 747          * fs driver will take care of that, because
 748          * retlen == desired len and result == -EIO
 749          */
 750         return ecc_status ? -1 : 0;
 751 }
 752
 753 /*
 754  *      Nand_page_program function is used for write and writev !
 755  */
 756 static int nand_write_page (struct nand_chip *nand,
 757                             int page, int col, int last, u_char * ecc_code)
 758 {
 759
 760         int i;
 761         unsigned long nandptr = nand->IO_ADDR;
 762
 763 #ifdef CONFIG_MTD_NAND_ECC
 764 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 765         int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
 766 #endif
 767 #endif
 768         /* pad oob area */
 769         for (i = nand->oobblock; i < nand->oobblock + nand->oobsize; i++)
 770                 nand->data_buf[i] = 0xff;
 771
 772 #ifdef CONFIG_MTD_NAND_ECC
 773         /* Zero out the ECC array */
 774         for (i = 0; i < 6; i++)
 775                 ecc_code[i] = 0x00;
 776
 777         /* Read back previous written data, if col > 0 */
 778         if (col) {
 779                 NanD_Command (nand, NAND_CMD_READ0);
 780                 if (nand->bus16) {
 781                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 782                                       (page << nand->page_shift) + (col >> 1));
 783                 } else {
 784                         NanD_Address (nand, ADDR_COLUMN_PAGE,
 785                                       (page << nand->page_shift) + col);
 786                 }
 787
 788                 if (nand->bus16) {
 789                         u16 val;
 790
 791                         for (i = 0; i < col; i += 2) {
 792                                 val = READ_NAND (nandptr);
 793                                 nand->data_buf[i] = val & 0xff;
 794                                 nand->data_buf[i + 1] = val >> 8;
 795                         }
 796                 } else {
 797                         for (i = 0; i < col; i++)
 798                                 nand->data_buf[i] = READ_NAND (nandptr);
 799                 }
 800         }
 801
 802         /* Calculate and write the ECC if we have enough data */
 803         if ((col < nand->eccsize) && (last >= nand->eccsize)) {
 804                 nand_calculate_ecc (&nand->data_buf[0], &(ecc_code[0]));
 805                 for (i = 0; i < 3; i++) {
 806                         nand->data_buf[(nand->oobblock +
 807                                         oob_config.ecc_pos[i])] = ecc_code[i];
 808                 }
 809                 if (oob_config.eccvalid_pos != -1) {
 810                         nand->data_buf[nand->oobblock +
 811                                        oob_config.eccvalid_pos] = 0xf0;
 812                 }
 813         }
 814
 815         /* Calculate and write the second ECC if we have enough data */
 816         if ((nand->oobblock == 512) && (last == nand->oobblock)) {
 817                 nand_calculate_ecc (&nand->data_buf[256], &(ecc_code[3]));
 818                 for (i = 3; i < 6; i++) {
 819                         nand->data_buf[(nand->oobblock +
 820                                         oob_config.ecc_pos[i])] = ecc_code[i];
 821                 }
 822                 if (oob_config.eccvalid_pos != -1) {
 823                         nand->data_buf[nand->oobblock +
 824                                        oob_config.eccvalid_pos] &= 0x0f;
 825                 }
 826         }
 827 #endif
 828         /* Prepad for partial page programming !!! */
 829         for (i = 0; i < col; i++)
 830                 nand->data_buf[i] = 0xff;
 831
 832         /* Postpad for partial page programming !!! oob is already padded */
 833         for (i = last; i < nand->oobblock; i++)
 834                 nand->data_buf[i] = 0xff;
 835
 836         /* Send command to begin auto page programming */
 837         NanD_Command (nand, NAND_CMD_READ0);
 838         NanD_Command (nand, NAND_CMD_SEQIN);
 839         if (nand->bus16) {
 840                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 841                               (page << nand->page_shift) + (col >> 1));
 842         } else {
 843                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 844                               (page << nand->page_shift) + col);
 845         }
 846
 847         /* Write out complete page of data */
 848         if (nand->bus16) {
 849                 for (i = 0; i < (nand->oobblock + nand->oobsize); i += 2) {
 850                         WRITE_NAND (nand->data_buf[i] +
 851                                     (nand->data_buf[i + 1] << 8),
 852                                     nand->IO_ADDR);
 853                 }
 854         } else {
 855                 for (i = 0; i < (nand->oobblock + nand->oobsize); i++)
 856                         WRITE_NAND (nand->data_buf[i], nand->IO_ADDR);
 857         }
 858
 859         /* Send command to actually program the data */
 860         NanD_Command (nand, NAND_CMD_PAGEPROG);
 861         NanD_Command (nand, NAND_CMD_STATUS);
 862 #ifdef NAND_NO_RB
 863         {
 864                 u_char ret_val;
 865
 866                 do {
 867                         ret_val = READ_NAND (nandptr);  /* wait till ready */
 868                 } while ((ret_val & 0x40) != 0x40);
 869         }
 870 #endif
 871         /* See if device thinks it succeeded */
 872         if (READ_NAND (nand->IO_ADDR) & 0x01) {
 873                 printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__,
 874                         page);
 875                 return -1;
 876         }
 877 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 878         /*
 879          * The NAND device assumes that it is always writing to
 880          * a cleanly erased page. Hence, it performs its internal
 881          * write verification only on bits that transitioned from
 882          * 1 to 0. The device does NOT verify the whole page on a
 883          * byte by byte basis. It is possible that the page was
 884          * not completely erased or the page is becoming unusable
 885          * due to wear. The read with ECC would catch the error
 886          * later when the ECC page check fails, but we would rather
 887          * catch it early in the page write stage. Better to write
 888          * no data than invalid data.
 889          */
 890
 891         /* Send command to read back the page */
 892         if (col < nand->eccsize)
 893                 NanD_Command (nand, NAND_CMD_READ0);
 894         else
 895                 NanD_Command (nand, NAND_CMD_READ1);
 896         if (nand->bus16) {
 897                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 898                               (page << nand->page_shift) + (col >> 1));
 899         } else {
 900                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 901                               (page << nand->page_shift) + col);
 902         }
 903
 904         /* Loop through and verify the data */
 905         if (nand->bus16) {
 906                 for (i = col; i < last; i = +2) {
 907                         if ((nand->data_buf[i] +
 908                              (nand->data_buf[i + 1] << 8)) != READ_NAND (nand->IO_ADDR)) {
 909                                 printf ("%s: Failed write verify, page 0x%08x ",
 910                                         __FUNCTION__, page);
 911                                 return -1;
 912                         }
 913                 }
 914         } else {
 915                 for (i = col; i < last; i++) {
 916                         if (nand->data_buf[i] != READ_NAND (nand->IO_ADDR)) {
 917                                 printf ("%s: Failed write verify, page 0x%08x ",
 918                                         __FUNCTION__, page);
 919                                 return -1;
 920                         }
 921                 }
 922         }
 923
 924 #ifdef CONFIG_MTD_NAND_ECC
 925         /*
 926          * We also want to check that the ECC bytes wrote
 927          * correctly for the same reasons stated above.
 928          */
 929         NanD_Command (nand, NAND_CMD_READOOB);
 930         if (nand->bus16) {
 931                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 932                               (page << nand->page_shift) + (col >> 1));
 933         } else {
 934                 NanD_Address (nand, ADDR_COLUMN_PAGE,
 935                               (page << nand->page_shift) + col);
 936         }
 937         if (nand->bus16) {
 938                 for (i = 0; i < nand->oobsize; i += 2) {
 939                         u16 val;
 940
 941                         val = READ_NAND (nand->IO_ADDR);
 942                         nand->data_buf[i] = val & 0xff;
 943                         nand->data_buf[i + 1] = val >> 8;
 944                 }
 945         } else {
 946                 for (i = 0; i < nand->oobsize; i++) {
 947                         nand->data_buf[i] = READ_NAND (nand->IO_ADDR);
 948                 }
 949         }
 950         for (i = 0; i < ecc_bytes; i++) {
 951                 if ((nand->data_buf[(oob_config.ecc_pos[i])] != ecc_code[i]) && ecc_code[i]) {
 952                         printf ("%s: Failed ECC write "
 953                                 "verify, page 0x%08x, "
 954                                 "%6i bytes were succesful\n",
 955                                 __FUNCTION__, page, i);
 956                         return -1;
 957                 }
 958         }
 959 #endif  /* CONFIG_MTD_NAND_ECC */
 960 #endif  /* CONFIG_MTD_NAND_VERIFY_WRITE */
 961         return 0;
 962 }
 963
 964 static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 965                            size_t * retlen, const u_char * buf, u_char * ecc_code)
 966 {
 967         int i, page, col, cnt, ret = 0;
 968
 969         /* Do not allow write past end of device */
 970         if ((to + len) > nand->totlen) {
 971                 printf ("%s: Attempt to write past end of page\n", __FUNCTION__);
 972                 return -1;
 973         }
 974
 975         /* Shift to get page */
 976         page = ((int) to) >> nand->page_shift;
 977
 978         /* Get the starting column */
 979         col = to & (nand->oobblock - 1);
 980
 981         /* Initialize return length value */
 982         *retlen = 0;
 983
 984         /* Select the NAND device */
 985 #ifdef CONFIG_OMAP1510
 986         archflashwp(0,0);
 987 #endif
 988 #ifdef CFG_NAND_WP
 989         NAND_WP_OFF();
 990 #endif
 991
 992         NAND_ENABLE_CE(nand);  /* set pin low */
 993
 994         /* Check the WP bit */
 995         NanD_Command(nand, NAND_CMD_STATUS);
 996         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
 997                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
 998                 ret = -1;
 999                 goto out;
1000         }
1001
1002         /* Loop until all data is written */
1003         while (*retlen < len) {
1004                 /* Invalidate cache, if we write to this page */
1005                 if (nand->cache_page == page)
1006                         nand->cache_page = -1;
1007
1008                 /* Write data into buffer */
1009                 if ((col + len) >= nand->oobblock) {
1010                         for (i = col, cnt = 0; i < nand->oobblock; i++, cnt++) {
1011                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1012                         }
1013                 } else {
1014                         for (i = col, cnt = 0; cnt < (len - *retlen); i++, cnt++) {
1015                                 nand->data_buf[i] = buf[(*retlen + cnt)];
1016                         }
1017                 }
1018                 /* We use the same function for write and writev !) */
1019                 ret = nand_write_page (nand, page, col, i, ecc_code);
1020                 if (ret)
1021                         goto out;
1022
1023                 /* Next data start at page boundary */
1024                 col = 0;
1025
1026                 /* Update written bytes count */
1027                 *retlen += cnt;
1028
1029                 /* Increment page address */
1030                 page++;
1031         }
1032
1033         /* Return happy */
1034         *retlen = len;
1035
1036 out:
1037         /* De-select the NAND device */
1038         NAND_DISABLE_CE(nand);  /* set pin high */
1039 #ifdef CONFIG_OMAP1510
1040         archflashwp(0,1);
1041 #endif
1042 #ifdef CFG_NAND_WP
1043         NAND_WP_ON();
1044 #endif
1045
1046         return ret;
1047 }
1048
1049 /* read from the 16 bytes of oob data that correspond to a 512 byte
1050  * page or 2 256-byte pages.
1051  */
1052 int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
1053                          size_t * retlen, u_char * buf)
1054 {
1055         int len256 = 0;
1056         struct Nand *mychip;
1057         int ret = 0;
1058
1059         mychip = &nand->chips[ofs >> nand->chipshift];
1060
1061         /* update address for 2M x 8bit devices. OOB starts on the second */
1062         /* page to maintain compatibility with nand_read_ecc. */
1063         if (nand->page256) {
1064                 if (!(ofs & 0x8))
1065                         ofs += 0x100;
1066                 else
1067                         ofs -= 0x8;
1068         }
1069
1070         NAND_ENABLE_CE(nand);  /* set pin low */
1071         NanD_Command(nand, NAND_CMD_READOOB);
1072         if (nand->bus16) {
1073                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1074                              ((ofs >> nand->page_shift) << nand->page_shift) +
1075                                 ((ofs & (nand->oobblock - 1)) >> 1));
1076         } else {
1077                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1078         }
1079
1080         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1081         /* Note: datasheet says it should automaticaly wrap to the */
1082         /*       next OOB block, but it didn't work here. mf.      */
1083         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1084                 len256 = (ofs | 0x7) + 1 - ofs;
1085                 NanD_ReadBuf(nand, buf, len256);
1086
1087                 NanD_Command(nand, NAND_CMD_READOOB);
1088                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1089         }
1090
1091         NanD_ReadBuf(nand, &buf[len256], len - len256);
1092
1093         *retlen = len;
1094         /* Reading the full OOB data drops us off of the end of the page,
1095          * causing the flash device to go into busy mode, so we need
1096          * to wait until ready 11.4.1 and Toshiba TC58256FT nands */
1097
1098         ret = NanD_WaitReady(nand, 1);
1099         NAND_DISABLE_CE(nand);  /* set pin high */
1100
1101         return ret;
1102
1103 }
1104
1105 /* write to the 16 bytes of oob data that correspond to a 512 byte
1106  * page or 2 256-byte pages.
1107  */
1108 int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
1109                   size_t * retlen, const u_char * buf)
1110 {
1111         int len256 = 0;
1112         int i;
1113         unsigned long nandptr = nand->IO_ADDR;
1114
1115 #ifdef PSYCHO_DEBUG
1116         printf("nand_write_oob(%lx, %d): %2.2X %2.2X %2.2X %2.2X ... %2.2X %2.2X .. %2.2X %2.2X\n",
1117                (long)ofs, len, buf[0], buf[1], buf[2], buf[3],
1118                buf[8], buf[9], buf[14],buf[15]);
1119 #endif
1120
1121         NAND_ENABLE_CE(nand);  /* set pin low to enable chip */
1122
1123         /* Reset the chip */
1124         NanD_Command(nand, NAND_CMD_RESET);
1125
1126         /* issue the Read2 command to set the pointer to the Spare Data Area. */
1127         NanD_Command(nand, NAND_CMD_READOOB);
1128         if (nand->bus16) {
1129                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1130                              ((ofs >> nand->page_shift) << nand->page_shift) +
1131                                 ((ofs & (nand->oobblock - 1)) >> 1));
1132         } else {
1133                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1134         }
1135
1136         /* update address for 2M x 8bit devices. OOB starts on the second */
1137         /* page to maintain compatibility with nand_read_ecc. */
1138         if (nand->page256) {
1139                 if (!(ofs & 0x8))
1140                         ofs += 0x100;
1141                 else
1142                         ofs -= 0x8;
1143         }
1144
1145         /* issue the Serial Data In command to initial the Page Program process */
1146         NanD_Command(nand, NAND_CMD_SEQIN);
1147         if (nand->bus16) {
1148                 NanD_Address(nand, ADDR_COLUMN_PAGE,
1149                              ((ofs >> nand->page_shift) << nand->page_shift) +
1150                                 ((ofs & (nand->oobblock - 1)) >> 1));
1151         } else {
1152                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
1153         }
1154
1155         /* treat crossing 8-byte OOB data for 2M x 8bit devices */
1156         /* Note: datasheet says it should automaticaly wrap to the */
1157         /*       next OOB block, but it didn't work here. mf.      */
1158         if (nand->page256 && ofs + len > (ofs | 0x7) + 1) {
1159                 len256 = (ofs | 0x7) + 1 - ofs;
1160                 for (i = 0; i < len256; i++)
1161                         WRITE_NAND(buf[i], nandptr);
1162
1163                 NanD_Command(nand, NAND_CMD_PAGEPROG);
1164                 NanD_Command(nand, NAND_CMD_STATUS);
1165 #ifdef NAND_NO_RB
1166                 { u_char ret_val;
1167                         do {
1168                                 ret_val = READ_NAND(nandptr); /* wait till ready */
1169                         } while ((ret_val & 0x40) != 0x40);
1170                 }
1171 #endif
1172                 if (READ_NAND(nandptr) & 1) {
1173                         puts ("Error programming oob data\n");
1174                         /* There was an error */
1175                         NAND_DISABLE_CE(nand);  /* set pin high */
1176                         *retlen = 0;
1177                         return -1;
1178                 }
1179                 NanD_Command(nand, NAND_CMD_SEQIN);
1180                 NanD_Address(nand, ADDR_COLUMN_PAGE, ofs & (~0x1ff));
1181         }
1182
1183         if (nand->bus16) {
1184                 for (i = len256; i < len; i += 2) {
1185                         WRITE_NAND(buf[i] + (buf[i+1] << 8), nandptr);
1186                 }
1187         } else {
1188                 for (i = len256; i < len; i++)
1189                         WRITE_NAND(buf[i], nandptr);
1190         }
1191
1192         NanD_Command(nand, NAND_CMD_PAGEPROG);
1193         NanD_Command(nand, NAND_CMD_STATUS);
1194 #ifdef NAND_NO_RB
1195         {       u_char ret_val;
1196                 do {
1197                         ret_val = READ_NAND(nandptr); /* wait till ready */
1198                 } while ((ret_val & 0x40) != 0x40);
1199         }
1200 #endif
1201         if (READ_NAND(nandptr) & 1) {
1202                 puts ("Error programming oob data\n");
1203                 /* There was an error */
1204                 NAND_DISABLE_CE(nand);  /* set pin high */
1205                 *retlen = 0;
1206                 return -1;
1207         }
1208
1209         NAND_DISABLE_CE(nand);  /* set pin high */
1210         *retlen = len;
1211         return 0;
1212
1213 }
1214
1215 int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
1216 {
1217         /* This is defined as a structure so it will work on any system
1218          * using native endian jffs2 (the default).
1219          */
1220         static struct jffs2_unknown_node clean_marker = {
1221                 JFFS2_MAGIC_BITMASK,
1222                 JFFS2_NODETYPE_CLEANMARKER,
1223                 8               /* 8 bytes in this node */
1224         };
1225         unsigned long nandptr;
1226         struct Nand *mychip;
1227         int ret = 0;
1228
1229         if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) {
1230                 printf ("Offset and size must be sector aligned, erasesize = %d\n",
1231                         (int) nand->erasesize);
1232                 return -1;
1233         }
1234
1235         nandptr = nand->IO_ADDR;
1236
1237         /* Select the NAND device */
1238 #ifdef CONFIG_OMAP1510
1239         archflashwp(0,0);
1240 #endif
1241 #ifdef CFG_NAND_WP
1242         NAND_WP_OFF();
1243 #endif
1244     NAND_ENABLE_CE(nand);  /* set pin low */
1245
1246         /* Check the WP bit */
1247         NanD_Command(nand, NAND_CMD_STATUS);
1248         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1249                 printf ("nand_write_ecc: Device is write protected!!!\n");
1250                 ret = -1;
1251                 goto out;
1252         }
1253
1254         /* Check the WP bit */
1255         NanD_Command(nand, NAND_CMD_STATUS);
1256         if (!(READ_NAND(nand->IO_ADDR) & 0x80)) {
1257                 printf ("%s: Device is write protected!!!\n", __FUNCTION__);
1258                 ret = -1;
1259                 goto out;
1260         }
1261
1262         /* FIXME: Do nand in the background. Use timers or schedule_task() */
1263         while(len) {
1264                 /*mychip = &nand->chips[shr(ofs, nand->chipshift)];*/
1265                 mychip = &nand->chips[ofs >> nand->chipshift];
1266
1267                 /* always check for bad block first, genuine bad blocks
1268                  * should _never_  be erased.
1269                  */
1270                 if (ALLOW_ERASE_BAD_DEBUG || !check_block(nand, ofs)) {
1271                         /* Select the NAND device */
1272                         NAND_ENABLE_CE(nand);  /* set pin low */
1273
1274                         NanD_Command(nand, NAND_CMD_ERASE1);
1275                         NanD_Address(nand, ADDR_PAGE, ofs);
1276                         NanD_Command(nand, NAND_CMD_ERASE2);
1277
1278                         NanD_Command(nand, NAND_CMD_STATUS);
1279
1280 #ifdef NAND_NO_RB
1281                         {       u_char ret_val;
1282                                 do {
1283                                         ret_val = READ_NAND(nandptr); /* wait till ready */
1284                                 } while ((ret_val & 0x40) != 0x40);
1285                         }
1286 #endif
1287                         if (READ_NAND(nandptr) & 1) {
1288                                 printf ("%s: Error erasing at 0x%lx\n",
1289                                         __FUNCTION__, (long)ofs);
1290                                 /* There was an error */
1291                                 ret = -1;
1292                                 goto out;
1293                         }
1294                         if (clean) {
1295                                 int n;  /* return value not used */
1296                                 int p, l;
1297
1298                                 /* clean marker position and size depend
1299                                  * on the page size, since 256 byte pages
1300                                  * only have 8 bytes of oob data
1301                                  */
1302                                 if (nand->page256) {
1303                                         p = NAND_JFFS2_OOB8_FSDAPOS;
1304                                         l = NAND_JFFS2_OOB8_FSDALEN;
1305                                 } else {
1306                                         p = NAND_JFFS2_OOB16_FSDAPOS;
1307                                         l = NAND_JFFS2_OOB16_FSDALEN;
1308                                 }
1309
1310                                 ret = nand_write_oob(nand, ofs + p, l, (size_t *)&n,
1311                                                      (u_char *)&clean_marker);
1312                                 /* quit here if write failed */
1313                                 if (ret)
1314                                         goto out;
1315                         }
1316                 }
1317                 ofs += nand->erasesize;
1318                 len -= nand->erasesize;
1319         }
1320
1321 out:
1322         /* De-select the NAND device */
1323         NAND_DISABLE_CE(nand);  /* set pin high */
1324 #ifdef CONFIG_OMAP1510
1325         archflashwp(0,1);
1326 #endif
1327 #ifdef CFG_NAND_WP
1328         NAND_WP_ON();
1329 #endif
1330
1331         return ret;
1332 }
1333
1334
1335 static inline int nandcheck(unsigned long potential, unsigned long physadr)
1336 {
1337         return 0;
1338 }
1339
1340 unsigned long nand_probe(unsigned long physadr)
1341 {
1342         struct nand_chip *nand = NULL;
1343         int i = 0, ChipID = 1;
1344
1345 #ifdef CONFIG_MTD_NAND_ECC_JFFS2
1346         oob_config.ecc_pos[0] = NAND_JFFS2_OOB_ECCPOS0;
1347         oob_config.ecc_pos[1] = NAND_JFFS2_OOB_ECCPOS1;
1348         oob_config.ecc_pos[2] = NAND_JFFS2_OOB_ECCPOS2;
1349         oob_config.ecc_pos[3] = NAND_JFFS2_OOB_ECCPOS3;
1350         oob_config.ecc_pos[4] = NAND_JFFS2_OOB_ECCPOS4;
1351         oob_config.ecc_pos[5] = NAND_JFFS2_OOB_ECCPOS5;
1352         oob_config.eccvalid_pos = 4;
1353 #else
1354         oob_config.ecc_pos[0] = NAND_NOOB_ECCPOS0;
1355         oob_config.ecc_pos[1] = NAND_NOOB_ECCPOS1;
1356         oob_config.ecc_pos[2] = NAND_NOOB_ECCPOS2;
1357         oob_config.ecc_pos[3] = NAND_NOOB_ECCPOS3;
1358         oob_config.ecc_pos[4] = NAND_NOOB_ECCPOS4;
1359         oob_config.ecc_pos[5] = NAND_NOOB_ECCPOS5;
1360         oob_config.eccvalid_pos = NAND_NOOB_ECCVPOS;
1361 #endif
1362         oob_config.badblock_pos = 5;
1363
1364         for (i=0; i<CFG_MAX_NAND_DEVICE; i++) {
1365                 if (nand_dev_desc[i].ChipID == NAND_ChipID_UNKNOWN) {
1366                         nand = &nand_dev_desc[i];
1367                         break;
1368                 }
1369         }
1370         if (!nand)
1371                 return (0);
1372
1373         memset((char *)nand, 0, sizeof(struct nand_chip));
1374
1375         nand->IO_ADDR = physadr;
1376         nand->cache_page = -1;  /* init the cache page */
1377         NanD_ScanChips(nand);
1378
1379         if (nand->totlen == 0) {
1380                 /* no chips found, clean up and quit */
1381                 memset((char *)nand, 0, sizeof(struct nand_chip));
1382                 nand->ChipID = NAND_ChipID_UNKNOWN;
1383                 return (0);
1384         }
1385
1386         nand->ChipID = ChipID;
1387         if (curr_device == -1)
1388                 curr_device = i;
1389
1390         nand->data_buf = malloc (nand->oobblock + nand->oobsize);
1391         if (!nand->data_buf) {
1392                 puts ("Cannot allocate memory for data structures.\n");
1393                 return (0);
1394         }
1395
1396         return (nand->totlen);
1397 }
1398
1399 #ifdef CONFIG_MTD_NAND_ECC
1400 /*
1401  * Pre-calculated 256-way 1 byte column parity
1402  */
1403 static const u_char nand_ecc_precalc_table[] = {
1404         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1405         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
1406         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1407         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1408         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1409         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1410         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1411         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1412         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1413         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1414         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1415         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1416         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1417         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1418         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1419         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1420         0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30,
1421         0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
1422         0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55,
1423         0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
1424         0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56,
1425         0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
1426         0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33,
1427         0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
1428         0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59,
1429         0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
1430         0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c,
1431         0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
1432         0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f,
1433         0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
1434         0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a,
1435         0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
1436 };
1437
1438
1439 /*
1440  * Creates non-inverted ECC code from line parity
1441  */
1442 static void nand_trans_result(u_char reg2, u_char reg3,
1443         u_char *ecc_code)
1444 {
1445         u_char a, b, i, tmp1, tmp2;
1446
1447         /* Initialize variables */
1448         a = b = 0x80;
1449         tmp1 = tmp2 = 0;
1450
1451         /* Calculate first ECC byte */
1452         for (i = 0; i < 4; i++) {
1453                 if (reg3 & a)           /* LP15,13,11,9 --> ecc_code[0] */
1454                         tmp1 |= b;
1455                 b >>= 1;
1456                 if (reg2 & a)           /* LP14,12,10,8 --> ecc_code[0] */
1457                         tmp1 |= b;
1458                 b >>= 1;
1459                 a >>= 1;
1460         }
1461
1462         /* Calculate second ECC byte */
1463         b = 0x80;
1464         for (i = 0; i < 4; i++) {
1465                 if (reg3 & a)           /* LP7,5,3,1 --> ecc_code[1] */
1466                         tmp2 |= b;
1467                 b >>= 1;
1468                 if (reg2 & a)           /* LP6,4,2,0 --> ecc_code[1] */
1469                         tmp2 |= b;
1470                 b >>= 1;
1471                 a >>= 1;
1472         }
1473
1474         /* Store two of the ECC bytes */
1475         ecc_code[0] = tmp1;
1476         ecc_code[1] = tmp2;
1477 }
1478
1479 /*
1480  * Calculate 3 byte ECC code for 256 byte block
1481  */
1482 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code)
1483 {
1484         u_char idx, reg1, reg3;
1485         int j;
1486
1487         /* Initialize variables */
1488         reg1 = reg3 = 0;
1489         ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
1490
1491         /* Build up column parity */
1492         for(j = 0; j < 256; j++) {
1493
1494                 /* Get CP0 - CP5 from table */
1495                 idx = nand_ecc_precalc_table[dat[j]];
1496                 reg1 ^= idx;
1497
1498                 /* All bit XOR = 1 ? */
1499                 if (idx & 0x40) {
1500                         reg3 ^= (u_char) j;
1501                 }
1502         }
1503
1504         /* Create non-inverted ECC code from line parity */
1505         nand_trans_result((reg1 & 0x40) ? ~reg3 : reg3, reg3, ecc_code);
1506
1507         /* Calculate final ECC code */
1508         ecc_code[0] = ~ecc_code[0];
1509         ecc_code[1] = ~ecc_code[1];
1510         ecc_code[2] = ((~reg1) << 2) | 0x03;
1511 }
1512
1513 /*
1514  * Detect and correct a 1 bit error for 256 byte block
1515  */
1516 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
1517 {
1518         u_char a, b, c, d1, d2, d3, add, bit, i;
1519
1520         /* Do error detection */
1521         d1 = calc_ecc[0] ^ read_ecc[0];
1522         d2 = calc_ecc[1] ^ read_ecc[1];
1523         d3 = calc_ecc[2] ^ read_ecc[2];
1524
1525         if ((d1 | d2 | d3) == 0) {
1526                 /* No errors */
1527                 return 0;
1528         } else {
1529                 a = (d1 ^ (d1 >> 1)) & 0x55;
1530                 b = (d2 ^ (d2 >> 1)) & 0x55;
1531                 c = (d3 ^ (d3 >> 1)) & 0x54;
1532
1533                 /* Found and will correct single bit error in the data */
1534                 if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
1535                         c = 0x80;
1536                         add = 0;
1537                         a = 0x80;
1538                         for (i=0; i<4; i++) {
1539                                 if (d1 & c)
1540                                         add |= a;
1541                                 c >>= 2;
1542                                 a >>= 1;
1543                         }
1544                         c = 0x80;
1545                         for (i=0; i<4; i++) {
1546                                 if (d2 & c)
1547                                         add |= a;
1548                                 c >>= 2;
1549                                 a >>= 1;
1550                         }
1551                         bit = 0;
1552                         b = 0x04;
1553                         c = 0x80;
1554                         for (i=0; i<3; i++) {
1555                                 if (d3 & c)
1556                                         bit |= b;
1557                                 c >>= 2;
1558                                 b >>= 1;
1559                         }
1560                         b = 0x01;
1561                         a = dat[add];
1562                         a ^= (b << bit);
1563                         dat[add] = a;
1564                         return 1;
1565                 }
1566                 else {
1567                         i = 0;
1568                         while (d1) {
1569                                 if (d1 & 0x01)
1570                                         ++i;
1571                                 d1 >>= 1;
1572                         }
1573                         while (d2) {
1574                                 if (d2 & 0x01)
1575                                         ++i;
1576                                 d2 >>= 1;
1577                         }
1578                         while (d3) {
1579                                 if (d3 & 0x01)
1580                                         ++i;
1581                                 d3 >>= 1;
1582                         }
1583                         if (i == 1) {
1584                                 /* ECC Code Error Correction */
1585                                 read_ecc[0] = calc_ecc[0];
1586                                 read_ecc[1] = calc_ecc[1];
1587                                 read_ecc[2] = calc_ecc[2];
1588                                 return 2;
1589                         }
1590                         else {
1591                                 /* Uncorrectable Error */
1592                                 return -1;
1593                         }
1594                 }
1595         }
1596
1597         /* Should never happen */
1598         return -1;
1599 }
1600
1601 #endif
1602
1603 #ifdef CONFIG_JFFS2_NAND
1604 int read_jffs2_nand(size_t start, size_t len,
1605                 size_t * retlen, u_char * buf, int nanddev)
1606 {
1607         return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2,
1608                         start, len, retlen, buf);
1609 }
1610 #endif /* CONFIG_JFFS2_NAND */
1611
1612 #endif