1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration for Versatile Express. Parts were derived from other ARM
7 #ifndef __VEXPRESS_AEMV8_H
8 #define __VEXPRESS_AEMV8_H
10 #include <linux/stringify.h>
12 /* Link Definitions */
13 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
14 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
16 /* ATF loads u-boot here for BASE_FVP model */
17 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
20 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
22 /* CS register bases for the original memory map. */
23 #ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP
24 #define V2M_DRAM_BASE 0x00000000
25 #define V2M_PA_BASE 0x80000000
27 #define V2M_DRAM_BASE 0x80000000
28 #define V2M_PA_BASE 0x00000000
31 #define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000)
32 #define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000)
33 #define V2M_PA_CS2 (V2M_PA_BASE + 0x18000000)
34 #define V2M_PA_CS3 (V2M_PA_BASE + 0x1c000000)
35 #define V2M_PA_CS4 (V2M_PA_BASE + 0x0c000000)
36 #define V2M_PA_CS5 (V2M_PA_BASE + 0x10000000)
38 #define V2M_PERIPH_OFFSET(x) (x << 16)
39 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
40 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
41 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
43 /* Common peripherals relative to CS7. */
44 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
45 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
46 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
47 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
49 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
50 #define V2M_UART0 0x7ff80000
51 #define V2M_UART1 0x7ff70000
53 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
54 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
55 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
56 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
59 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
61 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
62 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
64 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
65 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
67 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
69 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
71 /* System register offsets. */
72 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
73 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
74 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
76 /* Generic Interrupt Controller Definitions */
78 #define GICD_BASE (V2M_PA_BASE + 0x2f000000)
79 #define GICR_BASE (V2M_PA_BASE + 0x2f100000)
82 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
83 #define GICD_BASE (0x2C010000)
84 #define GICC_BASE (0x2C02f000)
86 #define GICD_BASE (V2M_PA_BASE + 0x2f000000)
87 #define GICC_BASE (V2M_PA_BASE + 0x2c000000)
89 #endif /* !CONFIG_GICV3 */
91 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH)
92 /* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */
93 #define CONFIG_SMC91111 1
94 #define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000)
97 /* PL011 Serial Configuration */
98 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
99 #define CONFIG_PL011_CLOCK 7372800
101 #define CONFIG_PL011_CLOCK 24000000
104 /* Physical Memory Map */
105 #define PHYS_SDRAM_1 (V2M_DRAM_BASE) /* SDRAM Bank #1 */
106 /* Top 16MB reserved for secure world use */
107 #define DRAM_SEC_SIZE 0x01000000
108 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
109 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
111 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
112 #define PHYS_SDRAM_2 (0x880000000)
113 #define PHYS_SDRAM_2_SIZE 0x180000000
114 #elif CONFIG_NR_DRAM_BANKS == 2
115 #define PHYS_SDRAM_2 (0x880000000)
116 #define PHYS_SDRAM_2_SIZE 0x80000000
119 /* Copy the kernel, initrd and FDT from NOR flash to DRAM memory and boot. */
120 #define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \
122 "afs load ${kernel_name} ${kernel_addr_r} ;"\
123 "if test $? -eq 1; then "\
124 " echo Loading ${kernel_alt_name} instead of ${kernel_name}; "\
125 " afs load ${kernel_alt_name} ${kernel_addr_r};"\
127 "afs load ${fdtfile} ${fdt_addr_r} ;"\
128 "if test $? -eq 1; then "\
129 " echo Loading ${fdt_alt_name} instead of ${fdtfile}; "\
130 " afs load ${fdt_alt_name} ${fdt_addr_r}; "\
132 "fdt addr ${fdt_addr_r}; fdt resize; " \
133 "if afs load ${ramdisk_name} ${ramdisk_addr_r} ; "\
135 " setenv ramdisk_param ${ramdisk_addr_r}; "\
137 " setenv ramdisk_param -; "\
139 "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0"
140 #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs "
142 /* Boot by executing a U-Boot script pre-loaded into DRAM. */
143 #define BOOTENV_DEV_MEM(devtypeu, devtypel, instance) \
145 "source ${scriptaddr}; " \
146 "if test $? -eq 1; then " \
147 " env import -t ${scriptaddr}; " \
148 " if test -n $uenvcmd; then " \
149 " echo Running uenvcmd ...; " \
153 #define BOOTENV_DEV_NAME_MEM(devtypeu, devtypel, instance) "mem "
155 #ifdef CONFIG_CMD_VIRTIO
156 #define FUNC_VIRTIO(func) func(VIRTIO, virtio, 0)
158 #define FUNC_VIRTIO(func)
162 * Boot by loading an Android image, or kernel, initrd and FDT through
163 * semihosting into DRAM.
165 #define BOOTENV_DEV_SMH(devtypeu, devtypel, instance) \
167 "if load hostfs - ${boot_addr_r} ${boot_name}; then" \
168 " setenv bootargs;" \
169 " abootimg addr ${boot_addr_r};" \
170 " abootimg get dtb --index=0 fdt_addr_r;" \
171 " bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r};" \
173 " if load hostfs - ${kernel_addr_r} ${kernel_name}; then" \
174 " setenv fdt_high 0xffffffffffffffff;" \
175 " setenv initrd_high 0xffffffffffffffff;" \
176 " load hostfs - ${fdt_addr_r} ${fdtfile};" \
177 " load hostfs - ${ramdisk_addr_r} ${ramdisk_name};" \
178 " fdt addr ${fdt_addr_r};" \
180 " fdt chosen ${ramdisk_addr_r} ${filesize};" \
181 " booti $kernel_addr_r - $fdt_addr_r;" \
184 #define BOOTENV_DEV_NAME_SMH(devtypeu, devtypel, instance) "smh "
186 /* Boot sources for distro boot and load addresses, per board */
188 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO /* Arm Juno board */
190 #define BOOT_TARGET_DEVICES(func) \
192 func(SATA, sata, 0) \
193 func(SATA, sata, 1) \
195 func(DHCP, dhcp, na) \
198 #define VEXPRESS_KERNEL_ADDR 0x80080000
199 #define VEXPRESS_PXEFILE_ADDR 0x8fb00000
200 #define VEXPRESS_FDT_ADDR 0x8fc00000
201 #define VEXPRESS_SCRIPT_ADDR 0x8fd00000
202 #define VEXPRESS_RAMDISK_ADDR 0x8fe00000
204 #define EXTRA_ENV_NAMES \
205 "kernel_name=norkern\0" \
206 "kernel_alt_name=Image\0" \
207 "ramdisk_name=ramdisk.img\0" \
208 "fdtfile=board.dtb\0" \
209 "fdt_alt_name=juno\0"
211 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP /* ARMv8-A base model */
213 #define BOOT_TARGET_DEVICES(func) \
220 #define VEXPRESS_KERNEL_ADDR 0x80080000
221 #define VEXPRESS_PXEFILE_ADDR 0x8fa00000
222 #define VEXPRESS_SCRIPT_ADDR 0x8fb00000
223 #define VEXPRESS_FDT_ADDR 0x8fc00000
224 #define VEXPRESS_BOOT_ADDR 0x8fd00000
225 #define VEXPRESS_RAMDISK_ADDR 0x8fe00000
227 #define EXTRA_ENV_NAMES \
228 "kernel_name=Image\0" \
229 "ramdisk_name=ramdisk.img\0" \
230 "fdtfile=devtree.dtb\0" \
231 "boot_name=boot.img\0" \
232 "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0"
234 #elif CONFIG_TARGET_VEXPRESS64_BASER_FVP /* ARMv8-R base model */
236 #define BOOT_TARGET_DEVICES(func) \
242 #define VEXPRESS_KERNEL_ADDR 0x00200000
243 #define VEXPRESS_PXEFILE_ADDR 0x0fb00000
244 #define VEXPRESS_FDT_ADDR 0x0fc00000
245 #define VEXPRESS_SCRIPT_ADDR 0x0fd00000
246 #define VEXPRESS_RAMDISK_ADDR 0x0fe00000
248 #define EXTRA_ENV_NAMES \
249 "kernel_name=Image\0" \
250 "ramdisk_name=ramdisk.img\0" \
251 "fdtfile=board.dtb\0"
254 #include <config_distro_bootcmd.h>
256 /* Default load addresses and names for the different payloads. */
257 #define CONFIG_EXTRA_ENV_SETTINGS \
258 "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \
259 "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \
260 "pxefile_addr_r=" __stringify(VEXPRESS_PXEFILE_ADDR) "\0" \
261 "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \
262 "scriptaddr=" __stringify(VEXPRESS_SCRIPT_ADDR) "\0" \
266 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
267 #define CONFIG_SYS_FLASH_BASE 0x08000000
268 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
269 #define CONFIG_SYS_MAX_FLASH_SECT 259
270 /* Store environment at top of flash in the same location as blank.img */
271 /* in the Juno firmware. */
273 #define CONFIG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000)
274 /* 256 x 256KiB sectors */
275 #define CONFIG_SYS_MAX_FLASH_SECT 256
276 /* Store environment at top of flash */
279 #ifdef CONFIG_USB_EHCI_HCD
280 #define CONFIG_USB_OHCI_NEW
281 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
284 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
285 #define FLASH_MAX_SECTOR_SIZE 0x00040000
287 #endif /* __VEXPRESS_AEMV8_H */