]> Git Repo - J-u-boot.git/blob - configs/orangepi-5-rk3588s_defconfig
Merge patch series "configs: apple: Switch to standard boot + small adjustments"
[J-u-boot.git] / configs / orangepi-5-rk3588s_defconfig
1 CONFIG_ARM=y
2 CONFIG_SKIP_LOWLEVEL_INIT=y
3 CONFIG_COUNTER_FREQUENCY=24000000
4 CONFIG_ARCH_ROCKCHIP=y
5 CONFIG_NR_DRAM_BANKS=2
6 CONFIG_SF_DEFAULT_SPEED=24000000
7 CONFIG_SF_DEFAULT_MODE=0x2000
8 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5"
9 CONFIG_ROCKCHIP_RK3588=y
10 CONFIG_ROCKCHIP_SPI_IMAGE=y
11 CONFIG_SPL_SERIAL=y
12 CONFIG_TARGET_EVB_RK3588=y
13 CONFIG_DEBUG_UART_BASE=0xFEB50000
14 CONFIG_DEBUG_UART_CLOCK=24000000
15 CONFIG_SPL_SPI_FLASH_SUPPORT=y
16 CONFIG_SPL_SPI=y
17 CONFIG_SYS_LOAD_ADDR=0xc00800
18 CONFIG_PCI=y
19 CONFIG_DEBUG_UART=y
20 CONFIG_AHCI=y
21 CONFIG_FIT=y
22 CONFIG_FIT_VERBOSE=y
23 CONFIG_SPL_FIT_SIGNATURE=y
24 CONFIG_SPL_LOAD_FIT=y
25 CONFIG_LEGACY_IMAGE_FORMAT=y
26 CONFIG_OF_BOARD_SETUP=y
27 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5.dtb"
28 # CONFIG_DISPLAY_CPUINFO is not set
29 CONFIG_DISPLAY_BOARDINFO_LATE=y
30 CONFIG_SPL_MAX_SIZE=0x40000
31 CONFIG_SPL_PAD_TO=0x7f8000
32 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
33 CONFIG_SPL_SPI_LOAD=y
34 CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
35 CONFIG_SPL_ATF=y
36 CONFIG_CMD_GPIO=y
37 CONFIG_CMD_GPT=y
38 CONFIG_CMD_I2C=y
39 CONFIG_CMD_MMC=y
40 CONFIG_CMD_PCI=y
41 CONFIG_CMD_USB=y
42 # CONFIG_CMD_SETEXPR is not set
43 CONFIG_CMD_REGULATOR=y
44 # CONFIG_SPL_DOS_PARTITION is not set
45 CONFIG_SPL_OF_CONTROL=y
46 CONFIG_OF_LIVE=y
47 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
48 CONFIG_SPL_DM_SEQ_ALIAS=y
49 CONFIG_SPL_REGMAP=y
50 CONFIG_SPL_SYSCON=y
51 CONFIG_AHCI_PCI=y
52 CONFIG_DWC_AHCI=y
53 CONFIG_SPL_CLK=y
54 CONFIG_ROCKCHIP_GPIO=y
55 CONFIG_SYS_I2C_ROCKCHIP=y
56 CONFIG_MISC=y
57 CONFIG_SUPPORT_EMMC_RPMB=y
58 CONFIG_MMC_DW=y
59 CONFIG_MMC_DW_ROCKCHIP=y
60 CONFIG_SF_DEFAULT_BUS=5
61 CONFIG_SPI_FLASH_SFDP_SUPPORT=y
62 CONFIG_SPI_FLASH_XMC=y
63 CONFIG_PHY_MOTORCOMM=y
64 CONFIG_DWC_ETH_QOS=y
65 CONFIG_DWC_ETH_QOS_ROCKCHIP=y
66 CONFIG_NVME_PCI=y
67 CONFIG_PCIE_DW_ROCKCHIP=y
68 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
69 CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
70 CONFIG_PHY_ROCKCHIP_USBDP=y
71 CONFIG_SPL_PINCTRL=y
72 CONFIG_PWM_ROCKCHIP=y
73 CONFIG_SPL_RAM=y
74 CONFIG_SCSI=y
75 CONFIG_BAUDRATE=1500000
76 CONFIG_DEBUG_UART_SHIFT=2
77 CONFIG_SYS_NS16550_MEM32=y
78 CONFIG_ROCKCHIP_SFC=y
79 CONFIG_SYSRESET=y
80 CONFIG_USB=y
81 CONFIG_USB_XHCI_HCD=y
82 CONFIG_USB_EHCI_HCD=y
83 CONFIG_USB_EHCI_GENERIC=y
84 CONFIG_USB_OHCI_HCD=y
85 CONFIG_USB_OHCI_GENERIC=y
86 CONFIG_USB_DWC3=y
87 CONFIG_USB_DWC3_GENERIC=y
88 CONFIG_ERRNO_STR=y
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