1 // SPDX-License-Identifier: GPL-2.0+
9 * ispVM functions adapted from Lattice's ispmVMEmbedded code:
10 * Copyright 2009 Lattice Semiconductor Corp.
18 #include <linux/delay.h>
20 static lattice_board_specific_func *pfns;
21 static const char *fpga_image;
22 static unsigned long read_bytes;
23 static unsigned long bufsize;
24 static unsigned short expectedCRC;
27 * External variables and functions declared in ivm_core.c module.
29 extern unsigned short g_usCalculatedCRC;
30 extern unsigned short g_usDataType;
31 extern unsigned char *g_pucIntelBuffer;
32 extern unsigned char *g_pucHeapMemory;
33 extern unsigned short g_iHeapCounter;
34 extern unsigned short g_iHEAPSize;
35 extern unsigned short g_usIntelDataIndex;
36 extern unsigned short g_usIntelBufferSize;
37 extern char *const g_szSupportedVersions[];
43 * Users must implement a delay to observe a_usTimeDelay, where
44 * bit 15 of the a_usTimeDelay defines the unit.
48 * a_usTimeDelay = 0x0001 = 1 microsecond delay.
49 * a_usTimeDelay = 0x8001 = 1 millisecond delay.
51 * This subroutine is called upon to provide a delay from 1 millisecond to a few
52 * hundreds milliseconds each time.
53 * It is understood that due to a_usTimeDelay is defined as unsigned short, a 16
54 * bits integer, this function is restricted to produce a delay to 64000
55 * micro-seconds or 32000 milli-second maximum. The VME file will never pass on
56 * to this function a delay time > those maximum number. If it needs more than
57 * those maximum, the VME file will launch the delay function several times to
58 * realize a larger delay time cummulatively.
59 * It is perfectly alright to provide a longer delay than required. It is not
60 * acceptable if the delay is shorter.
62 void ispVMDelay(unsigned short delay)
65 delay = (delay & ~0x8000) * 1000;
69 void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
71 a_ucValue = a_ucValue ? 1 : 0;
75 pfns->jtag_set_tdi(a_ucValue);
78 pfns->jtag_set_tck(a_ucValue);
81 pfns->jtag_set_tms(a_ucValue);
84 printf("%s: requested unknown pin\n", __func__);
88 unsigned char readPort(void)
90 return pfns->jtag_get_tdo();
95 writePort(g_ucPinTCK, 0x01);
96 writePort(g_ucPinTCK, 0x00);
99 void calibration(void)
101 /* Apply 2 pulses to TCK. */
102 writePort(g_ucPinTCK, 0x00);
103 writePort(g_ucPinTCK, 0x01);
104 writePort(g_ucPinTCK, 0x00);
105 writePort(g_ucPinTCK, 0x01);
106 writePort(g_ucPinTCK, 0x00);
110 /* Apply 2 pulses to TCK. */
111 writePort(g_ucPinTCK, 0x01);
112 writePort(g_ucPinTCK, 0x00);
113 writePort(g_ucPinTCK, 0x01);
114 writePort(g_ucPinTCK, 0x00);
120 * Returns a byte to the caller. The returned byte depends on the
121 * g_usDataType register. If the HEAP_IN bit is set, then the byte
122 * is returned from the HEAP. If the LHEAP_IN bit is set, then
123 * the byte is returned from the intelligent buffer. Otherwise,
124 * the byte is returned directly from the VME file.
126 unsigned char GetByte(void)
128 unsigned char ucData;
129 unsigned int block_size = 4 * 1024;
131 if (g_usDataType & HEAP_IN) {
134 * Get data from repeat buffer.
137 if (g_iHeapCounter > g_iHEAPSize) {
146 ucData = g_pucHeapMemory[g_iHeapCounter++];
147 } else if (g_usDataType & LHEAP_IN) {
150 * Get data from intel buffer.
153 if (g_usIntelDataIndex >= g_usIntelBufferSize) {
157 ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
159 if (read_bytes == bufsize) {
162 ucData = *fpga_image++;
165 if (!(read_bytes % block_size)) {
166 printf("Downloading FPGA %ld/%ld completed\r",
171 if (expectedCRC != 0) {
172 ispVMCalculateCRC32(ucData);
179 signed char ispVM(void)
181 char szFileVersion[9] = { 0 };
182 signed char cRetCode = 0;
183 signed char cIndex = 0;
184 signed char cVersionIndex = 0;
185 unsigned char ucReadByte = 0;
188 g_pucHeapMemory = NULL;
191 g_usIntelDataIndex = 0;
192 g_usIntelBufferSize = 0;
193 g_usCalculatedCRC = 0;
195 ucReadByte = GetByte();
196 switch (ucReadByte) {
198 crc = (unsigned char)GetByte();
203 for (cIndex = 0; cIndex < 8; cIndex++)
204 szFileVersion[cIndex] = GetByte();
208 szFileVersion[0] = (signed char) ucReadByte;
209 for (cIndex = 1; cIndex < 8; cIndex++)
210 szFileVersion[cIndex] = GetByte();
217 * Compare the VME file version against the supported version.
221 for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0;
223 for (cIndex = 0; cIndex < 8; cIndex++) {
224 if (szFileVersion[cIndex] !=
225 g_szSupportedVersions[cVersionIndex][cIndex]) {
226 cRetCode = VME_VERSION_FAILURE;
238 return VME_VERSION_FAILURE;
241 printf("VME file checked: starting downloading to FPGA\n");
245 cRetCode = ispVMCode();
251 if (cRetCode == 0 && expectedCRC != 0 &&
252 (expectedCRC != g_usCalculatedCRC)) {
253 printf("Expected CRC: 0x%.4X\n", expectedCRC);
254 printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
255 return VME_CRC_FAILURE;
260 static int lattice_validate(Lattice_desc *desc, const char *fn)
265 if ((desc->family > min_lattice_type) &&
266 (desc->family < max_lattice_type)) {
267 if ((desc->iface > min_lattice_iface_type) &&
268 (desc->iface < max_lattice_iface_type)) {
272 printf("%s: NULL part size\n", fn);
275 printf("%s: Invalid Interface type, %d\n",
279 printf("%s: Invalid family type, %d\n",
283 printf("%s: NULL descriptor!\n", fn);
289 int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize)
291 int ret_val = FPGA_FAIL;
293 if (!lattice_validate(desc, (char *)__func__)) {
294 printf("%s: Invalid device descriptor\n", __func__);
296 pfns = desc->iface_fns;
298 switch (desc->family) {
303 debug("%s: Launching the Lattice ISPVME Loader:"
304 " addr %p size 0x%lx...\n",
305 __func__, fpga_image, bufsize);
308 printf("%s: error %d downloading FPGA image\n",
311 puts("FPGA downloaded successfully\n");
314 printf("%s: Unsupported family type, %d\n",
315 __func__, desc->family);
322 int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize)
324 puts("Dump not supported for Lattice FPGA\n");
330 int lattice_info(Lattice_desc *desc)
332 int ret_val = FPGA_FAIL;
334 if (lattice_validate(desc, (char *)__func__)) {
335 printf("Family: \t");
336 switch (desc->family) {
340 /* Add new family types here */
342 printf("Unknown family type, %d\n", desc->family);
345 puts("Interface type:\t");
346 switch (desc->iface) {
347 case lattice_jtag_mode:
350 /* Add new interface types here */
352 printf("Unsupported interface type, %d\n", desc->iface);
355 printf("Device Size: \t%d bytes\n",
358 if (desc->iface_fns) {
359 printf("Device Function Table @ 0x%p\n",
361 switch (desc->family) {
364 /* Add new family types here */
369 puts("No Device Function Table.\n");
373 printf("Model: \t%s\n", desc->desc);
375 ret_val = FPGA_SUCCESS;
377 printf("%s: Invalid device descriptor\n", __func__);