2 * (C) Copyright 2003-2007
7 * modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3
8 * Also changed the refresh for 100Mhz operation
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 #if defined(CONFIG_OF_FLAT_TREE)
36 /* Kollmorgen DPR initialization data */
42 {0x500003F2, 2, "\x86\x00"}, /* HW parameter */
43 {0x500003F0, 2, "\x00\x00"},
44 {0x500003EC, 4, "\x00\x80\xc1\x52"}, /* Magic word */
48 * Initialize Kollmorgen DPR
50 static void kollmorgen_init(void)
55 for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) {
56 p = (vu_char *)init_seq[i].addr;
57 for (j = 0; j < init_seq[i].len; ++j)
58 *(p + j) = *(init_seq[i].data + j);
61 printf("DPR: Kollmorgen DPR initialized\n");
66 * Early board initalization.
68 int board_early_init_r(void)
70 /* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */
71 *(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25);
72 *(vu_long *)MPC5XXX_ADDECR |= (1 << 16);
74 /* Initialize Kollmorgen DPR */
83 * Helper function to initialize SDRAM controller.
85 static void sdram_start (int hi_addr)
87 long hi_addr_bit = hi_addr ? 0x01000000 : 0;
89 /* unlock mode register */
90 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
93 /* precharge all banks */
94 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
98 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
101 /* auto refresh, second time */
102 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
105 /* set mode register */
106 *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
108 /* normal operation */
109 *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
111 #endif /* !CFG_RAMBOOT */
115 * Initalize SDRAM - configure SDRAM controller, detect memory size.
117 long int initdram (int board_type)
123 /* configure SDRAM start/end for detection */
124 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
125 *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */
127 /* setup config registers */
128 *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
129 *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
132 test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
134 test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
142 /* memory smaller than 1MB is impossible */
143 if (dramsize < (1 << 20))
146 /* set SDRAM CS0 size according to the amount of RAM found */
148 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
149 __builtin_ffs(dramsize >> 20) - 1;
151 *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
153 /* let SDRAM CS1 start right after CS0 and disable it */
154 *(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize;
156 #else /* !CFG_RAMBOOT */
157 /* retrieve size of memory connected to SDRAM CS0 */
158 dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
159 if (dramsize >= 0x13)
160 dramsize = (1 << (dramsize - 0x13)) << 20;
163 #endif /* CFG_RAMBOOT */
165 /* return total ram size */
170 int checkboard (void)
172 puts("Board: Promess Motion-PRO board\n");
177 #if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
178 void ft_board_setup(void *blob, bd_t *bd)
180 ft_cpu_setup(blob, bd);
182 #endif /* defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) */