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[J-u-boot.git] / arch / arm / mach-socfpga / timer_s10.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2017-2018 Intel Corporation <www.intel.com>
4  *
5  */
6
7 #include <common.h>
8 #include <init.h>
9 #include <asm/io.h>
10 #include <asm/arch/timer.h>
11
12 /*
13  * Timer initialization
14  */
15 int timer_init(void)
16 {
17 #ifdef CONFIG_SPL_BUILD
18         int enable = 0x3;       /* timer enable + output signal masked */
19         int loadval = ~0;
20
21         /* enable system counter */
22         writel(enable, SOCFPGA_GTIMER_SEC_ADDRESS);
23         /* enable processor pysical counter */
24         asm volatile("msr cntp_ctl_el0, %0" : : "r" (enable));
25         asm volatile("msr cntp_tval_el0, %0" : : "r" (loadval));
26 #endif
27         return 0;
28 }
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