1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments DSPS platforms "glue layer"
5 * Copyright (C) 2012, by Texas Instruments
7 * Based on the am35x "glue layer" code.
9 * This file is part of the Inventra Controller Driver for Linux.
11 * musb_dsps.c will be a common file for all the TI DSPS platforms
12 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
13 * For now only ti81x is using this and in future davinci.c, am35x.c
14 * da8xx.c would be merged to this file after testing.
18 #include <linux/init.h>
20 #include <linux/err.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/module.h>
27 #include <linux/of_device.h>
28 #include <linux/of_address.h>
33 #include <asm/omap_musb.h>
34 #include "linux-compat.h"
37 #include "musb_core.h"
40 * avoid using musb_readx()/musb_writex() as glue layer should not be
41 * dependent on musb core layer symbols.
43 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
44 { return __raw_readb(addr + offset); }
46 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
47 { return __raw_readl(addr + offset); }
49 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
50 { __raw_writeb(data, addr + offset); }
52 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
53 { __raw_writel(data, addr + offset); }
56 * DSPS musb wrapper register offset.
57 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
60 struct dsps_musb_wrapper {
74 /* bit positions for control */
77 /* bit positions for interrupt */
83 unsigned txep_shift:5;
87 unsigned rxep_shift:5;
91 /* bit positions for phy_utmi */
92 unsigned otg_disable:5;
94 /* bit positions for mode */
96 /* miscellaneous stuff */
101 static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
107 .epintr_clear = 0x40,
108 .epintr_status = 0x30,
109 .coreintr_set = 0x3c,
110 .coreintr_clear = 0x44,
111 .coreintr_status = 0x34,
119 .usb_bitmap = (0x1ff << 0),
123 .txep_bitmap = (0xffff << 0),
126 .rxep_bitmap = (0xfffe << 16),
127 .musb_core_offset = 0x400,
132 * DSPS glue structure.
136 struct platform_device *musb; /* child musb pdev */
137 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
138 struct timer_list timer; /* otg_workaround timer */
142 * dsps_musb_enable - enable interrupts
145 static void dsps_musb_enable(struct musb *musb)
147 static int dsps_musb_enable(struct musb *musb)
151 struct device *dev = musb->controller;
152 struct platform_device *pdev = to_platform_device(dev->parent);
153 struct dsps_glue *glue = platform_get_drvdata(pdev);
154 const struct dsps_musb_wrapper *wrp = glue->wrp;
156 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
158 void __iomem *reg_base = musb->ctrl_base;
159 u32 epmask, coremask;
161 /* Workaround: setup IRQs through both register sets. */
162 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
163 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
164 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
166 dsps_writel(reg_base, wrp->epintr_set, epmask);
167 dsps_writel(reg_base, wrp->coreintr_set, coremask);
168 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
170 if (is_otg_enabled(musb))
171 dsps_writel(reg_base, wrp->coreintr_set,
172 (1 << wrp->drvvbus) << wrp->usb_shift);
179 * dsps_musb_disable - disable HDRC and flush interrupts
181 static void dsps_musb_disable(struct musb *musb)
184 struct device *dev = musb->controller;
185 struct platform_device *pdev = to_platform_device(dev->parent);
186 struct dsps_glue *glue = platform_get_drvdata(pdev);
187 const struct dsps_musb_wrapper *wrp = glue->wrp;
188 void __iomem *reg_base = musb->ctrl_base;
190 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
191 dsps_writel(reg_base, wrp->epintr_clear,
192 wrp->txep_bitmap | wrp->rxep_bitmap);
193 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
194 dsps_writel(reg_base, wrp->eoi, 0);
199 static void otg_timer(unsigned long _musb)
201 struct musb *musb = (void *)_musb;
202 void __iomem *mregs = musb->mregs;
203 struct device *dev = musb->controller;
204 struct platform_device *pdev = to_platform_device(dev->parent);
205 struct dsps_glue *glue = platform_get_drvdata(pdev);
206 const struct dsps_musb_wrapper *wrp = glue->wrp;
211 * We poll because DSPS IP's won't expose several OTG-critical
212 * status change events (from the transceiver) otherwise.
214 devctl = dsps_readb(mregs, MUSB_DEVCTL);
215 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
216 otg_state_string(musb->xceiv->state));
218 spin_lock_irqsave(&musb->lock, flags);
219 switch (musb->xceiv->state) {
220 case OTG_STATE_A_WAIT_BCON:
221 devctl &= ~MUSB_DEVCTL_SESSION;
222 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
224 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
225 if (devctl & MUSB_DEVCTL_BDEVICE) {
226 musb->xceiv->state = OTG_STATE_B_IDLE;
229 musb->xceiv->state = OTG_STATE_A_IDLE;
233 case OTG_STATE_A_WAIT_VFALL:
234 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
235 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
236 MUSB_INTR_VBUSERROR << wrp->usb_shift);
238 case OTG_STATE_B_IDLE:
239 if (!is_peripheral_enabled(musb))
242 devctl = dsps_readb(mregs, MUSB_DEVCTL);
243 if (devctl & MUSB_DEVCTL_BDEVICE)
244 mod_timer(&glue->timer,
245 jiffies + wrp->poll_seconds * HZ);
247 musb->xceiv->state = OTG_STATE_A_IDLE;
252 spin_unlock_irqrestore(&musb->lock, flags);
255 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
257 struct device *dev = musb->controller;
258 struct platform_device *pdev = to_platform_device(dev->parent);
259 struct dsps_glue *glue = platform_get_drvdata(pdev);
260 static unsigned long last_timer;
262 if (!is_otg_enabled(musb))
266 timeout = jiffies + msecs_to_jiffies(3);
268 /* Never idle if active, or when VBUS timeout is not set as host */
269 if (musb->is_active || (musb->a_wait_bcon == 0 &&
270 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
271 dev_dbg(musb->controller, "%s active, deleting timer\n",
272 otg_state_string(musb->xceiv->state));
273 del_timer(&glue->timer);
274 last_timer = jiffies;
278 if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
279 dev_dbg(musb->controller,
280 "Longer idle timer already pending, ignoring...\n");
283 last_timer = timeout;
285 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
286 otg_state_string(musb->xceiv->state),
287 jiffies_to_msecs(timeout - jiffies));
288 mod_timer(&glue->timer, timeout);
292 static irqreturn_t dsps_interrupt(int irq, void *hci)
294 struct musb *musb = hci;
295 void __iomem *reg_base = musb->ctrl_base;
297 struct device *dev = musb->controller;
298 struct platform_device *pdev = to_platform_device(dev->parent);
299 struct dsps_glue *glue = platform_get_drvdata(pdev);
300 const struct dsps_musb_wrapper *wrp = glue->wrp;
302 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
305 irqreturn_t ret = IRQ_NONE;
308 spin_lock_irqsave(&musb->lock, flags);
310 /* Get endpoint interrupts */
311 epintr = dsps_readl(reg_base, wrp->epintr_status);
312 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
313 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
316 dsps_writel(reg_base, wrp->epintr_status, epintr);
318 /* Get usb core interrupts */
319 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
320 if (!usbintr && !epintr)
323 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
325 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
327 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
331 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
332 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
333 * switch appropriately between halves of the OTG state machine.
334 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
335 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
336 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
338 if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
339 pr_info("CAUTION: musb: Babble Interrupt Occured\n");
341 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
342 int drvvbus = dsps_readl(reg_base, wrp->status);
343 void __iomem *mregs = musb->mregs;
344 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
347 err = is_host_enabled(musb) && (musb->int_usb &
348 MUSB_INTR_VBUSERROR);
351 * The Mentor core doesn't debounce VBUS as needed
352 * to cope with device connect current spikes. This
353 * means it's not uncommon for bus-powered devices
354 * to get VBUS errors during enumeration.
356 * This is a workaround, but newer RTL from Mentor
357 * seems to allow a better one: "re"-starting sessions
358 * without waiting for VBUS to stop registering in
361 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
362 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
363 mod_timer(&glue->timer,
364 jiffies + wrp->poll_seconds * HZ);
365 WARNING("VBUS error workaround (delay coming)\n");
366 } else if (is_host_enabled(musb) && drvvbus) {
369 musb->xceiv->otg->default_a = 1;
370 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
371 del_timer(&glue->timer);
375 musb->xceiv->otg->default_a = 0;
376 musb->xceiv->state = OTG_STATE_B_IDLE;
379 /* NOTE: this must complete power-on within 100 ms. */
380 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
381 drvvbus ? "on" : "off",
382 otg_state_string(musb->xceiv->state),
389 if (musb->int_tx || musb->int_rx || musb->int_usb)
390 ret |= musb_interrupt(musb);
393 /* EOI needs to be written for the IRQ to be re-asserted. */
394 if (ret == IRQ_HANDLED || epintr || usbintr)
395 dsps_writel(reg_base, wrp->eoi, 1);
398 /* Poll for ID change */
399 if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
400 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
403 spin_unlock_irqrestore(&musb->lock, flags);
408 static int dsps_musb_init(struct musb *musb)
411 struct device *dev = musb->controller;
412 struct musb_hdrc_platform_data *plat = dev->platform_data;
413 struct platform_device *pdev = to_platform_device(dev->parent);
414 struct dsps_glue *glue = platform_get_drvdata(pdev);
415 const struct dsps_musb_wrapper *wrp = glue->wrp;
416 struct omap_musb_board_data *data = plat->board_data;
418 struct omap_musb_board_data *data =
419 (struct omap_musb_board_data *)musb->controller;
420 const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
422 void __iomem *reg_base = musb->ctrl_base;
426 /* mentor core register starts at offset of 0x400 from musb base */
427 musb->mregs += wrp->musb_core_offset;
430 /* NOP driver needs change if supporting dual instance */
431 usb_nop_xceiv_register();
432 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
433 if (IS_ERR_OR_NULL(musb->xceiv))
437 /* Returns zero if e.g. not clocked */
438 rev = dsps_readl(reg_base, wrp->revision);
445 if (is_host_enabled(musb))
446 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
450 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
452 /* Start the on-chip PHY and its PLL. */
453 if (data && data->set_phy_power)
454 data->set_phy_power(data->dev, 1);
456 musb->isr = dsps_interrupt;
458 /* reset the otgdisable bit, needed for host mode to work */
459 val = dsps_readl(reg_base, wrp->phy_utmi);
460 val &= ~(1 << wrp->otg_disable);
461 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
463 /* clear level interrupt */
464 dsps_writel(reg_base, wrp->eoi, 0);
469 usb_put_phy(musb->xceiv);
470 usb_nop_xceiv_unregister();
475 static int dsps_musb_exit(struct musb *musb)
478 struct device *dev = musb->controller;
479 struct musb_hdrc_platform_data *plat = dev->platform_data;
480 struct omap_musb_board_data *data = plat->board_data;
481 struct platform_device *pdev = to_platform_device(dev->parent);
482 struct dsps_glue *glue = platform_get_drvdata(pdev);
484 struct omap_musb_board_data *data =
485 (struct omap_musb_board_data *)musb->controller;
489 if (is_host_enabled(musb))
490 del_timer_sync(&glue->timer);
493 /* Shutdown the on-chip PHY and its PLL. */
494 if (data && data->set_phy_power)
495 data->set_phy_power(data->dev, 0);
498 /* NOP driver needs change if supporting dual instance */
499 usb_put_phy(musb->xceiv);
500 usb_nop_xceiv_unregister();
507 static struct musb_platform_ops dsps_ops = {
509 struct musb_platform_ops musb_dsps_ops = {
511 .init = dsps_musb_init,
512 .exit = dsps_musb_exit,
514 .enable = dsps_musb_enable,
515 .disable = dsps_musb_disable,
518 .try_idle = dsps_musb_try_idle,
523 static u64 musb_dmamask = DMA_BIT_MASK(32);
527 static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
529 struct device *dev = glue->dev;
530 struct platform_device *pdev = to_platform_device(dev);
531 struct musb_hdrc_platform_data *pdata = dev->platform_data;
532 struct platform_device *musb;
533 struct resource *res;
534 struct resource resources[2];
538 /* get memory resource */
539 sprintf(res_name, "musb%d", id);
540 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
542 dev_err(dev, "%s get mem resource failed\n", res_name);
549 /* get irq resource */
550 sprintf(res_name, "musb%d-irq", id);
551 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
553 dev_err(dev, "%s get irq resource failed\n", res_name);
559 resources[1].name = "mc";
561 /* allocate the child platform device */
562 musb = platform_device_alloc("musb-hdrc", -1);
564 dev_err(dev, "failed to allocate musb device\n");
569 musb->dev.parent = dev;
570 musb->dev.dma_mask = &musb_dmamask;
571 musb->dev.coherent_dma_mask = musb_dmamask;
575 pdata->platform_ops = &dsps_ops;
577 ret = platform_device_add_resources(musb, resources, 2);
579 dev_err(dev, "failed to add resources\n");
583 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
585 dev_err(dev, "failed to add platform_data\n");
589 ret = platform_device_add(musb);
591 dev_err(dev, "failed to register musb device\n");
598 platform_device_put(musb);
603 static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
605 platform_device_del(glue->musb);
606 platform_device_put(glue->musb);
609 static int __devinit dsps_probe(struct platform_device *pdev)
611 const struct platform_device_id *id = platform_get_device_id(pdev);
612 const struct dsps_musb_wrapper *wrp =
613 (struct dsps_musb_wrapper *)id->driver_data;
614 struct dsps_glue *glue;
615 struct resource *iomem;
619 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
621 dev_err(&pdev->dev, "unable to allocate glue memory\n");
626 /* get memory resource */
627 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
629 dev_err(&pdev->dev, "failed to get usbss mem resource\n");
634 glue->dev = &pdev->dev;
636 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
638 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
642 platform_set_drvdata(pdev, glue);
644 /* enable the usbss clocks */
645 pm_runtime_enable(&pdev->dev);
647 ret = pm_runtime_get_sync(&pdev->dev);
649 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
653 /* create the child platform device for first instances of musb */
654 ret = dsps_create_musb_pdev(glue, 0);
656 dev_err(&pdev->dev, "failed to create child pdev\n");
663 pm_runtime_put(&pdev->dev);
665 pm_runtime_disable(&pdev->dev);
672 static int __devexit dsps_remove(struct platform_device *pdev)
674 struct dsps_glue *glue = platform_get_drvdata(pdev);
676 /* delete the child platform device */
677 dsps_delete_musb_pdev(glue);
679 /* disable usbss clocks */
680 pm_runtime_put(&pdev->dev);
681 pm_runtime_disable(&pdev->dev);
687 #ifdef CONFIG_PM_SLEEP
688 static int dsps_suspend(struct device *dev)
690 struct musb_hdrc_platform_data *plat = dev->platform_data;
691 struct omap_musb_board_data *data = plat->board_data;
693 /* Shutdown the on-chip PHY and its PLL. */
694 if (data && data->set_phy_power)
695 data->set_phy_power(data->dev, 0);
700 static int dsps_resume(struct device *dev)
702 struct musb_hdrc_platform_data *plat = dev->platform_data;
703 struct omap_musb_board_data *data = plat->board_data;
705 /* Start the on-chip PHY and its PLL. */
706 if (data && data->set_phy_power)
707 data->set_phy_power(data->dev, 1);
713 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
717 static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
719 .name = "musb-ti81xx",
720 .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
722 { }, /* Terminating Entry */
724 MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
726 static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
727 { .compatible = "musb-ti81xx", },
728 { .compatible = "ti,ti81xx-musb", },
729 { .compatible = "ti,am335x-musb", },
732 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
734 static struct platform_driver dsps_usbss_driver = {
736 .remove = __devexit_p(dsps_remove),
740 .of_match_table = musb_dsps_of_match,
742 .id_table = musb_dsps_id_table,
745 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
748 MODULE_LICENSE("GPL v2");
750 static int __init dsps_init(void)
752 return platform_driver_register(&dsps_usbss_driver);
754 subsys_initcall(dsps_init);
756 static void __exit dsps_exit(void)
758 platform_driver_unregister(&dsps_usbss_driver);
760 module_exit(dsps_exit);