1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2013 SAMSUNG Electronics
20 #include <asm/arch/board.h>
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/dwmmc.h>
23 #include <asm/arch/mmc.h>
24 #include <asm/arch/pinmux.h>
25 #include <asm/arch/power.h>
26 #include <asm/arch/system.h>
27 #include <asm/arch/sromc.h>
31 #include <stdio_dev.h>
33 #include <dwc3-uboot.h>
34 #include <samsung/misc.h>
35 #include <dm/pinctrl.h>
38 DECLARE_GLOBAL_DATA_PTR;
40 __weak int exynos_early_init_f(void)
45 __weak int exynos_power_init(void)
51 * get_boot_mmc_dev() - read boot MMC device id from XOM[7:5] pins.
53 static int get_boot_mmc_dev(void)
55 u32 mode = readl(EXYNOS4_OP_MODE) & 0x1C;
58 return 2; /* MMC2: SD */
60 /* MMC0: eMMC or unknown */
64 #if defined CONFIG_EXYNOS_TMU
65 /* Boot Time Thermal Analysis for SoC temperature threshold breach */
66 static void boot_temp_check(void)
70 switch (tmu_monitor(&temp)) {
71 case TMU_STATUS_NORMAL:
73 case TMU_STATUS_TRIPPED:
75 * Status TRIPPED ans WARNING means corresponding threshold
78 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
82 case TMU_STATUS_WARNING:
83 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
87 * TMU_STATUS_INIT means something is wrong with temperature
88 * sensing and TMU status was changed back from NORMAL to INIT.
90 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
93 debug("EXYNOS_TMU: Unknown TMU state\n");
100 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
101 #if defined CONFIG_EXYNOS_TMU
102 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
103 debug("%s: Failed to init TMU\n", __func__);
108 #ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
109 /* The last few MB of memory can be reserved for secure firmware */
110 ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
112 gd->ram_size -= size;
113 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
115 return exynos_init();
123 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
124 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
125 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
130 int dram_init_banksize(void)
133 unsigned long addr, size;
135 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
136 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
137 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
139 gd->bd->bi_dram[i].start = addr;
140 gd->bd->bi_dram[i].size = size;
146 static int board_uart_init(void)
148 #ifndef CONFIG_PINCTRL_EXYNOS
149 int err, uart_id, ret = 0;
151 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
152 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
154 debug("UART%d not configured\n",
155 (uart_id - PERIPH_ID_UART0));
165 #ifdef CONFIG_BOARD_EARLY_INIT_F
166 int board_early_init_f(void)
169 #ifdef CONFIG_BOARD_TYPES
172 err = board_uart_init();
174 debug("UART init failed\n");
178 #ifdef CONFIG_SYS_I2C_INIT_BOARD
179 board_i2c_init(gd->fdt_blob);
182 return exynos_early_init_f();
186 #if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
187 int power_init_board(void)
191 return exynos_power_init();
195 #ifdef CONFIG_SMC911X
196 static int decode_sromc(const void *blob, struct fdt_sromc *config)
201 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
203 debug("Could not find SROMC node\n");
207 config->bank = fdtdec_get_int(blob, node, "bank", 0);
208 config->width = fdtdec_get_int(blob, node, "width", 2);
210 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
211 FDT_SROM_TIMING_COUNT);
213 debug("Could not decode SROMC configuration Error: %s\n",
215 return -FDT_ERR_NOTFOUND;
221 int board_eth_init(bd_t *bis)
223 #ifdef CONFIG_SMC911X
224 u32 smc_bw_conf, smc_bc_conf;
225 struct fdt_sromc config;
226 fdt_addr_t base_addr;
229 node = decode_sromc(gd->fdt_blob, &config);
231 debug("%s: Could not find sromc configuration\n", __func__);
234 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
236 debug("%s: Could not find lan9215 configuration\n", __func__);
240 /* We now have a node, so any problems from now on are errors */
241 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
242 if (base_addr == FDT_ADDR_T_NONE) {
243 debug("%s: Could not find lan9215 address\n", __func__);
247 /* Ethernet needs data bus width of 16 bits */
248 if (config.width != 2) {
249 debug("%s: Unsupported bus width %d\n", __func__,
253 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
254 | SROMC_BYTE_ENABLE(config.bank);
256 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
257 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
258 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
259 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
260 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
261 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
262 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
264 /* Select and configure the SROMC bank */
265 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
266 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
267 return smc911x_initialize(0, base_addr);
272 #if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
275 if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
276 const char *board_info;
278 if (IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
280 * Printing type requires having revision, although
281 * this will succeed only if done late.
282 * Otherwise revision will be set in misc_init_r().
284 set_board_revision();
287 board_info = get_board_type();
290 printf("Type: %s\n", board_info);
297 #ifdef CONFIG_BOARD_LATE_INIT
298 int board_late_init(void)
302 int mmcbootdev = get_boot_mmc_dev();
303 char mmcbootdev_str[16];
305 stdio_print_current_devices();
306 ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
307 if (ret && ret != -ENODEV) {
308 /* Force console on */
309 gd->flags &= ~GD_FLG_SILENT;
311 printf("cros-ec communications failure %d\n", ret);
312 puts("\nPlease reset with Power+Refresh\n\n");
313 panic("Cannot init cros-ec device");
317 printf("Boot device: MMC(%u)\n", mmcbootdev);
318 sprintf(mmcbootdev_str, "%u", mmcbootdev);
319 env_set("mmcbootdev", mmcbootdev_str);
325 #ifdef CONFIG_MISC_INIT_R
326 int misc_init_r(void)
328 if (IS_ENABLED(CONFIG_BOARD_TYPES) &&
329 !IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
331 * If revision was not set by late display boardinfo,
332 * set it here. At this point regulators should be already
335 set_board_revision();
338 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
341 #ifdef CONFIG_LCD_MENU
345 #ifdef CONFIG_CMD_BMP
346 if (panel_info.logo_on)
353 void reset_misc(void)
355 struct gpio_desc gpio = {};
358 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
359 "samsung,emmc-reset");
363 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpio", 0,
364 &gpio, GPIOD_IS_OUT);
366 if (dm_gpio_is_valid(&gpio)) {
370 * FIXME: Need to optimize delay time. Minimum 1usec pulse is
371 * required by 'JEDEC Standard No.84-A441' (eMMC)
372 * document but real delay time is expected to greater
375 dm_gpio_set_value(&gpio, 0);
377 dm_gpio_set_value(&gpio, 1);
381 int board_usb_cleanup(int index, enum usb_init_type init)
383 #ifdef CONFIG_USB_DWC3
384 dwc3_uboot_exit(index);
389 int mmc_get_env_dev(void)
391 return get_boot_mmc_dev();