board/gdsys/common/osd.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2010
   4  * Dirk Eibach,  Guntermann & Drunck GmbH, [email protected]
   5  */
   6
   7 #ifdef CONFIG_GDSYS_LEGACY_DRIVERS
   8
   9 #include <common.h>
  10 #include <command.h>
  11 #include <i2c.h>
  12 #include <malloc.h>
  13
  14 #include "ch7301.h"
  15 #include "dp501.h"
  16 #include <gdsys_fpga.h>
  17
  18 #define ICS8N3QV01_I2C_ADDR 0x6E
  19 #define ICS8N3QV01_FREF 114285000
  20 #define ICS8N3QV01_FREF_LL 114285000LL
  21 #define ICS8N3QV01_F_DEFAULT_0 156250000LL
  22 #define ICS8N3QV01_F_DEFAULT_1 125000000LL
  23 #define ICS8N3QV01_F_DEFAULT_2 100000000LL
  24 #define ICS8N3QV01_F_DEFAULT_3  25175000LL
  25
  26 #define SIL1178_MASTER_I2C_ADDRESS 0x38
  27 #define SIL1178_SLAVE_I2C_ADDRESS 0x39
  28
  29 #define PIXCLK_640_480_60 25180000
  30 #define MAX_X_CHARS 53
  31 #define MAX_Y_CHARS 26
  32
  33 #ifdef CONFIG_SYS_OSD_DH
  34 #define MAX_OSD_SCREEN 8
  35 #define OSD_DH_BASE 4
  36 #else
  37 #define MAX_OSD_SCREEN 4
  38 #endif
  39
  40 #ifdef CONFIG_SYS_OSD_DH
  41 #define OSD_SET_REG(screen, fld, val) \
  42         do { \
  43                 if (screen >= OSD_DH_BASE) \
  44                         FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
  45                 else \
  46                         FPGA_SET_REG(screen, osd0.fld, val); \
  47         } while (0)
  48 #else
  49 #define OSD_SET_REG(screen, fld, val) \
  50                 FPGA_SET_REG(screen, osd0.fld, val)
  51 #endif
  52
  53 #ifdef CONFIG_SYS_OSD_DH
  54 #define OSD_GET_REG(screen, fld, val) \
  55         do {                                    \
  56                 if (screen >= OSD_DH_BASE) \
  57                         FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
  58                 else \
  59                         FPGA_GET_REG(screen, osd0.fld, val); \
  60         } while (0)
  61 #else
  62 #define OSD_GET_REG(screen, fld, val) \
  63                 FPGA_GET_REG(screen, osd0.fld, val)
  64 #endif
  65
  66 unsigned int base_width;
  67 unsigned int base_height;
  68 size_t bufsize;
  69 u16 *buf;
  70
  71 unsigned int osd_screen_mask = 0;
  72
  73 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
  74 int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;
  75 #endif
  76
  77 #ifdef CONFIG_SYS_SIL1178_I2C
  78 int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C;
  79 #endif
  80
  81 #ifdef CONFIG_SYS_MPC92469AC
  82 static void mpc92469ac_calc_parameters(unsigned int fout,
  83         unsigned int *post_div, unsigned int *feedback_div)
  84 {
  85         unsigned int n = *post_div;
  86         unsigned int m = *feedback_div;
  87         unsigned int a;
  88         unsigned int b = 14745600 / 16;
  89
  90         if (fout < 50169600)
  91                 n = 8;
  92         else if (fout < 100339199)
  93                 n = 4;
  94         else if (fout < 200678399)
  95                 n = 2;
  96         else
  97                 n = 1;
  98
  99         a = fout * n + (b / 2); /* add b/2 for proper rounding */
 100
 101         m = a / b;
 102
 103         *post_div = n;
 104         *feedback_div = m;
 105 }
 106
 107 static void mpc92469ac_set(unsigned screen, unsigned int fout)
 108 {
 109         unsigned int n;
 110         unsigned int m;
 111         unsigned int bitval = 0;
 112         mpc92469ac_calc_parameters(fout, &n, &m);
 113
 114         switch (n) {
 115         case 1:
 116                 bitval = 0x00;
 117                 break;
 118         case 2:
 119                 bitval = 0x01;
 120                 break;
 121         case 4:
 122                 bitval = 0x02;
 123                 break;
 124         case 8:
 125                 bitval = 0x03;
 126                 break;
 127         }
 128
 129         FPGA_SET_REG(screen, mpc3w_control, (bitval << 9) | m);
 130 }
 131 #endif
 132
 133 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
 134
 135 static unsigned int ics8n3qv01_get_fout_calc(unsigned index)
 136 {
 137         unsigned long long n;
 138         unsigned long long mint;
 139         unsigned long long mfrac;
 140         u8 reg_a, reg_b, reg_c, reg_d, reg_f;
 141         unsigned long long fout_calc;
 142
 143         if (index > 3)
 144                 return 0;
 145
 146         reg_a = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 0 + index);
 147         reg_b = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 4 + index);
 148         reg_c = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 8 + index);
 149         reg_d = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 12 + index);
 150         reg_f = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 20 + index);
 151
 152         mint = ((reg_a >> 1) & 0x1f) | (reg_f & 0x20);
 153         mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1)
 154                 | (reg_d >> 7);
 155         n = reg_d & 0x7f;
 156
 157         fout_calc = (mint * ICS8N3QV01_FREF_LL
 158                      + mfrac * ICS8N3QV01_FREF_LL / 262144LL
 159                      + ICS8N3QV01_FREF_LL / 524288LL
 160                      + n / 2)
 161                     / n
 162                     * 1000000
 163                     / (1000000 - 100);
 164
 165         return fout_calc;
 166 }
 167
 168
 169 static void ics8n3qv01_calc_parameters(unsigned int fout,
 170         unsigned int *_mint, unsigned int *_mfrac,
 171         unsigned int *_n)
 172 {
 173         unsigned int n;
 174         unsigned int foutiic;
 175         unsigned int fvcoiic;
 176         unsigned int mint;
 177         unsigned long long mfrac;
 178
 179         n = (2215000000U + fout / 2) / fout;
 180         if ((n & 1) && (n > 5))
 181                 n -= 1;
 182
 183         foutiic = fout - (fout / 10000);
 184         fvcoiic = foutiic * n;
 185
 186         mint = fvcoiic / 114285000;
 187         if ((mint < 17) || (mint > 63))
 188                 printf("ics8n3qv01_calc_parameters: cannot determine mint\n");
 189
 190         mfrac = ((unsigned long long)fvcoiic % 114285000LL) * 262144LL
 191                 / 114285000LL;
 192
 193         *_mint = mint;
 194         *_mfrac = mfrac;
 195         *_n = n;
 196 }
 197
 198 static void ics8n3qv01_set(unsigned int fout)
 199 {
 200         unsigned int n;
 201         unsigned int mint;
 202         unsigned int mfrac;
 203         unsigned int fout_calc;
 204         unsigned long long fout_prog;
 205         long long off_ppm;
 206         u8 reg0, reg4, reg8, reg12, reg18, reg20;
 207
 208         fout_calc = ics8n3qv01_get_fout_calc(1);
 209         off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000
 210                   / ICS8N3QV01_F_DEFAULT_1;
 211         printf("       PLL is off by %lld ppm\n", off_ppm);
 212         fout_prog = (unsigned long long)fout * (unsigned long long)fout_calc
 213                     / ICS8N3QV01_F_DEFAULT_1;
 214         ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n);
 215
 216         reg0 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 0) & 0xc0;
 217         reg0 |= (mint & 0x1f) << 1;
 218         reg0 |= (mfrac >> 17) & 0x01;
 219         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 0, reg0);
 220
 221         reg4 = mfrac >> 9;
 222         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 4, reg4);
 223
 224         reg8 = mfrac >> 1;
 225         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 8, reg8);
 226
 227         reg12 = mfrac << 7;
 228         reg12 |= n & 0x7f;
 229         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 12, reg12);
 230
 231         reg18 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 18) & 0x03;
 232         reg18 |= 0x20;
 233         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 18, reg18);
 234
 235         reg20 = i2c_reg_read(ICS8N3QV01_I2C_ADDR, 20) & 0x1f;
 236         reg20 |= mint & (1 << 5);
 237         i2c_reg_write(ICS8N3QV01_I2C_ADDR, 20, reg20);
 238 }
 239 #endif
 240
 241 static int osd_write_videomem(unsigned screen, unsigned offset,
 242         u16 *data, size_t charcount)
 243 {
 244         unsigned int k;
 245
 246         for (k = 0; k < charcount; ++k) {
 247                 if (offset + k >= bufsize)
 248                         return -1;
 249 #ifdef CONFIG_SYS_OSD_DH
 250                 if (screen >= OSD_DH_BASE)
 251                         FPGA_SET_REG(screen - OSD_DH_BASE,
 252                                      videomem1[offset + k], data[k]);
 253                 else
 254                         FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
 255 #else
 256                 FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
 257 #endif
 258         }
 259
 260         return charcount;
 261 }
 262
 263 static int osd_print(struct cmd_tbl *cmdtp, int flag, int argc,
 264                      char *const argv[])
 265 {
 266         unsigned screen;
 267
 268         if (argc < 5) {
 269                 cmd_usage(cmdtp);
 270                 return 1;
 271         }
 272
 273         for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
 274                 unsigned x;
 275                 unsigned y;
 276                 unsigned charcount;
 277                 unsigned len;
 278                 u8 color;
 279                 unsigned int k;
 280                 char *text;
 281                 int res;
 282
 283                 if (!(osd_screen_mask & (1 << screen)))
 284                         continue;
 285
 286                 x = simple_strtoul(argv[1], NULL, 16);
 287                 y = simple_strtoul(argv[2], NULL, 16);
 288                 color = simple_strtoul(argv[3], NULL, 16);
 289                 text = argv[4];
 290                 charcount = strlen(text);
 291                 len = (charcount > bufsize) ? bufsize : charcount;
 292
 293                 for (k = 0; k < len; ++k)
 294                         buf[k] = (text[k] << 8) | color;
 295
 296                 res = osd_write_videomem(screen, y * base_width + x, buf, len);
 297                 if (res < 0)
 298                         return res;
 299
 300                 OSD_SET_REG(screen, control, 0x0049);
 301         }
 302
 303         return 0;
 304 }
 305
 306 int osd_probe(unsigned screen)
 307 {
 308         u16 version;
 309         u16 features;
 310         int old_bus = i2c_get_bus_num();
 311         bool pixclock_present = false;
 312         bool output_driver_present = false;
 313
 314         OSD_GET_REG(0, version, &version);
 315         OSD_GET_REG(0, features, &features);
 316
 317         base_width = ((features & 0x3f00) >> 8) + 1;
 318         base_height = (features & 0x001f) + 1;
 319         bufsize = base_width * base_height;
 320         buf = malloc(sizeof(u16) * bufsize);
 321         if (!buf)
 322                 return -1;
 323
 324 #ifdef CONFIG_SYS_OSD_DH
 325         printf("OSD%d-%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n",
 326                (screen >= OSD_DH_BASE) ? (screen - OSD_DH_BASE) : screen,
 327                (screen > 3) ? 1 : 0, version/100, version%100, base_width,
 328                base_height);
 329 #else
 330         printf("OSD%d:  Digital-OSD version %01d.%02d, %d" "x%d characters\n",
 331                screen, version/100, version%100, base_width, base_height);
 332 #endif
 333         /* setup pixclock */
 334
 335 #ifdef CONFIG_SYS_MPC92469AC
 336         pixclock_present = true;
 337         mpc92469ac_set(screen, PIXCLK_640_480_60);
 338 #endif
 339
 340 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
 341         i2c_set_bus_num(ics8n3qv01_i2c[screen]);
 342         if (!i2c_probe(ICS8N3QV01_I2C_ADDR)) {
 343                 ics8n3qv01_set(PIXCLK_640_480_60);
 344                 pixclock_present = true;
 345         }
 346 #endif
 347
 348         if (!pixclock_present)
 349                 printf("       no pixelclock found\n");
 350
 351         /* setup output driver */
 352
 353 #ifdef CONFIG_SYS_CH7301_I2C
 354         if (!ch7301_probe(screen, true))
 355                 output_driver_present = true;
 356 #endif
 357
 358 #ifdef CONFIG_SYS_SIL1178_I2C
 359         i2c_set_bus_num(sil1178_i2c[screen]);
 360         if (!i2c_probe(SIL1178_SLAVE_I2C_ADDRESS)) {
 361                 if (i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02) == 0x06) {
 362                         /*
 363                          * magic initialization sequence,
 364                          * adapted from datasheet
 365                          */
 366                         i2c_reg_write(SIL1178_SLAVE_I2C_ADDRESS, 0x08, 0x36);
 367                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x44);
 368                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0f, 0x4c);
 369                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0e, 0x10);
 370                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0a, 0x80);
 371                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x09, 0x30);
 372                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0c, 0x89);
 373                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x0d, 0x60);
 374                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x36);
 375                         i2c_reg_write(SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37);
 376                         output_driver_present = true;
 377                 }
 378         }
 379 #endif
 380
 381 #ifdef CONFIG_SYS_DP501_I2C
 382         if (!dp501_probe(screen, true))
 383                 output_driver_present = true;
 384 #endif
 385
 386         if (!output_driver_present)
 387                 printf("       no output driver found\n");
 388
 389         OSD_SET_REG(screen, xy_size, ((32 - 1) << 8) | (16 - 1));
 390         OSD_SET_REG(screen, x_pos, 0x007f);
 391         OSD_SET_REG(screen, y_pos, 0x005f);
 392
 393         if (pixclock_present && output_driver_present)
 394                 osd_screen_mask |= 1 << screen;
 395
 396         i2c_set_bus_num(old_bus);
 397
 398         return 0;
 399 }
 400
 401 int osd_write(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 402 {
 403         unsigned screen;
 404
 405         if ((argc < 4) || (strlen(argv[3]) % 4)) {
 406                 cmd_usage(cmdtp);
 407                 return 1;
 408         }
 409
 410         for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
 411                 unsigned x;
 412                 unsigned y;
 413                 unsigned k;
 414                 u16 buffer[base_width];
 415                 char *rp;
 416                 u16 *wp = buffer;
 417                 unsigned count = (argc > 4) ?
 418                         simple_strtoul(argv[4], NULL, 16) : 1;
 419
 420                 if (!(osd_screen_mask & (1 << screen)))
 421                         continue;
 422
 423                 x = simple_strtoul(argv[1], NULL, 16);
 424                 y = simple_strtoul(argv[2], NULL, 16);
 425                 rp = argv[3];
 426
 427
 428                 while (*rp) {
 429                         char substr[5];
 430
 431                         memcpy(substr, rp, 4);
 432                         substr[4] = 0;
 433                         *wp = simple_strtoul(substr, NULL, 16);
 434
 435                         rp += 4;
 436                         wp++;
 437                         if (wp - buffer > base_width)
 438                                 break;
 439                 }
 440
 441                 for (k = 0; k < count; ++k) {
 442                         unsigned offset =
 443                                 y * base_width + x + k * (wp - buffer);
 444                         osd_write_videomem(screen, offset, buffer,
 445                                 wp - buffer);
 446                 }
 447
 448                 OSD_SET_REG(screen, control, 0x0049);
 449         }
 450
 451         return 0;
 452 }
 453
 454 int osd_size(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 455 {
 456         unsigned screen;
 457         unsigned x;
 458         unsigned y;
 459
 460         if (argc < 3) {
 461                 cmd_usage(cmdtp);
 462                 return 1;
 463         }
 464
 465         x = simple_strtoul(argv[1], NULL, 16);
 466         y = simple_strtoul(argv[2], NULL, 16);
 467
 468         if (!x || (x > 64) || (x > MAX_X_CHARS) ||
 469             !y || (y > 32) || (y > MAX_Y_CHARS)) {
 470                 cmd_usage(cmdtp);
 471                 return 1;
 472         }
 473
 474         for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
 475                 if (!(osd_screen_mask & (1 << screen)))
 476                         continue;
 477
 478                 OSD_SET_REG(screen, xy_size, ((x - 1) << 8) | (y - 1));
 479                 OSD_SET_REG(screen, x_pos, 32767 * (640 - 12 * x) / 65535);
 480                 OSD_SET_REG(screen, y_pos, 32767 * (480 - 18 * y) / 65535);
 481         }
 482
 483         return 0;
 484 }
 485
 486 U_BOOT_CMD(
 487         osdw, 5, 0, osd_write,
 488         "write 16-bit hex encoded buffer to osd memory",
 489         "pos_x pos_y buffer count\n"
 490 );
 491
 492 U_BOOT_CMD(
 493         osdp, 5, 0, osd_print,
 494         "write ASCII buffer to osd memory",
 495         "pos_x pos_y color text\n"
 496 );
 497
 498 U_BOOT_CMD(
 499         osdsize, 3, 0, osd_size,
 500         "set OSD XY size in characters",
 501         "size_x(max. " __stringify(MAX_X_CHARS)
 502         ") size_y(max. " __stringify(MAX_Y_CHARS) ")\n"
 503 );
 504
 505 #endif /* CONFIG_GDSYS_LEGACY_DRIVERS */