1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
13 #include <asm/arch/stm32mp1_smc.h>
14 #include <dm/uclass.h>
15 #include <jffs2/load_kernel.h>
16 #include <linux/list.h>
17 #include <linux/list_sort.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/sizes.h>
21 #include "stm32prog.h"
23 /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
24 #define GPT_HEADER_SZ 34
26 #define OPT_SELECT BIT(0)
27 #define OPT_EMPTY BIT(1)
28 #define OPT_DELETE BIT(2)
30 #define IS_SELECT(part) ((part)->option & OPT_SELECT)
31 #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
32 #define IS_DELETE(part) ((part)->option & OPT_DELETE)
34 #define ALT_BUF_LEN SZ_1K
36 #define ROOTFS_MMC0_UUID \
37 EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
38 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
40 #define ROOTFS_MMC1_UUID \
41 EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
42 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
44 #define ROOTFS_MMC2_UUID \
45 EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
46 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
48 /* RAW parttion (binary / bootloader) used Linux - reserved UUID */
49 #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
52 * unique partition guid (uuid) for partition named "rootfs"
53 * on each MMC instance = SD Card or eMMC
54 * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
56 static const efi_guid_t uuid_mmc[3] = {
62 DECLARE_GLOBAL_DATA_PTR;
64 /* order of column in flash layout file */
65 enum stm32prog_col_t {
75 /* partition handling routines : CONFIG_CMD_MTDPARTS */
76 int mtdparts_init(void);
77 int find_dev_and_part(const char *id, struct mtd_device **dev,
78 u8 *part_num, struct part_info **part);
80 char *stm32prog_get_error(struct stm32prog_data *data)
82 static const char error_msg[] = "Unspecified";
84 if (strlen(data->error) == 0)
85 strcpy(data->error, error_msg);
90 u8 stm32prog_header_check(struct raw_header_s *raw_header,
91 struct image_header_s *header)
96 header->image_checksum = 0x0;
97 header->image_length = 0x0;
99 if (!raw_header || !header) {
100 pr_debug("%s:no header data\n", __func__);
103 if (raw_header->magic_number !=
104 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
105 pr_debug("%s:invalid magic number : 0x%x\n",
106 __func__, raw_header->magic_number);
109 /* only header v1.0 supported */
110 if (raw_header->header_version != 0x00010000) {
111 pr_debug("%s:invalid header version : 0x%x\n",
112 __func__, raw_header->header_version);
115 if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
116 pr_debug("%s:invalid reserved field\n", __func__);
119 for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
120 if (raw_header->padding[i] != 0) {
121 pr_debug("%s:invalid padding field\n", __func__);
126 header->image_checksum = le32_to_cpu(raw_header->image_checksum);
127 header->image_length = le32_to_cpu(raw_header->image_length);
132 static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
137 /* compute checksum on payload */
138 payload = (u8 *)addr;
140 for (i = header->image_length; i > 0; i--)
141 checksum += *(payload++);
146 /* FLASHLAYOUT PARSING *****************************************/
147 static int parse_option(struct stm32prog_data *data,
148 int i, char *p, struct stm32prog_part_t *part)
160 part->option |= OPT_SELECT;
163 part->option |= OPT_EMPTY;
166 part->option |= OPT_DELETE;
170 stm32prog_err("Layout line %d: invalid option '%c' in %s)",
176 if (!(part->option & OPT_SELECT)) {
177 stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
184 static int parse_id(struct stm32prog_data *data,
185 int i, char *p, struct stm32prog_part_t *part)
190 result = strict_strtoul(p, 0, &value);
192 if (result || value > PHASE_LAST_USER) {
193 stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
200 static int parse_name(struct stm32prog_data *data,
201 int i, char *p, struct stm32prog_part_t *part)
205 if (strlen(p) < sizeof(part->name)) {
206 strcpy(part->name, p);
208 stm32prog_err("Layout line %d: partition name too long [%d]: %s",
216 static int parse_type(struct stm32prog_data *data,
217 int i, char *p, struct stm32prog_part_t *part)
223 if (!strncmp(p, "Binary", 6)) {
224 part->part_type = PART_BINARY;
226 /* search for Binary(X) case */
236 simple_strtoul(&p[7], NULL, 10);
238 } else if (!strcmp(p, "System")) {
239 part->part_type = PART_SYSTEM;
240 } else if (!strcmp(p, "FileSystem")) {
241 part->part_type = PART_FILESYSTEM;
242 } else if (!strcmp(p, "RawImage")) {
243 part->part_type = RAW_IMAGE;
248 stm32prog_err("Layout line %d: type parsing error : '%s'",
254 static int parse_ip(struct stm32prog_data *data,
255 int i, char *p, struct stm32prog_part_t *part)
258 unsigned int len = 0;
261 if (!strcmp(p, "none")) {
262 part->target = STM32PROG_NONE;
263 } else if (!strncmp(p, "mmc", 3)) {
264 part->target = STM32PROG_MMC;
266 } else if (!strncmp(p, "nor", 3)) {
267 part->target = STM32PROG_NOR;
269 } else if (!strncmp(p, "nand", 4)) {
270 part->target = STM32PROG_NAND;
272 } else if (!strncmp(p, "spi-nand", 8)) {
273 part->target = STM32PROG_SPI_NAND;
275 } else if (!strncmp(p, "ram", 3)) {
276 part->target = STM32PROG_RAM;
282 /* only one digit allowed for device id */
283 if (strlen(p) != len + 1) {
286 part->dev_id = p[len] - '0';
287 if (part->dev_id > 9)
292 stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
297 static int parse_offset(struct stm32prog_data *data,
298 int i, char *p, struct stm32prog_part_t *part)
306 /* eMMC boot parttion */
307 if (!strncmp(p, "boot", 4)) {
308 if (strlen(p) != 5) {
313 else if (p[4] == '2')
319 stm32prog_err("Layout line %d: invalid part '%s'",
322 part->addr = simple_strtoull(p, &tail, 0);
323 if (tail == p || *tail != '\0') {
324 stm32prog_err("Layout line %d: invalid offset '%s'",
334 int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
335 struct stm32prog_part_t *part) = {
336 [COL_OPTION] = parse_option,
338 [COL_NAME] = parse_name,
339 [COL_TYPE] = parse_type,
341 [COL_OFFSET] = parse_offset,
344 static int parse_flash_layout(struct stm32prog_data *data,
348 int column = 0, part_nb = 0, ret;
349 bool end_of_line, eof;
350 char *p, *start, *last, *col;
351 struct stm32prog_part_t *part;
357 /* check if STM32image is detected */
358 if (!stm32prog_header_check((struct raw_header_s *)addr,
362 addr = addr + BL_HEADER_SIZE;
363 size = data->header.image_length;
365 checksum = stm32prog_header_checksum(addr, &data->header);
366 if (checksum != data->header.image_checksum) {
367 stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
368 checksum, data->header.image_checksum);
375 start = (char *)addr;
378 *last = 0x0; /* force null terminated string */
379 pr_debug("flash layout =\n%s\n", start);
381 /* calculate expected number of partitions */
384 while (*p && (p < last)) {
387 if (p < last && *p == '#')
391 if (part_list_size > PHASE_LAST_USER) {
392 stm32prog_err("Layout: too many partition (%d)",
396 part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
398 stm32prog_err("Layout: alloc failed");
401 data->part_array = part;
403 /* main parsing loop */
407 col = start; /* 1st column */
411 /* CR is ignored and replaced by NULL character */
426 /* comment line is skipped */
427 if (column == 0 && p == col) {
428 while ((p < last) && *p)
433 if (p >= last || !*p) {
440 /* by default continue with the next character */
446 /* replace by \0: allow string parsing for each column */
454 /* skip empty line and multiple TAB in tsv file */
455 if (strlen(col) == 0) {
457 /* skip empty line */
458 if (column == 0 && end_of_line) {
465 if (column < COL_NB_STM32) {
466 ret = parse[column](data, i, col, part);
471 /* save the beginning of the next column */
478 /* end of the line detected */
481 if (column < COL_NB_STM32) {
482 stm32prog_err("Layout line %d: no enought column", i);
489 if (part_nb >= part_list_size) {
492 stm32prog_err("Layout: no enought memory for %d part",
498 data->part_nb = part_nb;
499 if (data->part_nb == 0) {
500 stm32prog_err("Layout: no partition found");
507 static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
509 struct stm32prog_part_t *parta, *partb;
511 parta = container_of(a, struct stm32prog_part_t, list);
512 partb = container_of(b, struct stm32prog_part_t, list);
514 if (parta->part_id != partb->part_id)
515 return parta->part_id - partb->part_id;
517 return parta->addr > partb->addr ? 1 : -1;
520 static void get_mtd_by_target(char *string, enum stm32prog_target target,
532 case STM32PROG_SPI_NAND:
533 dev_str = "spi-nand";
539 sprintf(string, "%s%d", dev_str, dev_id);
542 static int init_device(struct stm32prog_data *data,
543 struct stm32prog_dev_t *dev)
545 struct mmc *mmc = NULL;
546 struct blk_desc *block_dev = NULL;
548 struct mtd_info *mtd = NULL;
553 u64 first_addr = 0, last_addr = 0;
554 struct stm32prog_part_t *part, *next_part;
555 u64 part_addr, part_size;
557 const char *part_name;
559 switch (dev->target) {
562 mmc = find_mmc_device(dev->dev_id);
564 stm32prog_err("mmc device %d not found", dev->dev_id);
567 block_dev = mmc_get_blk_desc(mmc);
569 stm32prog_err("mmc device %d not probed", dev->dev_id);
572 dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
575 /* reserve a full erase group for each GTP headers */
576 if (mmc->erase_grp_size > GPT_HEADER_SZ) {
577 first_addr = dev->erase_size;
578 last_addr = (u64)(block_dev->lba -
579 mmc->erase_grp_size) *
582 first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
583 last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
586 pr_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
587 block_dev->lba, block_dev->blksz);
588 pr_debug(" available address = 0x%llx..0x%llx\n",
589 first_addr, last_addr);
590 pr_debug(" full_update = %d\n", dev->full_update);
596 case STM32PROG_SPI_NAND:
597 get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
598 pr_debug("%s\n", mtd_id);
601 mtd = get_mtd_device_nm(mtd_id);
603 stm32prog_err("MTD device %s not found", mtd_id);
607 last_addr = mtd->size;
608 dev->erase_size = mtd->erasesize;
609 pr_debug("MTD device %s: size=%lld erasesize=%d\n",
610 mtd_id, mtd->size, mtd->erasesize);
611 pr_debug(" available address = 0x%llx..0x%llx\n",
612 first_addr, last_addr);
617 first_addr = gd->bd->bi_dram[0].start;
618 last_addr = first_addr + gd->bd->bi_dram[0].size;
622 stm32prog_err("unknown device type = %d", dev->target);
625 pr_debug(" erase size = 0x%x\n", dev->erase_size);
626 pr_debug(" full_update = %d\n", dev->full_update);
628 /* order partition list in offset order */
629 list_sort(NULL, &dev->part_list, &part_cmp);
631 pr_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
632 list_for_each_entry(part, &dev->part_list, list) {
633 if (part->bin_nb > 1) {
634 if ((dev->target != STM32PROG_NAND &&
635 dev->target != STM32PROG_SPI_NAND) ||
636 part->id >= PHASE_FIRST_USER ||
637 strncmp(part->name, "fsbl", 4)) {
638 stm32prog_err("%s (0x%x): multiple binary %d not supported",
639 part->name, part->id,
644 if (part->part_type == RAW_IMAGE) {
648 part->size = block_dev->lba * block_dev->blksz;
650 part->size = last_addr;
651 pr_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
652 part->option, part->id, part->name,
653 part->part_type, part->bin_nb, part->target,
654 part->dev_id, part->addr, part->size);
657 if (part->part_id < 0) { /* boot hw partition for eMMC */
659 part->size = mmc->capacity_boot;
661 stm32prog_err("%s (0x%x): hw partition not expected : %d",
662 part->name, part->id,
667 part->part_id = part_id++;
669 /* last partition : size to the end of the device */
670 if (part->list.next != &dev->part_list) {
672 container_of(part->list.next,
673 struct stm32prog_part_t,
675 if (part->addr < next_part->addr) {
676 part->size = next_part->addr -
679 stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
680 part->name, part->id,
688 if (part->addr <= last_addr) {
689 part->size = last_addr - part->addr;
691 stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
692 part->name, part->id,
693 part->addr, last_addr);
697 if (part->addr < first_addr) {
698 stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
699 part->name, part->id,
700 part->addr, first_addr);
704 if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
705 stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
706 part->name, part->id, part->addr,
707 part->dev->erase_size);
710 pr_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
711 part->part_id, part->option, part->id, part->name,
712 part->part_type, part->bin_nb, part->target,
713 part->dev_id, part->addr, part->size);
719 /* check coherency with existing partition */
722 * block devices with GPT: check user partition size
723 * only for partial update, the GPT partions are be
724 * created for full update
726 if (dev->full_update || part->part_id < 0) {
730 struct disk_partition partinfo;
732 ret = part_get_info(block_dev, part->part_id,
736 stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
737 part->name, part->id,
738 part_id, part->dev_id);
741 part_addr = (u64)partinfo.start * partinfo.blksz;
742 part_size = (u64)partinfo.size * partinfo.blksz;
743 part_name = (char *)partinfo.name;
749 char mtd_part_id[32];
750 struct part_info *mtd_part;
751 struct mtd_device *mtd_dev;
754 sprintf(mtd_part_id, "%s,%d", mtd_id,
756 ret = find_dev_and_part(mtd_part_id, &mtd_dev,
757 &part_num, &mtd_part);
759 stm32prog_err("%s (0x%x): Invalid MTD partition %s",
760 part->name, part->id,
764 part_addr = mtd_part->offset;
765 part_size = mtd_part->size;
766 part_name = mtd_part->name;
771 stm32prog_err("%s (0x%x): Invalid partition",
772 part->name, part->id);
777 pr_debug(" %08llx %08llx\n", part_addr, part_size);
779 if (part->addr != part_addr) {
780 stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
781 part->name, part->id, part->part_id,
782 part_name, part->addr, part_addr);
785 if (part->size != part_size) {
786 stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
787 part->name, part->id, part->part_id,
788 part_name, part->addr, part->size,
796 static int treat_partition_list(struct stm32prog_data *data)
799 struct stm32prog_part_t *part;
801 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
802 data->dev[j].target = STM32PROG_NONE;
803 INIT_LIST_HEAD(&data->dev[j].part_list);
806 data->tee_detected = false;
807 data->fsbl_nor_detected = false;
808 for (i = 0; i < data->part_nb; i++) {
809 part = &data->part_array[i];
812 /* skip partition with IP="none" */
813 if (part->target == STM32PROG_NONE) {
814 if (IS_SELECT(part)) {
815 stm32prog_err("Layout: selected none phase = 0x%x",
822 if (part->id == PHASE_FLASHLAYOUT ||
823 part->id > PHASE_LAST_USER) {
824 stm32prog_err("Layout: invalid phase = 0x%x",
828 for (j = i + 1; j < data->part_nb; j++) {
829 if (part->id == data->part_array[j].id) {
830 stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
835 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
836 if (data->dev[j].target == STM32PROG_NONE) {
837 /* new device found */
838 data->dev[j].target = part->target;
839 data->dev[j].dev_id = part->dev_id;
840 data->dev[j].full_update = true;
843 } else if ((part->target == data->dev[j].target) &&
844 (part->dev_id == data->dev[j].dev_id)) {
848 if (j == STM32PROG_MAX_DEV) {
849 stm32prog_err("Layout: too many device");
852 switch (part->target) {
854 if (!data->fsbl_nor_detected &&
855 !strncmp(part->name, "fsbl", 4))
856 data->fsbl_nor_detected = true;
859 case STM32PROG_SPI_NAND:
860 if (!data->tee_detected &&
861 !strncmp(part->name, "tee", 3))
862 data->tee_detected = true;
867 part->dev = &data->dev[j];
868 if (!IS_SELECT(part))
869 part->dev->full_update = false;
870 list_add_tail(&part->list, &data->dev[j].part_list);
876 static int create_partitions(struct stm32prog_data *data)
880 const int buflen = SZ_8K;
882 char uuid[UUID_STR_LEN + 1];
883 unsigned char *uuid_bin;
887 struct stm32prog_part_t *part;
889 buf = malloc(buflen);
893 puts("partitions : ");
894 /* initialize the selected device */
895 for (i = 0; i < data->dev_nb; i++) {
896 /* create gpt partition support only for full update on MMC */
897 if (data->dev[i].target != STM32PROG_MMC ||
898 !data->dev[i].full_update)
902 rootfs_found = false;
903 memset(buf, 0, buflen);
905 list_for_each_entry(part, &data->dev[i].part_list, list) {
906 /* skip eMMC boot partitions */
907 if (part->part_id < 0)
910 if (part->part_type == RAW_IMAGE)
913 if (offset + 100 > buflen) {
914 pr_debug("\n%s: buffer too small, %s skippped",
915 __func__, part->name);
920 offset += sprintf(buf, "gpt write mmc %d \"",
921 data->dev[i].dev_id);
923 offset += snprintf(buf + offset, buflen - offset,
924 "name=%s,start=0x%llx,size=0x%llx",
929 if (part->part_type == PART_BINARY)
930 offset += snprintf(buf + offset,
933 LINUX_RESERVED_UUID);
935 offset += snprintf(buf + offset,
939 if (part->part_type == PART_SYSTEM)
940 offset += snprintf(buf + offset,
944 if (!rootfs_found && !strcmp(part->name, "rootfs")) {
945 mmc_id = part->dev_id;
947 if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
949 (unsigned char *)uuid_mmc[mmc_id].b;
950 uuid_bin_to_str(uuid_bin, uuid,
951 UUID_STR_FORMAT_GUID);
952 offset += snprintf(buf + offset,
958 offset += snprintf(buf + offset, buflen - offset, ";");
962 offset += snprintf(buf + offset, buflen - offset, "\"");
963 pr_debug("\ncmd: %s\n", buf);
964 if (run_command(buf, 0)) {
965 stm32prog_err("GPT partitionning fail: %s",
973 if (data->dev[i].mmc)
974 part_init(mmc_get_blk_desc(data->dev[i].mmc));
977 sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
978 pr_debug("\ncmd: %s", buf);
979 if (run_command(buf, 0))
984 sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
991 run_command("mtd list", 0);
999 static int stm32prog_alt_add(struct stm32prog_data *data,
1000 struct dfu_entity *dfu,
1001 struct stm32prog_part_t *part)
1007 char buf[ALT_BUF_LEN];
1009 char multiplier, type;
1011 /* max 3 digit for sector size */
1012 if (part->size > SZ_1M) {
1013 size = (u32)(part->size / SZ_1M);
1015 } else if (part->size > SZ_1K) {
1016 size = (u32)(part->size / SZ_1K);
1019 size = (u32)part->size;
1022 if (IS_SELECT(part) && !IS_EMPTY(part))
1023 type = 'e'; /*Readable and Writeable*/
1025 type = 'a';/*Readable*/
1027 memset(buf, 0, sizeof(buf));
1028 offset = snprintf(buf, ALT_BUF_LEN - offset,
1029 "@%s/0x%02x/1*%d%c%c ",
1030 part->name, part->id,
1031 size, multiplier, type);
1033 if (part->target == STM32PROG_RAM) {
1034 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1035 "ram 0x%llx 0x%llx",
1036 part->addr, part->size);
1037 } else if (part->part_type == RAW_IMAGE) {
1040 if (part->dev->target == STM32PROG_MMC)
1041 dfu_size = part->size / part->dev->mmc->read_bl_len;
1043 dfu_size = part->size;
1044 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1045 "raw 0x0 0x%llx", dfu_size);
1046 } else if (part->part_id < 0) {
1047 u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
1049 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1050 "raw 0x%llx 0x%llx",
1051 part->addr, nb_blk);
1052 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1053 " mmcpart %d;", -(part->part_id));
1055 if (part->part_type == PART_SYSTEM &&
1056 (part->target == STM32PROG_NAND ||
1057 part->target == STM32PROG_NOR ||
1058 part->target == STM32PROG_SPI_NAND))
1059 offset += snprintf(buf + offset,
1060 ALT_BUF_LEN - offset,
1063 offset += snprintf(buf + offset,
1064 ALT_BUF_LEN - offset,
1066 /* dev_id requested by DFU MMC */
1067 if (part->target == STM32PROG_MMC)
1068 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1069 " %d", part->dev_id);
1070 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1071 " %d;", part->part_id);
1073 switch (part->target) {
1076 sprintf(dfustr, "mmc");
1077 sprintf(devstr, "%d", part->dev_id);
1081 case STM32PROG_NAND:
1083 case STM32PROG_SPI_NAND:
1084 sprintf(dfustr, "mtd");
1085 get_mtd_by_target(devstr, part->target, part->dev_id);
1089 sprintf(dfustr, "ram");
1090 sprintf(devstr, "0");
1093 stm32prog_err("invalid target: %d", part->target);
1096 pr_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
1097 ret = dfu_alt_add(dfu, dfustr, devstr, buf);
1098 pr_debug("dfu_alt_add(%s,%s,%s) result %d\n",
1099 dfustr, devstr, buf, ret);
1104 static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
1105 char *name, int phase, int size)
1109 char buf[ALT_BUF_LEN];
1111 sprintf(devstr, "%d", phase);
1112 sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
1113 ret = dfu_alt_add(dfu, "virt", devstr, buf);
1114 pr_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
1119 static int dfu_init_entities(struct stm32prog_data *data)
1122 int phase, i, alt_id;
1123 struct stm32prog_part_t *part;
1124 struct dfu_entity *dfu;
1127 alt_nb = 3; /* number of virtual = CMD, OTP, PMIC*/
1128 if (data->part_nb == 0)
1129 alt_nb++; /* +1 for FlashLayout */
1131 for (i = 0; i < data->part_nb; i++) {
1132 if (data->part_array[i].target != STM32PROG_NONE)
1136 if (dfu_alt_init(alt_nb, &dfu))
1139 puts("DFU alt info setting: ");
1140 if (data->part_nb) {
1143 (phase <= PHASE_LAST_USER) &&
1144 (alt_id < alt_nb) && !ret;
1146 /* ordering alt setting by phase id */
1148 for (i = 0; i < data->part_nb; i++) {
1149 if (phase == data->part_array[i].id) {
1150 part = &data->part_array[i];
1156 if (part->target == STM32PROG_NONE)
1158 part->alt_id = alt_id;
1161 ret = stm32prog_alt_add(data, dfu, part);
1164 char buf[ALT_BUF_LEN];
1166 sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
1167 PHASE_FLASHLAYOUT, STM32_DDR_BASE);
1168 ret = dfu_alt_add(dfu, "ram", NULL, buf);
1169 pr_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
1173 ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512);
1176 ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512);
1178 if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
1179 ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8);
1182 stm32prog_err("dfu init failed: %d", ret);
1186 dfu_show_entities();
1191 int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1194 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1196 if (!data->otp_part) {
1197 data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1198 if (!data->otp_part)
1203 memset(data->otp_part, 0, OTP_SIZE);
1205 if (offset + *size > OTP_SIZE)
1206 *size = OTP_SIZE - offset;
1208 memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
1213 int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1216 #ifndef CONFIG_ARM_SMCCC
1217 stm32prog_err("OTP update not supported");
1223 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1224 /* alway read for first packet */
1226 if (!data->otp_part)
1228 memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1230 if (!data->otp_part) {
1235 /* init struct with 0 */
1236 memset(data->otp_part, 0, OTP_SIZE);
1238 /* call the service */
1239 result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
1240 (u32)data->otp_part, 0);
1245 if (!data->otp_part) {
1250 if (offset + *size > OTP_SIZE)
1251 *size = OTP_SIZE - offset;
1252 memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
1255 pr_debug("%s: result %i\n", __func__, result);
1261 int stm32prog_otp_start(struct stm32prog_data *data)
1263 #ifndef CONFIG_ARM_SMCCC
1264 stm32prog_err("OTP update not supported");
1269 struct arm_smccc_res res;
1271 if (!data->otp_part) {
1272 stm32prog_err("start OTP without data");
1276 arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
1277 (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
1285 stm32prog_err("Provisioning");
1289 pr_err("%s: OTP incorrect value (err = %ld)\n",
1295 pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
1296 __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
1300 free(data->otp_part);
1301 data->otp_part = NULL;
1302 pr_debug("%s: result %i\n", __func__, result);
1308 int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1311 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1314 memset(data->pmic_part, 0, PMIC_SIZE);
1316 if (offset + *size > PMIC_SIZE)
1317 *size = PMIC_SIZE - offset;
1319 memcpy(&data->pmic_part[offset], buffer, *size);
1324 int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1327 int result = 0, ret;
1328 struct udevice *dev;
1330 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1331 stm32prog_err("PMIC update not supported");
1336 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1337 ret = uclass_get_device_by_driver(UCLASS_MISC,
1338 DM_GET_DRIVER(stpmic1_nvm),
1343 /* alway request PMIC for first packet */
1345 /* init struct with 0 */
1346 memset(data->pmic_part, 0, PMIC_SIZE);
1348 ret = uclass_get_device_by_driver(UCLASS_MISC,
1349 DM_GET_DRIVER(stpmic1_nvm),
1354 ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1359 if (ret != PMIC_SIZE) {
1365 if (offset + *size > PMIC_SIZE)
1366 *size = PMIC_SIZE - offset;
1368 memcpy(buffer, &data->pmic_part[offset], *size);
1371 pr_debug("%s: result %i\n", __func__, result);
1375 int stm32prog_pmic_start(struct stm32prog_data *data)
1378 struct udevice *dev;
1380 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1381 stm32prog_err("PMIC update not supported");
1386 ret = uclass_get_device_by_driver(UCLASS_MISC,
1387 DM_GET_DRIVER(stpmic1_nvm),
1392 return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1395 /* copy FSBL on NAND to improve reliability on NAND */
1396 static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
1400 struct image_header_s header;
1401 struct raw_header_s raw_header;
1402 struct dfu_entity *dfu;
1405 if (part->target != STM32PROG_NAND &&
1406 part->target != STM32PROG_SPI_NAND)
1409 dfu = dfu_get_entity(part->alt_id);
1412 dfu_transaction_cleanup(dfu);
1413 size = BL_HEADER_SIZE;
1414 ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
1417 if (stm32prog_header_check(&raw_header, &header))
1420 /* read header + payload */
1421 size = header.image_length + BL_HEADER_SIZE;
1422 size = round_up(size, part->dev->mtd->erasesize);
1423 fsbl = calloc(1, size);
1426 ret = dfu->read_medium(dfu, 0, fsbl, &size);
1427 pr_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
1431 dfu_transaction_cleanup(dfu);
1433 for (i = part->bin_nb - 1; i > 0; i--) {
1435 /* write to the next erase block */
1436 ret = dfu->write_medium(dfu, offset, fsbl, &size);
1437 pr_debug("%s copy at ofset=%lx size=%lx ret=%d",
1438 __func__, offset, size, ret);
1448 static void stm32prog_end_phase(struct stm32prog_data *data)
1450 if (data->phase == PHASE_FLASHLAYOUT) {
1451 if (parse_flash_layout(data, STM32_DDR_BASE, 0))
1452 stm32prog_err("Layout: invalid FlashLayout");
1456 if (!data->cur_part)
1459 if (data->cur_part->target == STM32PROG_RAM) {
1460 if (data->cur_part->part_type == PART_SYSTEM)
1461 data->uimage = data->cur_part->addr;
1462 if (data->cur_part->part_type == PART_FILESYSTEM)
1463 data->dtb = data->cur_part->addr;
1466 if (CONFIG_IS_ENABLED(MMC) &&
1467 data->cur_part->part_id < 0) {
1470 sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
1471 data->cur_part->dev_id, data->cur_part->dev_id,
1472 -(data->cur_part->part_id));
1473 if (run_command(cmdbuf, 0)) {
1474 stm32prog_err("commands '%s' failed", cmdbuf);
1479 if (CONFIG_IS_ENABLED(MTD) &&
1480 data->cur_part->bin_nb > 1) {
1481 if (stm32prog_copy_fsbl(data->cur_part)) {
1482 stm32prog_err("%s (0x%x): copy of fsbl failed",
1483 data->cur_part->name, data->cur_part->id);
1489 void stm32prog_do_reset(struct stm32prog_data *data)
1491 if (data->phase == PHASE_RESET) {
1492 data->phase = PHASE_DO_RESET;
1493 puts("Reset requested\n");
1497 void stm32prog_next_phase(struct stm32prog_data *data)
1500 struct stm32prog_part_t *part;
1503 phase = data->phase;
1507 case PHASE_DO_RESET:
1511 /* found next selected partition */
1513 data->cur_part = NULL;
1514 data->phase = PHASE_END;
1518 if (phase > PHASE_LAST_USER)
1520 for (i = 0; i < data->part_nb; i++) {
1521 part = &data->part_array[i];
1522 if (part->id == phase) {
1523 if (IS_SELECT(part) && !IS_EMPTY(part)) {
1524 data->cur_part = part;
1525 data->phase = phase;
1533 if (data->phase == PHASE_END)
1534 puts("Phase=END\n");
1537 static int part_delete(struct stm32prog_data *data,
1538 struct stm32prog_part_t *part)
1542 unsigned long blks, blks_offset, blks_size;
1543 struct blk_desc *block_dev = NULL;
1550 printf("Erasing %s ", part->name);
1551 switch (part->target) {
1554 printf("on mmc %d: ", part->dev->dev_id);
1555 block_dev = mmc_get_blk_desc(part->dev->mmc);
1556 blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
1557 blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
1558 /* -1 or -2 : delete boot partition of MMC
1559 * need to switch to associated hwpart 1 or 2
1561 if (part->part_id < 0)
1562 if (blk_select_hwpart_devnum(IF_TYPE_MMC,
1567 blks = blk_derase(block_dev, blks_offset, blks_size);
1569 /* return to user partition */
1570 if (part->part_id < 0)
1571 blk_select_hwpart_devnum(IF_TYPE_MMC,
1572 part->dev->dev_id, 0);
1573 if (blks != blks_size) {
1575 stm32prog_err("%s (0x%x): MMC erase failed",
1576 part->name, part->id);
1582 case STM32PROG_NAND:
1583 case STM32PROG_SPI_NAND:
1584 get_mtd_by_target(devstr, part->target, part->dev->dev_id);
1585 printf("on %s: ", devstr);
1586 sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
1587 devstr, part->addr, part->size);
1588 if (run_command(cmdbuf, 0)) {
1590 stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
1591 part->name, part->id, cmdbuf);
1597 memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
1601 stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
1610 static void stm32prog_devices_init(struct stm32prog_data *data)
1614 struct stm32prog_part_t *part;
1616 ret = treat_partition_list(data);
1620 /* initialize the selected device */
1621 for (i = 0; i < data->dev_nb; i++) {
1622 ret = init_device(data, &data->dev[i]);
1627 /* delete RAW partition before create partition */
1628 for (i = 0; i < data->part_nb; i++) {
1629 part = &data->part_array[i];
1631 if (part->part_type != RAW_IMAGE)
1634 if (!IS_SELECT(part) || !IS_DELETE(part))
1637 ret = part_delete(data, part);
1642 ret = create_partitions(data);
1646 /* delete partition GPT or MTD */
1647 for (i = 0; i < data->part_nb; i++) {
1648 part = &data->part_array[i];
1650 if (part->part_type == RAW_IMAGE)
1653 if (!IS_SELECT(part) || !IS_DELETE(part))
1656 ret = part_delete(data, part);
1667 int stm32prog_dfu_init(struct stm32prog_data *data)
1669 /* init device if no error */
1671 stm32prog_devices_init(data);
1674 stm32prog_next_phase(data);
1676 /* prepare DFU for device read/write */
1677 dfu_free_entities();
1678 return dfu_init_entities(data);
1681 int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
1683 memset(data, 0x0, sizeof(*data));
1684 data->read_phase = PHASE_RESET;
1685 data->phase = PHASE_FLASHLAYOUT;
1687 return parse_flash_layout(data, addr, size);
1690 void stm32prog_clean(struct stm32prog_data *data)
1693 dfu_free_entities();
1694 free(data->part_array);
1695 free(data->otp_part);
1697 free(data->header_data);
1700 /* DFU callback: used after serial and direct DFU USB access */
1701 void dfu_flush_callback(struct dfu_entity *dfu)
1703 if (!stm32prog_data)
1706 if (dfu->dev_type == DFU_DEV_VIRT) {
1707 if (dfu->data.virt.dev_num == PHASE_OTP)
1708 stm32prog_otp_start(stm32prog_data);
1709 else if (dfu->data.virt.dev_num == PHASE_PMIC)
1710 stm32prog_pmic_start(stm32prog_data);
1714 if (dfu->dev_type == DFU_DEV_RAM) {
1715 if (dfu->alt == 0 &&
1716 stm32prog_data->phase == PHASE_FLASHLAYOUT) {
1717 stm32prog_end_phase(stm32prog_data);
1718 /* waiting DFU DETACH for reenumeration */
1722 if (!stm32prog_data->cur_part)
1725 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1726 stm32prog_end_phase(stm32prog_data);
1727 stm32prog_next_phase(stm32prog_data);
1731 void dfu_initiated_callback(struct dfu_entity *dfu)
1733 if (!stm32prog_data)
1736 if (!stm32prog_data->cur_part)
1739 /* force the saved offset for the current partition */
1740 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1741 dfu->offset = stm32prog_data->offset;
1742 stm32prog_data->dfu_seq = 0;
1743 pr_debug("dfu offset = 0x%llx\n", dfu->offset);