1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
6 #include <dt-bindings/pwm/pwm.h>
10 model = "Theobroma Systems RK3399-Q7 SoM";
11 compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
14 u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
15 u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
16 u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
17 u-boot,boot-led = "module_led";
18 sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
22 stdout-path = "serial0:115200n8";
23 u-boot,spl-boot-order = \
24 "same-as-spl", &spiflash, &sdhci, &sdmmc;
33 compatible = "gpio-leds";
34 pinctrl-names = "default";
35 pinctrl-0 = <&leds_pins_puma>;
39 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
40 linux,default-trigger = "heartbeat";
44 label = "sd_card_led";
45 gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
46 linux,default-trigger = "mmc0";
50 clkin_gmac: external-gmac-clock {
51 compatible = "fixed-clock";
52 clock-frequency = <125000000>;
53 clock-output-names = "clkin_gmac";
57 dw_hdmi_audio: dw-hdmi-audio {
59 compatible = "rockchip,dw-hdmi-audio";
60 #sound-dai-cells = <0>;
63 hdmi_codec: hdmi-codec {
64 compatible = "simple-audio-card";
65 simple-audio-card,format = "i2s";
66 simple-audio-card,mclk-fs = <256>;
67 simple-audio-card,name = "HDMI-CODEC";
69 simple-audio-card,cpu {
73 simple-audio-card,codec {
78 hdmi_sound: hdmi-sound {
80 compatible = "simple-audio-card";
81 simple-audio-card,format = "i2s";
82 simple-audio-card,mclk-fs = <256>;
83 simple-audio-card,name = "rockchip,hdmi";
85 simple-audio-card,cpu {
88 simple-audio-card,codec {
93 usbhub_enable: usbhub_enable {
94 compatible = "regulator-fixed";
95 regulator-name = "usbhub_enable";
97 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&host_vbus_drv>;
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
106 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
107 * eMMC and SPI flash powered-down initially (in fact it keeps the
108 * reset signal asserted). Even though it is an enable signal, we
109 * model this as a regulator.
111 bios_enable: bios_enable {
112 compatible = "regulator-fixed";
114 regulator-name = "bios_enable";
116 gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
119 regulator-min-microvolt = <1800000>;
120 regulator-max-microvolt = <1800000>;
123 vccadc_ref: vccadc-ref {
124 compatible = "regulator-fixed";
125 regulator-name = "vcc1v8_sys";
128 regulator-min-microvolt = <1800000>;
129 regulator-max-microvolt = <1800000>;
132 vcc3v3_sys: vcc3v3-sys {
133 compatible = "regulator-fixed";
134 regulator-name = "vcc3v3_sys";
137 regulator-min-microvolt = <3300000>;
138 regulator-max-microvolt = <3300000>;
141 vcc5v0_otg: vcc5v0-otg-regulator {
142 compatible = "regulator-fixed";
144 gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&otg_vbus_drv>;
147 regulator-name = "vcc5v0_otg";
151 vcc5v0_sys: vcc5v0-sys {
152 compatible = "regulator-fixed";
153 regulator-name = "vcc5v0_sys";
156 regulator-min-microvolt = <5000000>;
157 regulator-max-microvolt = <5000000>;
160 vcc_phy: vcc-phy-regulator {
161 compatible = "regulator-fixed";
162 regulator-name = "vcc_phy";
168 compatible = "pwm-regulator";
169 pwms = <&pwm2 0 25000 1>;
170 regulator-name = "vdd_log";
171 regulator-min-microvolt = <800000>;
172 regulator-max-microvolt = <1400000>;
175 regulator-init-microvolt = <900000>;
184 phy-supply = <&vcc_phy>;
186 clock_in_out = "input";
187 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
188 snps,reset-active-low;
189 snps,reset-delays-us = <2 10000 50000>;
190 assigned-clocks = <&cru SCLK_RMII_SRC>;
191 assigned-clock-parents = <&clkin_gmac>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&rgmii_pins>;
200 #sound-dai-cells = <0>;
206 i2c-scl-rising-time-ns = <168>;
207 i2c-scl-falling-time-ns = <4>;
208 clock-frequency = <400000>;
212 compatible = "fcs,fan53555";
214 vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
215 vin-supply = <&vcc5v0_sys>;
216 regulator-compatible = "fan53555-reg";
217 regulator-name = "vdd_gpu";
218 regulator-min-microvolt = <600000>;
219 regulator-max-microvolt = <1230000>;
220 regulator-ramp-delay = <1000>;
221 fcs,suspend-voltage-selector = <1>;
224 regulator-initial-state = <3>;
225 regulator-state-mem {
226 regulator-off-in-suspend;
231 compatible = "rockchip,rk808";
233 interrupt-parent = <&gpio1>;
234 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt?
235 pinctrl-names = "default";
236 pinctrl-0 = <&pmic_int_l>;
237 rockchip,system-power-controller;
240 clock-output-names = "xin32k", "rk808-clkout2";
242 vcc1-supply = <&vcc5v0_sys>;
243 vcc2-supply = <&vcc5v0_sys>;
244 vcc3-supply = <&vcc5v0_sys>;
245 vcc4-supply = <&vcc5v0_sys>;
246 vcc6-supply = <&vcc5v0_sys>;
247 vcc7-supply = <&vcc5v0_sys>;
248 vcc8-supply = <&vcc3v3_sys>;
249 vcc9-supply = <&vcc5v0_sys>;
250 vcc10-supply = <&vcc5v0_sys>;
251 vcc11-supply = <&vcc5v0_sys>;
252 vcc12-supply = <&vcc3v3_sys>;
253 vddio-supply = <&vcc1v8_pmu>;
256 vdd_center: DCDC_REG1 {
259 regulator-min-microvolt = <750000>;
260 regulator-max-microvolt = <1350000>;
261 regulator-ramp-delay = <6001>;
262 regulator-name = "vdd_center";
263 regulator-state-mem {
264 regulator-off-in-suspend;
268 vdd_cpu_l: DCDC_REG2 {
271 regulator-min-microvolt = <750000>;
272 regulator-max-microvolt = <1350000>;
273 regulator-ramp-delay = <6001>;
274 regulator-name = "vdd_cpu_l";
275 regulator-state-mem {
276 regulator-off-in-suspend;
283 regulator-name = "vcc_ddr";
284 regulator-state-mem {
285 regulator-on-in-suspend;
292 regulator-min-microvolt = <1800000>;
293 regulator-max-microvolt = <1800000>;
294 regulator-name = "vcc_1v8";
295 regulator-state-mem {
296 regulator-on-in-suspend;
297 regulator-suspend-microvolt = <1800000>;
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <1800000>;
305 regulator-name = "vcc_ldo1";
306 regulator-state-mem {
307 regulator-off-in-suspend;
311 vcc1v8_hdmi: LDO_REG2 {
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <1800000>;
316 regulator-name = "vcc1v8_hdmi";
317 regulator-state-mem {
318 regulator-off-in-suspend;
322 vcc1v8_pmu: LDO_REG3 {
325 regulator-min-microvolt = <1800000>;
326 regulator-max-microvolt = <1800000>;
327 regulator-name = "vcc1v8_pmu";
328 regulator-state-mem {
329 regulator-on-in-suspend;
330 regulator-suspend-microvolt = <1800000>;
337 regulator-min-microvolt = <1800000>;
338 regulator-max-microvolt = <3000000>;
339 regulator-name = "vcc_sd";
340 regulator-state-mem {
341 regulator-on-in-suspend;
342 regulator-suspend-microvolt = <3000000>;
348 regulator-min-microvolt = <3000000>;
349 regulator-max-microvolt = <3000000>;
350 regulator-name = "vcc_ldo5";
351 regulator-state-mem {
352 regulator-off-in-suspend;
358 regulator-min-microvolt = <1500000>;
359 regulator-max-microvolt = <1500000>;
360 regulator-name = "vcc_ldo6";
361 regulator-state-mem {
362 regulator-off-in-suspend;
366 vcc0v9_hdmi: LDO_REG7 {
369 regulator-min-microvolt = <900000>;
370 regulator-max-microvolt = <900000>;
371 regulator-name = "vcc0v9_hdmi";
372 regulator-state-mem {
373 regulator-off-in-suspend;
377 vcc_efuse: LDO_REG8 {
380 regulator-min-microvolt = <1800000>;
381 regulator-max-microvolt = <1800000>;
382 regulator-name = "vcc_efuse";
383 regulator-state-mem {
384 regulator-off-in-suspend;
388 vcc3v3_s3: SWITCH_REG1 {
391 regulator-name = "vcc3v3_s3";
392 regulator-state-mem {
393 regulator-off-in-suspend;
397 vcc3v3_s0: SWITCH_REG2 {
400 regulator-name = "vcc3v3_s0";
401 regulator-state-mem {
402 regulator-off-in-suspend;
411 clock-frequency = <400000>;
413 vdd_cpu_b: vdd_cpu_b {
415 compatible = "fcs,fan53555";
417 vsel-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
418 vin-supply = <&vcc5v0_sys>;
419 regulator-compatible = "fan53555-reg";
420 regulator-name = "vdd_cpu_b";
421 regulator-min-microvolt = <600000>;
422 regulator-max-microvolt = <1230000>;
423 regulator-ramp-delay = <1000>;
424 fcs,suspend-voltage-selector = <1>;
427 regulator-initial-state = <3>;
428 regulator-state-mem {
429 regulator-off-in-suspend;
436 rockchip,i2s-broken-burst-len;
437 rockchip,playback-channels = <8>;
438 rockchip,capture-channels = <8>;
439 #sound-dai-cells = <0>;
443 #sound-dai-cells = <0>;
450 bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */
451 audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */
452 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
453 gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */
457 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
458 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
459 assigned-clock-rates = <100000000>;
460 ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pcie_clkreqn>;
473 pmu1830-supply = <&vcc_1v8>;
489 keep-power-in-suspend;
490 mmc-hs400-enhanced-strobe;
496 clock-frequency = <150000000>;
497 max-frequency = <40000000>;
504 vqmmc-supply = <&vcc_sd>;
505 pinctrl-names = "default";
506 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
536 tsd,usb-port-power = "usbhub_enable";
552 /* Pins that are not explicitely used by any devices */
553 pinctrl-names = "default";
554 pinctrl-0 = <&puma_pin_hog>;
557 puma_pin_hog: puma_pin_hog {
559 /* We need pull-ups on Q7 buttons */
560 <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
561 <RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
562 <RK_GPIO0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
563 <RK_GPIO0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
568 pmic_int_l: pmic-int-l {
570 <RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
574 leds_pins_puma: led_pins@0 {
576 <RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
577 <RK_GPIO1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
581 otg_vbus_drv: otg-vbus-drv {
583 <RK_GPIO0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
586 host_vbus_drv: host-vbus-drv {
588 <RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
593 i2c8_xfer_a: i2c8-xfer {
595 <RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
596 <RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
603 clock-frequency = <400000>;
607 clock-frequency = <400000>;
611 clock-frequency = <400000>;
615 clock-frequency = <400000>;
619 /* Enable pull-ups, the pins would float otherwise. */
621 <RK_GPIO2 RK_PB2 RK_FUNC_2 &pcfg_pull_up>,
622 <RK_GPIO2 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
627 clock-frequency = <400000>;
630 compatible = "isil,isl1208";
634 compatible = "ti,amc6821";
636 cooling-min-state = <0>;
637 cooling-max-state = <9>;
638 #cooling-cells = <2>;
644 pinctrl-names = "default";
645 pinctrl-0 = <&uart0_xfer &uart0_cts>;
655 #address-cells = <1>;
658 spiflash: w25q32dw@0 {
661 compatible = "spi-flash";
663 spi-max-frequency = <49500000>;