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0176d43e SP |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
c9e798d3 | 3 | * Stelian Pop <[email protected]> |
0176d43e SP |
4 | * Lead Tech Design <www.leadtechdesign.com> |
5 | * | |
df486b1f | 6 | * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. |
0176d43e | 7 | * |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
0176d43e SP |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
8c6407fc RM |
14 | /* |
15 | * SoC must be defined first, before hardware.h is included. | |
16 | * In this case SoC is defined in boards.cfg. | |
17 | */ | |
18 | #include <asm/hardware.h> | |
425de62d | 19 | |
8c6407fc RM |
20 | /* |
21 | * Warning: changing CONFIG_SYS_TEXT_BASE requires | |
22 | * adapting the initial boot program. | |
23 | * Since the linker has to swallow that define, we must use a pure | |
24 | * hex number here! | |
25 | */ | |
26 | #define CONFIG_SYS_TEXT_BASE 0x21f00000 | |
0176d43e | 27 | |
8c6407fc RM |
28 | /* ARM asynchronous clock */ |
29 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ | |
30 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ | |
df486b1f | 31 | |
8c6407fc RM |
32 | /* Define actual evaluation board type from used processor type */ |
33 | #ifdef CONFIG_AT91SAM9G20 | |
34 | # define CONFIG_AT91SAM9G20EK /* It's an Atmel AT91SAM9G20 EK */ | |
df486b1f | 35 | #else |
8c6407fc | 36 | # define CONFIG_AT91SAM9260EK /* It's an Atmel AT91SAM9260 EK */ |
df486b1f NF |
37 | #endif |
38 | ||
8c6407fc | 39 | /* Misc CPU related */ |
dc39ae95 | 40 | #define CONFIG_ARCH_CPU_INIT |
8c6407fc RM |
41 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
42 | #define CONFIG_SETUP_MEMORY_TAGS | |
43 | #define CONFIG_INITRD_TAG | |
0176d43e | 44 | #define CONFIG_SKIP_LOWLEVEL_INIT |
8c6407fc RM |
45 | |
46 | /* general purpose I/O */ | |
47 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
0176d43e | 48 | |
0176d43e SP |
49 | /* |
50 | * BOOTP options | |
51 | */ | |
52 | #define CONFIG_BOOTP_BOOTFILESIZE 1 | |
53 | #define CONFIG_BOOTP_BOOTPATH 1 | |
54 | #define CONFIG_BOOTP_GATEWAY 1 | |
55 | #define CONFIG_BOOTP_HOSTNAME 1 | |
56 | ||
8c6407fc RM |
57 | /* |
58 | * SDRAM: 1 bank, min 32, max 128 MB | |
59 | * Initialized before u-boot gets started. | |
60 | */ | |
0176d43e | 61 | #define CONFIG_NR_DRAM_BANKS 1 |
8c6407fc RM |
62 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
63 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
64 | ||
65 | /* | |
66 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, | |
67 | * leaving the correct space for initial global data structure above | |
68 | * that address while providing maximum stack area below. | |
69 | */ | |
70 | #ifdef CONFIG_AT91SAM9XE | |
71 | # define CONFIG_SYS_INIT_SP_ADDR \ | |
83f1c2ef | 72 | (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
8c6407fc RM |
73 | #else |
74 | # define CONFIG_SYS_INIT_SP_ADDR \ | |
83f1c2ef | 75 | (ATMEL_BASE_SRAM1 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
8c6407fc | 76 | #endif |
0176d43e | 77 | |
d0a51373 AB |
78 | /* |
79 | * The (arm)linux board id set by generic code depending on configured board | |
80 | * (see boards.cfg for different boards) | |
81 | */ | |
82 | #ifdef CONFIG_AT91SAM9G20 | |
83 | /* the sam9g20 variants have two different board ids */ | |
84 | # ifdef CONFIG_AT91SAM9G20EK_2MMC | |
85 | /* we may be setup for the 2MMC variant of at91sam9g20ek */ | |
86 | # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK_2MMC | |
87 | # else | |
88 | /* or the normal at91sam9g20ek */ | |
89 | # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9G20EK | |
90 | # endif | |
91 | #else | |
92 | /* otherwise default to good old at91sam9260ek */ | |
93 | # define CONFIG_MACH_TYPE MACH_TYPE_AT91SAM9260EK | |
94 | #endif | |
95 | ||
0176d43e | 96 | /* NAND flash */ |
74c076d6 JCPV |
97 | #ifdef CONFIG_CMD_NAND |
98 | #define CONFIG_NAND_ATMEL | |
8c6407fc RM |
99 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
100 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
101 | #define CONFIG_SYS_NAND_DBW_8 | |
102 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
103 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
104 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
105 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
74c076d6 | 106 | #endif |
0176d43e | 107 | |
0176d43e | 108 | /* USB */ |
2b7178af | 109 | #define CONFIG_USB_ATMEL |
dcd2f1a0 | 110 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
0176d43e | 111 | #define CONFIG_USB_OHCI_NEW 1 |
6d0f6bcf JCPV |
112 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
113 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ | |
114 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" | |
115 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
0176d43e | 116 | |
6d0f6bcf | 117 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
0176d43e | 118 | |
8c6407fc | 119 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
6d0f6bcf | 120 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
0176d43e | 121 | |
6d0f6bcf | 122 | #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 |
0176d43e SP |
123 | |
124 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
f166af88 | 125 | #define CONFIG_ENV_OFFSET 0x4200 |
0e8d1586 | 126 | #define CONFIG_ENV_SIZE 0x4200 |
f166af88 WY |
127 | #define CONFIG_ENV_SECT_SIZE 0x210 |
128 | #define CONFIG_ENV_SPI_MAX_HZ 15000000 | |
129 | #define CONFIG_BOOTCOMMAND "sf probe 0:0; " \ | |
130 | "sf read 0x22000000 0x84000 0x294000; " \ | |
131 | "bootm 0x22000000" | |
0176d43e | 132 | |
6d0f6bcf | 133 | #elif CONFIG_SYS_USE_DATAFLASH_CS1 |
0176d43e | 134 | |
f166af88 | 135 | #define CONFIG_ENV_OFFSET 0x4200 |
0e8d1586 | 136 | #define CONFIG_ENV_SIZE 0x4200 |
f166af88 WY |
137 | #define CONFIG_ENV_SECT_SIZE 0x210 |
138 | #define CONFIG_ENV_SPI_MAX_HZ 15000000 | |
139 | #define CONFIG_BOOTCOMMAND "sf probe 0:1; " \ | |
140 | "sf read 0x22000000 0x84000 0x294000; " \ | |
141 | "bootm 0x22000000" | |
0176d43e | 142 | |
24802073 | 143 | #elif defined(CONFIG_SYS_USE_NANDFLASH) |
0176d43e SP |
144 | |
145 | /* bootstrap + u-boot + env + linux in nandflash */ | |
83f1c2ef | 146 | #define CONFIG_ENV_OFFSET 0x120000 |
0c58cfa9 | 147 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 |
0e8d1586 | 148 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
0c58cfa9 | 149 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" |
0176d43e | 150 | |
24802073 WJ |
151 | #else /* CONFIG_SYS_USE_MMC */ |
152 | /* bootstrap + u-boot + env + linux in mmc */ | |
24802073 WJ |
153 | /* For FAT system, most cases it should be in the reserved sector */ |
154 | #define CONFIG_ENV_OFFSET 0x2000 | |
155 | #define CONFIG_ENV_SIZE 0x1000 | |
156 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
157 | ||
158 | #define CONFIG_BOOTCOMMAND \ | |
159 | "fatload mmc 0:1 0x22000000 uImage; bootm" | |
0176d43e SP |
160 | #endif |
161 | ||
6d0f6bcf JCPV |
162 | #define CONFIG_SYS_CBSIZE 256 |
163 | #define CONFIG_SYS_MAXARGS 16 | |
6d0f6bcf | 164 | #define CONFIG_SYS_LONGHELP 1 |
0176d43e | 165 | #define CONFIG_CMDLINE_EDITING 1 |
e139cb31 | 166 | #define CONFIG_AUTO_COMPLETE |
0176d43e | 167 | |
0176d43e SP |
168 | /* |
169 | * Size of malloc() pool | |
170 | */ | |
6d0f6bcf | 171 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
0176d43e | 172 | |
0176d43e | 173 | #endif |