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0176d43e SP |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
567fb852 | 3 | * Stelian Pop <[email protected]> |
0176d43e SP |
4 | * Lead Tech Design <www.leadtechdesign.com> |
5 | * | |
df486b1f | 6 | * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. |
0176d43e SP |
7 | * |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #ifndef __CONFIG_H | |
28 | #define __CONFIG_H | |
29 | ||
8c6407fc RM |
30 | /* |
31 | * SoC must be defined first, before hardware.h is included. | |
32 | * In this case SoC is defined in boards.cfg. | |
33 | */ | |
34 | #include <asm/hardware.h> | |
425de62d | 35 | |
8c6407fc RM |
36 | /* |
37 | * Warning: changing CONFIG_SYS_TEXT_BASE requires | |
38 | * adapting the initial boot program. | |
39 | * Since the linker has to swallow that define, we must use a pure | |
40 | * hex number here! | |
41 | */ | |
42 | #define CONFIG_SYS_TEXT_BASE 0x21f00000 | |
0176d43e | 43 | |
8c6407fc RM |
44 | /* ARM asynchronous clock */ |
45 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ | |
46 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ | |
47 | #define CONFIG_SYS_HZ 1000 | |
df486b1f | 48 | |
8c6407fc RM |
49 | /* Define actual evaluation board type from used processor type */ |
50 | #ifdef CONFIG_AT91SAM9G20 | |
51 | # define CONFIG_AT91SAM9G20EK /* It's an Atmel AT91SAM9G20 EK */ | |
df486b1f | 52 | #else |
8c6407fc | 53 | # define CONFIG_AT91SAM9260EK /* It's an Atmel AT91SAM9260 EK */ |
df486b1f NF |
54 | #endif |
55 | ||
8c6407fc | 56 | /* Misc CPU related */ |
dc39ae95 | 57 | #define CONFIG_ARCH_CPU_INIT |
8c6407fc RM |
58 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
59 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
60 | #define CONFIG_SETUP_MEMORY_TAGS | |
61 | #define CONFIG_INITRD_TAG | |
0176d43e | 62 | #define CONFIG_SKIP_LOWLEVEL_INIT |
8c6407fc RM |
63 | #define CONFIG_BOARD_EARLY_INIT_F |
64 | #define CONFIG_DISPLAY_CPUINFO | |
65 | ||
66 | /* general purpose I/O */ | |
67 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
68 | #define CONFIG_AT91_GPIO | |
69 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
70 | ||
71 | /* serial console */ | |
72 | #define CONFIG_ATMEL_USART | |
73 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
74 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
75 | #define CONFIG_BAUDRATE 115200 | |
76 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } | |
0176d43e | 77 | |
a484b00b JCPV |
78 | /* LED */ |
79 | #define CONFIG_AT91_LED | |
80 | #define CONFIG_RED_LED AT91_PIN_PA9 /* this is the power led */ | |
81 | #define CONFIG_GREEN_LED AT91_PIN_PA6 /* this is the user led */ | |
82 | ||
0176d43e | 83 | #define CONFIG_BOOTDELAY 3 |
0176d43e | 84 | |
0176d43e SP |
85 | /* |
86 | * BOOTP options | |
87 | */ | |
88 | #define CONFIG_BOOTP_BOOTFILESIZE 1 | |
89 | #define CONFIG_BOOTP_BOOTPATH 1 | |
90 | #define CONFIG_BOOTP_GATEWAY 1 | |
91 | #define CONFIG_BOOTP_HOSTNAME 1 | |
92 | ||
93 | /* | |
94 | * Command line configuration. | |
95 | */ | |
96 | #include <config_cmd_default.h> | |
97 | #undef CONFIG_CMD_BDI | |
0176d43e | 98 | #undef CONFIG_CMD_FPGA |
74de7aef | 99 | #undef CONFIG_CMD_IMI |
0176d43e | 100 | #undef CONFIG_CMD_IMLS |
74de7aef WD |
101 | #undef CONFIG_CMD_LOADS |
102 | #undef CONFIG_CMD_SOURCE | |
0176d43e SP |
103 | |
104 | #define CONFIG_CMD_PING 1 | |
105 | #define CONFIG_CMD_DHCP 1 | |
106 | #define CONFIG_CMD_NAND 1 | |
107 | #define CONFIG_CMD_USB 1 | |
108 | ||
8c6407fc RM |
109 | /* |
110 | * SDRAM: 1 bank, min 32, max 128 MB | |
111 | * Initialized before u-boot gets started. | |
112 | */ | |
0176d43e | 113 | #define CONFIG_NR_DRAM_BANKS 1 |
8c6407fc RM |
114 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
115 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
116 | ||
117 | /* | |
118 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, | |
119 | * leaving the correct space for initial global data structure above | |
120 | * that address while providing maximum stack area below. | |
121 | */ | |
122 | #ifdef CONFIG_AT91SAM9XE | |
123 | # define CONFIG_SYS_INIT_SP_ADDR \ | |
124 | (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
125 | #else | |
126 | # define CONFIG_SYS_INIT_SP_ADDR \ | |
127 | (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
128 | #endif | |
0176d43e SP |
129 | |
130 | /* DataFlash */ | |
4758ebdd | 131 | #define CONFIG_ATMEL_DATAFLASH_SPI |
0176d43e | 132 | #define CONFIG_HAS_DATAFLASH 1 |
6d0f6bcf JCPV |
133 | #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) |
134 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 | |
135 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
136 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ | |
79f0cb6e | 137 | #define AT91_SPI_CLK 15000000 |
df486b1f NF |
138 | |
139 | #ifdef CONFIG_AT91SAM9G20EK | |
140 | #define DATAFLASH_TCSS (0x22 << 16) | |
141 | #else | |
0176d43e | 142 | #define DATAFLASH_TCSS (0x1a << 16) |
df486b1f | 143 | #endif |
0176d43e SP |
144 | #define DATAFLASH_TCHS (0x1 << 24) |
145 | ||
146 | /* NAND flash */ | |
74c076d6 JCPV |
147 | #ifdef CONFIG_CMD_NAND |
148 | #define CONFIG_NAND_ATMEL | |
8c6407fc RM |
149 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
150 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
151 | #define CONFIG_SYS_NAND_DBW_8 | |
152 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
153 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
154 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
155 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
74c076d6 | 156 | #endif |
0176d43e SP |
157 | |
158 | /* NOR flash - no real flash on this board */ | |
6d0f6bcf | 159 | #define CONFIG_SYS_NO_FLASH 1 |
0176d43e SP |
160 | |
161 | /* Ethernet */ | |
162 | #define CONFIG_MACB 1 | |
163 | #define CONFIG_RMII 1 | |
0176d43e SP |
164 | #define CONFIG_NET_RETRY_COUNT 20 |
165 | #define CONFIG_RESET_PHY_R 1 | |
166 | ||
167 | /* USB */ | |
2b7178af | 168 | #define CONFIG_USB_ATMEL |
0176d43e | 169 | #define CONFIG_USB_OHCI_NEW 1 |
0176d43e | 170 | #define CONFIG_DOS_PARTITION 1 |
6d0f6bcf JCPV |
171 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
172 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ | |
173 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" | |
174 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
0176d43e | 175 | #define CONFIG_USB_STORAGE 1 |
3e0cda07 | 176 | #define CONFIG_CMD_FAT 1 |
0176d43e | 177 | |
6d0f6bcf | 178 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
0176d43e | 179 | |
8c6407fc | 180 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
6d0f6bcf | 181 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
0176d43e | 182 | |
6d0f6bcf | 183 | #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 |
0176d43e SP |
184 | |
185 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
057c849c | 186 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
6d0f6bcf | 187 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
0e8d1586 | 188 | #define CONFIG_ENV_OFFSET 0x4200 |
6d0f6bcf | 189 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
0e8d1586 | 190 | #define CONFIG_ENV_SIZE 0x4200 |
86c8c8a4 | 191 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" |
96996ac2 SP |
192 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
193 | "root=/dev/mtdblock0 " \ | |
918319c7 | 194 | "mtdparts=atmel_nand:-(root) " \ |
96996ac2 | 195 | "rw rootfstype=jffs2" |
0176d43e | 196 | |
6d0f6bcf | 197 | #elif CONFIG_SYS_USE_DATAFLASH_CS1 |
0176d43e SP |
198 | |
199 | /* bootstrap + u-boot + env + linux in dataflash on CS1 */ | |
057c849c | 200 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
6d0f6bcf | 201 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
0e8d1586 | 202 | #define CONFIG_ENV_OFFSET 0x4200 |
6d0f6bcf | 203 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) |
0e8d1586 | 204 | #define CONFIG_ENV_SIZE 0x4200 |
86c8c8a4 | 205 | #define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" |
96996ac2 SP |
206 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
207 | "root=/dev/mtdblock0 " \ | |
918319c7 | 208 | "mtdparts=atmel_nand:-(root) " \ |
96996ac2 | 209 | "rw rootfstype=jffs2" |
0176d43e | 210 | |
6d0f6bcf | 211 | #else /* CONFIG_SYS_USE_NANDFLASH */ |
0176d43e SP |
212 | |
213 | /* bootstrap + u-boot + env + linux in nandflash */ | |
51bfee19 | 214 | #define CONFIG_ENV_IS_IN_NAND 1 |
0e8d1586 JCPV |
215 | #define CONFIG_ENV_OFFSET 0x60000 |
216 | #define CONFIG_ENV_OFFSET_REDUND 0x80000 | |
217 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ | |
0176d43e | 218 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" |
96996ac2 SP |
219 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
220 | "root=/dev/mtdblock5 " \ | |
918319c7 | 221 | "mtdparts=atmel_nand:128k(bootstrap)ro," \ |
96996ac2 SP |
222 | "256k(uboot)ro,128k(env1)ro," \ |
223 | "128k(env2)ro,2M(linux),-(root) " \ | |
224 | "rw rootfstype=jffs2" | |
0176d43e SP |
225 | |
226 | #endif | |
227 | ||
6d0f6bcf JCPV |
228 | #define CONFIG_SYS_PROMPT "U-Boot> " |
229 | #define CONFIG_SYS_CBSIZE 256 | |
230 | #define CONFIG_SYS_MAXARGS 16 | |
231 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
232 | #define CONFIG_SYS_LONGHELP 1 | |
0176d43e SP |
233 | #define CONFIG_CMDLINE_EDITING 1 |
234 | ||
0176d43e SP |
235 | /* |
236 | * Size of malloc() pool | |
237 | */ | |
6d0f6bcf | 238 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
0176d43e SP |
239 | |
240 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ | |
241 | ||
242 | #ifdef CONFIG_USE_IRQ | |
243 | #error CONFIG_USE_IRQ not supported | |
244 | #endif | |
245 | ||
246 | #endif |