[J-u-boot.git] / board / CZ.NIC / turris_mox / turris_mox.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018 Marek Behun <[email protected]>
 */

#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <net.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <clk.h>
#include <dm.h>
#include <env.h>
#include <fdt_support.h>
#include <init.h>
#include <linux/delay.h>
#include <linux/libfdt.h>
#include <linux/string.h>
#include <miiphy.h>
#include <mvebu/comphy.h>
#include <spi.h>

#include "mox_sp.h"

#define MAX_MOX_MODULES		10

#define MOX_MODULE_SFP		0x1
#define MOX_MODULE_PCI		0x2
#define MOX_MODULE_TOPAZ	0x3
#define MOX_MODULE_PERIDOT	0x4
#define MOX_MODULE_USB3		0x5
#define MOX_MODULE_PASSPCI	0x6

#define ARMADA_37XX_NB_GPIO_SEL	(MVEBU_REGISTER(0x13830))
#define ARMADA_37XX_SPI_CTRL	(MVEBU_REGISTER(0x10600))
#define ARMADA_37XX_SPI_CFG	(MVEBU_REGISTER(0x10604))
#define ARMADA_37XX_SPI_DOUT	(MVEBU_REGISTER(0x10608))
#define ARMADA_37XX_SPI_DIN	(MVEBU_REGISTER(0x1060c))

#define ETH1_PATH	"/soc/internal-regs@d0000000/ethernet@40000"
#define MDIO_PATH	"/soc/internal-regs@d0000000/mdio@32004"
#define SFP_GPIO_PATH	"/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
#define PCIE_PATH	"/soc/pcie@d0070000"
#define SFP_PATH	"/sfp"

DECLARE_GLOBAL_DATA_PTR;

#if defined(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
	u8 topology[MAX_MOX_MODULES];
	int i, size, node;
	bool enable;

	/*
	 * SPI driver is not loaded in driver model yet, but we have to find out
	 * if pcie should be enabled in U-Boot's device tree. Therefore we have
	 * to read SPI by reading/writing SPI registers directly
	 */

	writel(0x10df, ARMADA_37XX_SPI_CFG);
	/* put pin from GPIO to SPI mode */
	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
	/* enable SPI CS1 */
	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));

	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
		udelay(1);

	for (i = 0; i < MAX_MOX_MODULES; ++i) {
		writel(0x0, ARMADA_37XX_SPI_DOUT);

		while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
			udelay(1);

		topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
		if (topology[i] == 0xff)
			break;

		topology[i] &= 0xf;
	}

	size = i;

	/* disable SPI CS1 */
	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));

	if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
			 topology[1] == MOX_MODULE_USB3 ||
			 topology[1] == MOX_MODULE_PASSPCI))
		enable = true;
	else
		enable = false;

	node = fdt_path_offset(blob, PCIE_PATH);

	if (node < 0) {
		printf("Cannot find PCIe node in U-Boot's device tree!\n");
		return 0;
	}

	if (fdt_setprop_string(blob, node, "status",
			       enable ? "okay" : "disabled") < 0) {
		printf("Cannot %s PCIe in U-Boot's device tree!\n",
		       enable ? "enable" : "disable");
		return 0;
	}

	if (a3700_fdt_fix_pcie_regions(blob) < 0) {
		printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
		return 0;
	}

	return 0;
}
#endif

int board_init(void)
{
	/* address of boot parameters */
	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

	return 0;
}

static int mox_do_spi(u8 *in, u8 *out, size_t size)
{
	struct spi_slave *slave;
	struct udevice *dev;
	int ret;

	ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
				 "spi_generic_drv", "moxtet@1", &dev,
				 &slave);
	if (ret)
		goto fail;

	ret = spi_claim_bus(slave);
	if (ret)
		goto fail_free;

	ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);

	spi_release_bus(slave);
fail_free:
	spi_free_slave(slave);
fail:
	return ret;
}

static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
{
	static int is_sd;
	static u8 topology[MAX_MOX_MODULES - 1];
	static int size;
	u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
	int ret, i;

	if (size) {
		if (ptopology)
			*ptopology = topology;
		if (psize)
			*psize = size;
		if (pis_sd)
			*pis_sd = is_sd;
		return 0;
	}

	memset(din, 0, MAX_MOX_MODULES);
	memset(dout, 0, MAX_MOX_MODULES);

	ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
	if (ret)
		return ret;

	if (din[0] == 0x10)
		is_sd = 1;
	else if (din[0] == 0x00)
		is_sd = 0;
	else
		return -ENODEV;

	for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
		topology[i - 1] = din[i] & 0xf;
	size = i - 1;

	if (ptopology)
		*ptopology = topology;
	if (psize)
		*psize = size;
	if (pis_sd)
		*pis_sd = is_sd;

	return 0;
}

int comphy_update_map(struct comphy_map *serdes_map, int count)
{
	int ret, i, size, sfpindex = -1, swindex = -1;
	const u8 *topology;

	ret = mox_get_topology(&topology, &size, NULL);
	if (ret)
		return ret;

	for (i = 0; i < size; ++i) {
		if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
			sfpindex = i;
		else if ((topology[i] == MOX_MODULE_TOPAZ ||
			  topology[i] == MOX_MODULE_PERIDOT) &&
			 swindex == -1)
			swindex = i;
	}

	if (sfpindex >= 0 && swindex >= 0) {
		if (sfpindex < swindex)
			serdes_map[0].speed = PHY_SPEED_1_25G;
		else
			serdes_map[0].speed = PHY_SPEED_3_125G;
	} else if (sfpindex >= 0) {
		serdes_map[0].speed = PHY_SPEED_1_25G;
	} else if (swindex >= 0) {
		serdes_map[0].speed = PHY_SPEED_3_125G;
	}

	return 0;
}

#define SW_SMI_CMD_R(d, r)	(0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
#define SW_SMI_CMD_W(d, r)	(0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))

static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
{
	bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
	mdelay(5);
	return bus->read(bus, sw, 0, 1);
}

static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
			   u16 val)
{
	bus->write(bus, sw, 0, 1, val);
	bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
	mdelay(5);
}

static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
{
	sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
	return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
}

static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
			 u16 val)
{
	sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
					    | (val & 0x7ff));
}

static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
{
	int i, p;
	struct {
		int port;
		u16 val;
		int wait;
	} regs[] = {
		{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
		{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
		{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
		{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
	};

	for (i = 0; i < 12; ++i) {
		for (p = 0; p < peridot; ++p) {
			sw_led_write(bus, 0x10 + p, regs[i].port, 0,
				     regs[i].val);
			sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
				     regs[i].val);
		}
		if (topaz) {
			sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
				     regs[i].val);
		}

		if (regs[i].wait)
			mdelay(75);
	}
}

static void check_switch_address(struct mii_dev *bus, int addr)
{
	if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
		printf("Check of switch MDIO address failed for 0x%02x\n",
		       addr);
}

static int sfp, pci, topaz, peridot, usb, passpci;
static int sfp_pos, peridot_pos[3];
static int module_count;

static int configure_peridots(struct gpio_desc *reset_gpio)
{
	int i, ret;
	u8 dout[MAX_MOX_MODULES];

	memset(dout, 0, MAX_MOX_MODULES);

	/* set addresses of Peridot modules */
	for (i = 0; i < peridot; ++i)
		dout[module_count - peridot_pos[i]] = (~i) & 3;

	/*
	 * if there is a SFP module connected to the last Peridot module, set
	 * the P10_SMODE to 1 for the Peridot module
	 */
	if (sfp)
		dout[module_count - peridot_pos[i - 1]] |= 1 << 3;

	dm_gpio_set_value(reset_gpio, 1);
	mdelay(10);

	ret = mox_do_spi(NULL, dout, module_count + 1);

	mdelay(10);
	dm_gpio_set_value(reset_gpio, 0);

	mdelay(50);

	return ret;
}

static int get_reset_gpio(struct gpio_desc *reset_gpio)
{
	int node;

	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
	if (node < 0) {
		printf("Cannot find Moxtet bus device node!\n");
		return -1;
	}

	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
				   reset_gpio, GPIOD_IS_OUT);

	if (!dm_gpio_is_valid(reset_gpio)) {
		printf("Cannot find reset GPIO for Moxtet bus!\n");
		return -1;
	}

	return 0;
}

int misc_init_r(void)
{
	int ret;
	u8 mac1[6], mac2[6];

	ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
	if (ret < 0) {
		printf("Cannot read data from OTP!\n");
		return 0;
	}

	if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
		eth_env_set_enetaddr("ethaddr", mac1);

	if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
		eth_env_set_enetaddr("eth1addr", mac2);

	return 0;
}

static void mox_print_info(void)
{
	int ret, board_version, ram_size;
	u64 serial_number;
	const char *pub_key;

	ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
				     &ram_size);
	if (ret < 0)
		return;

	printf("Turris Mox:\n");
	printf("  Board version: %i\n", board_version);
	printf("  RAM size: %i MiB\n", ram_size);
	printf("  Serial Number: %016llX\n", serial_number);

	pub_key = mox_sp_get_ecdsa_public_key();
	if (pub_key)
		printf("  ECDSA Public Key: %s\n", pub_key);
	else
		printf("Cannot read ECDSA Public Key\n");
}

int last_stage_init(void)
{
	int ret, i;
	const u8 *topology;
	int is_sd;
	struct mii_dev *bus;
	struct gpio_desc reset_gpio = {};

	mox_print_info();

	ret = mox_get_topology(&topology, &module_count, &is_sd);
	if (ret) {
		printf("Cannot read module topology!\n");
		return 0;
	}

	printf("  SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");

	if (module_count)
		printf("Module Topology:\n");

	for (i = 0; i < module_count; ++i) {
		switch (topology[i]) {
		case MOX_MODULE_SFP:
			printf("% 4i: SFP Module\n", i + 1);
			break;
		case MOX_MODULE_PCI:
			printf("% 4i: Mini-PCIe Module\n", i + 1);
			break;
		case MOX_MODULE_TOPAZ:
			printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
			break;
		case MOX_MODULE_PERIDOT:
			printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
			break;
		case MOX_MODULE_USB3:
			printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
			break;
		case MOX_MODULE_PASSPCI:
			printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
			break;
		default:
			printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
		}
	}

	/* now check if modules are connected in supported mode */

	for (i = 0; i < module_count; ++i) {
		switch (topology[i]) {
		case MOX_MODULE_SFP:
			if (sfp) {
				printf("Error: Only one SFP module is supported!\n");
			} else if (topaz) {
				printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
			} else {
				sfp_pos = i;
				++sfp;
			}
			break;
		case MOX_MODULE_PCI:
			if (pci)
				printf("Error: Only one Mini-PCIe module is supported!\n");
			else if (usb)
				printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
			else if (i && (i != 1 || !passpci))
				printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
			else
				++pci;
			break;
		case MOX_MODULE_TOPAZ:
			if (topaz)
				printf("Error: Only one Topaz module is supported!\n");
			else if (peridot >= 3)
				printf("Error: At most two Peridot modules can come before Topaz module!\n");
			else
				++topaz;
			break;
		case MOX_MODULE_PERIDOT:
			if (sfp || topaz) {
				printf("Error: Peridot module must come before SFP or Topaz module!\n");
			} else if (peridot >= 3) {
				printf("Error: At most three Peridot modules are supported!\n");
			} else {
				peridot_pos[peridot] = i;
				++peridot;
			}
			break;
		case MOX_MODULE_USB3:
			if (pci)
				printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
			else if (usb)
				printf("Error: Only one USB 3.0 module is supported!\n");
			else if (i && (i != 1 || !passpci))
				printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
			else
				++usb;
			break;
		case MOX_MODULE_PASSPCI:
			if (passpci)
				printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
			else if (i != 0)
				printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
			else
				++passpci;
		}
	}

	/* now configure modules */

	if (get_reset_gpio(&reset_gpio) < 0)
		return 0;

	if (peridot > 0) {
		if (configure_peridots(&reset_gpio) < 0) {
			printf("Cannot configure Peridot modules!\n");
			peridot = 0;
		}
	} else {
		dm_gpio_set_value(&reset_gpio, 1);
		mdelay(50);
		dm_gpio_set_value(&reset_gpio, 0);
		mdelay(50);
	}

	if (peridot || topaz) {
		/*
		 * now check if the addresses are set by reading Scratch & Misc
		 * register 0x70 of Peridot (and potentially Topaz) modules
		 */

		bus = miiphy_get_dev_by_name("neta@30000");
		if (!bus) {
			printf("Cannot get MDIO bus device!\n");
		} else {
			for (i = 0; i < peridot; ++i)
				check_switch_address(bus, 0x10 + i);

			if (topaz)
				check_switch_address(bus, 0x2);

			sw_blink_leds(bus, peridot, topaz);
		}
	}

	printf("\n");

	return 0;
}

#if defined(CONFIG_OF_BOARD_SETUP)

static int vnode_by_path(void *blob, const char *fmt, va_list ap)
{
	char path[128];

	vsnprintf(path, 128, fmt, ap);
	return fdt_path_offset(blob, path);
}

static int node_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int res;

	va_start(ap, fmt);
	res = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	return res;
}

static int phandle_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int node, phandle, res;

	va_start(ap, fmt);
	node = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	if (node < 0)
		return node;

	phandle = fdt_get_phandle(blob, node);
	if (phandle > 0)
		return phandle;

	phandle = fdt_get_max_phandle(blob);
	if (phandle < 0)
		return phandle;

	phandle += 1;

	res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
	if (res < 0)
		return res;

	res = fdt_setprop_u32(blob, node, "phandle", phandle);
	if (res < 0)
		return res;

	return phandle;
}

static int enable_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int node;

	va_start(ap, fmt);
	node = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	if (node < 0)
		return node;

	return fdt_setprop_string(blob, node, "status", "okay");
}

static bool is_topaz(int id)
{
	return topaz && id == peridot + topaz - 1;
}

static int switch_addr(int id)
{
	return is_topaz(id) ? 0x2 : 0x10 + id;
}

static int setup_switch(void *blob, int id)
{
	int res, addr, i, node, phandle;

	addr = switch_addr(id);

	/* first enable the switch by setting status = "okay" */
	res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
	if (res < 0)
		return res;

	/*
	 * now if there are more switches or a SFP module coming after,
	 * enable corresponding ports
	 */
	if (id < peridot + topaz - 1) {
		res = enable_by_path(blob,
				     MDIO_PATH "/switch%i@%x/ports/port@a",
				     id, addr);
	} else if (id == peridot - 1 && !topaz && sfp) {
		res = enable_by_path(blob,
				     MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
				     id, addr);
	} else {
		res = 0;
	}
	if (res < 0)
		return res;

	if (id >= peridot + topaz - 1)
		return 0;

	/* finally change link property if needed */
	node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
			    addr);
	if (node < 0)
		return node;

	for (i = id + 1; i < peridot + topaz; ++i) {
		phandle = phandle_by_path(blob,
					  MDIO_PATH "/switch%i@%x/ports/port@%x",
					  i, switch_addr(i),
					  is_topaz(i) ? 5 : 9);
		if (phandle < 0)
			return phandle;

		if (i == id + 1)
			res = fdt_setprop_u32(blob, node, "link", phandle);
		else
			res = fdt_appendprop_u32(blob, node, "link", phandle);
		if (res < 0)
			return res;
	}

	return 0;
}

static int remove_disabled_nodes(void *blob)
{
	while (1) {
		int res, offset;

		offset = fdt_node_offset_by_prop_value(blob, -1, "status",
						       "disabled", 9);
		if (offset < 0)
			break;

		res = fdt_del_node(blob, offset);
		if (res < 0)
			return res;
	}

	return 0;
}

int ft_board_setup(void *blob, struct bd_info *bd)
{
	int node, phandle, res;

	/*
	 * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
	 * connected, enable the PCIe node.
	 */
	if (pci || usb || passpci) {
		node = fdt_path_offset(blob, PCIE_PATH);
		if (node < 0)
			return node;

		res = fdt_setprop_string(blob, node, "status", "okay");
		if (res < 0)
			return res;

		/* Fix PCIe regions for devices with 4 GB RAM */
		res = a3700_fdt_fix_pcie_regions(blob);
		if (res < 0)
			return res;
	}

	/*
	 * If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
	 * enable the eth1 node and setup the switches.
	 */
	if (peridot || topaz) {
		int i;

		res = enable_by_path(blob, ETH1_PATH);
		if (res < 0)
			return res;

		for (i = 0; i < peridot + topaz; ++i) {
			res = setup_switch(blob, i);
			if (res < 0)
				return res;
		}
	}

	/*
	 * If MOX D (SFP cage module) is connected, enable the SFP node and eth1
	 * node. If there is no Peridot switch between MOX A and MOX D, add link
	 * to the SFP node to eth1 node.
	 * Also enable and configure SFP GPIO controller node.
	 */
	if (sfp) {
		res = enable_by_path(blob, SFP_PATH);
		if (res < 0)
			return res;

		res = enable_by_path(blob, ETH1_PATH);
		if (res < 0)
			return res;

		if (!peridot) {
			phandle = phandle_by_path(blob, SFP_PATH);
			if (phandle < 0)
				return res;

			node = node_by_path(blob, ETH1_PATH);
			if (node < 0)
				return node;

			res = fdt_setprop_u32(blob, node, "sfp", phandle);
			if (res < 0)
				return res;

			res = fdt_setprop_string(blob, node, "phy-mode",
						 "sgmii");
			if (res < 0)
				return res;
		}

		res = enable_by_path(blob, SFP_GPIO_PATH);
		if (res < 0)
			return res;

		if (sfp_pos) {
			char newname[16];

			/* moxtet-sfp is on non-zero position, change default */
			node = node_by_path(blob, SFP_GPIO_PATH);
			if (node < 0)
				return node;

			res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
			if (res < 0)
				return res;

			sprintf(newname, "gpio@%x", sfp_pos);

			res = fdt_set_name(blob, node, newname);
			if (res < 0)
				return res;
		}
	}

	fdt_fixup_ethernet(blob);

	/* Finally remove disabled nodes, as per Rob Herring's request. */
	remove_disabled_nodes(blob);

	return 0;
}

#endif
Commit	Line	Data
80af1a9e MB	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Copyright (C) 2018 Marek Behun <[email protected]>
	4	*/
	5
	6	#include <common.h>
c64ac3b3	7	#include <asm/arch/cpu.h>
96578410	8	#include <asm/arch/soc.h>
90526e9f	9	#include <net.h>
863949e3	10	#include <asm/io.h>
c8a185a8	11	#include <asm/gpio.h>
80af1a9e	12	#include <clk.h>
c8a185a8	13	#include <dm.h>
9fb625ce	14	#include <env.h>
863949e3	15	#include <fdt_support.h>
c8a185a8	16	#include <init.h>
c05ed00a	17	#include <linux/delay.h>
c8a185a8 MB	18	#include <linux/libfdt.h>
	19	#include <linux/string.h>
	20	#include <miiphy.h>
	21	#include <mvebu/comphy.h>
	22	#include <spi.h>
80af1a9e	23
c87b8700 MB	24	#include "mox_sp.h"
c87b8700 MB	25
863949e3 MB	26	#define MAX_MOX_MODULES 10
	27
	28	#define MOX_MODULE_SFP 0x1
	29	#define MOX_MODULE_PCI 0x2
	30	#define MOX_MODULE_TOPAZ 0x3
	31	#define MOX_MODULE_PERIDOT 0x4
	32	#define MOX_MODULE_USB3 0x5
	33	#define MOX_MODULE_PASSPCI 0x6
	34
96578410 MB	35	#define ARMADA_37XX_NB_GPIO_SEL (MVEBU_REGISTER(0x13830))
	36	#define ARMADA_37XX_SPI_CTRL (MVEBU_REGISTER(0x10600))
	37	#define ARMADA_37XX_SPI_CFG (MVEBU_REGISTER(0x10604))
	38	#define ARMADA_37XX_SPI_DOUT (MVEBU_REGISTER(0x10608))
	39	#define ARMADA_37XX_SPI_DIN (MVEBU_REGISTER(0x1060c))
863949e3	40
2b3f2dd1 MB	41	#define ETH1_PATH "/soc/internal-regs@d0000000/ethernet@40000"
	42	#define MDIO_PATH "/soc/internal-regs@d0000000/mdio@32004"
	43	#define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
863949e3	44	#define PCIE_PATH "/soc/pcie@d0070000"
2b3f2dd1	45	#define SFP_PATH "/sfp"
863949e3	46
80af1a9e MB	47	DECLARE_GLOBAL_DATA_PTR;
80af1a9e MB	48
863949e3 MB	49	#if defined(CONFIG_OF_BOARD_FIXUP)
	50	int board_fix_fdt(void *blob)
	51	{
	52	u8 topology[MAX_MOX_MODULES];
	53	int i, size, node;
	54	bool enable;
	55
	56	/*
	57	* SPI driver is not loaded in driver model yet, but we have to find out
	58	* if pcie should be enabled in U-Boot's device tree. Therefore we have
	59	* to read SPI by reading/writing SPI registers directly
	60	*/
	61
863949e3	62	writel(0x10df, ARMADA_37XX_SPI_CFG);
b80ca817 MB	63	/* put pin from GPIO to SPI mode */
	64	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
	65	/* enable SPI CS1 */
	66	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
863949e3 MB	67
	68	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
	69	udelay(1);
	70
	71	for (i = 0; i < MAX_MOX_MODULES; ++i) {
	72	writel(0x0, ARMADA_37XX_SPI_DOUT);
	73
	74	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
	75	udelay(1);
	76
	77	topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
	78	if (topology[i] == 0xff)
	79	break;
	80
	81	topology[i] &= 0xf;
	82	}
	83
	84	size = i;
	85
b80ca817 MB	86	/* disable SPI CS1 */
b80ca817 MB	87	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
863949e3 MB	88
	89	if (size > 1 && (topology[1] == MOX_MODULE_PCI \|\|
	90	topology[1] == MOX_MODULE_USB3 \|\|
	91	topology[1] == MOX_MODULE_PASSPCI))
	92	enable = true;
	93	else
	94	enable = false;
	95
	96	node = fdt_path_offset(blob, PCIE_PATH);
	97
	98	if (node < 0) {
	99	printf("Cannot find PCIe node in U-Boot's device tree!\n");
	100	return 0;
	101	}
	102
	103	if (fdt_setprop_string(blob, node, "status",
	104	enable ? "okay" : "disabled") < 0) {
	105	printf("Cannot %s PCIe in U-Boot's device tree!\n",
	106	enable ? "enable" : "disable");
	107	return 0;
	108	}
	109
c64ac3b3 MB	110	if (a3700_fdt_fix_pcie_regions(blob) < 0) {
	111	printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
	112	return 0;
	113	}
	114
863949e3 MB	115	return 0;
	116	}
	117	#endif
	118
80af1a9e MB	119	int board_init(void)
	120	{
	121	/* address of boot parameters */
	122	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
	123
80af1a9e MB	124	return 0;
	125	}
	126
296c64ea	127	static int mox_do_spi(u8 in, u8 out, size_t size)
80af1a9e MB	128	{
	129	struct spi_slave *slave;
	130	struct udevice *dev;
296c64ea	131	int ret;
80af1a9e	132
296c64ea MB	133	ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA \| SPI_CPOL,
	134	"spi_generic_drv", "moxtet@1", &dev,
	135	&slave);
80af1a9e MB	136	if (ret)
	137	goto fail;
	138
	139	ret = spi_claim_bus(slave);
	140	if (ret)
	141	goto fail_free;
	142
296c64ea MB	143	ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
	144
	145	spi_release_bus(slave);
	146	fail_free:
	147	spi_free_slave(slave);
	148	fail:
	149	return ret;
	150	}
	151
	152	static int mox_get_topology(const u8 *ptopology, int psize, int *pis_sd)
	153	{
	154	static int is_sd;
	155	static u8 topology[MAX_MOX_MODULES - 1];
	156	static int size;
	157	u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
	158	int ret, i;
80af1a9e	159
296c64ea MB	160	if (size) {
	161	if (ptopology)
	162	*ptopology = topology;
	163	if (psize)
	164	*psize = size;
	165	if (pis_sd)
	166	*pis_sd = is_sd;
	167	return 0;
	168	}
	169
	170	memset(din, 0, MAX_MOX_MODULES);
	171	memset(dout, 0, MAX_MOX_MODULES);
	172
	173	ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
80af1a9e	174	if (ret)
296c64ea MB	175	return ret;
	176
	177	if (din[0] == 0x10)
	178	is_sd = 1;
	179	else if (din[0] == 0x00)
	180	is_sd = 0;
	181	else
	182	return -ENODEV;
	183
	184	for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
	185	topology[i - 1] = din[i] & 0xf;
	186	size = i - 1;
	187
	188	if (ptopology)
	189	*ptopology = topology;
	190	if (psize)
	191	*psize = size;
	192	if (pis_sd)
	193	*pis_sd = is_sd;
	194
9433cd11 MB	195	return 0;
	196	}
	197
	198	int comphy_update_map(struct comphy_map *serdes_map, int count)
	199	{
	200	int ret, i, size, sfpindex = -1, swindex = -1;
	201	const u8 *topology;
	202
	203	ret = mox_get_topology(&topology, &size, NULL);
	204	if (ret)
	205	return ret;
	206
	207	for (i = 0; i < size; ++i) {
	208	if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
	209	sfpindex = i;
	210	else if ((topology[i] == MOX_MODULE_TOPAZ \|\|
	211	topology[i] == MOX_MODULE_PERIDOT) &&
	212	swindex == -1)
	213	swindex = i;
	214	}
	215
	216	if (sfpindex >= 0 && swindex >= 0) {
	217	if (sfpindex < swindex)
	218	serdes_map[0].speed = PHY_SPEED_1_25G;
	219	else
	220	serdes_map[0].speed = PHY_SPEED_3_125G;
	221	} else if (sfpindex >= 0) {
	222	serdes_map[0].speed = PHY_SPEED_1_25G;
	223	} else if (swindex >= 0) {
	224	serdes_map[0].speed = PHY_SPEED_3_125G;
	225	}
	226
296c64ea MB	227	return 0;
296c64ea MB	228	}
80af1a9e	229
7dd7c2e7 MB	230	#define SW_SMI_CMD_R(d, r) (0x9800 \| (((d) & 0x1f) << 5) \| ((r) & 0x1f))
	231	#define SW_SMI_CMD_W(d, r) (0x9400 \| (((d) & 0x1f) << 5) \| ((r) & 0x1f))
	232
	233	static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
	234	{
	235	bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
	236	mdelay(5);
	237	return bus->read(bus, sw, 0, 1);
	238	}
	239
	240	static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
	241	u16 val)
	242	{
	243	bus->write(bus, sw, 0, 1, val);
	244	bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
	245	mdelay(5);
	246	}
	247
	248	static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
	249	{
	250	sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
	251	return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
	252	}
	253
	254	static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
	255	u16 val)
	256	{
	257	sw_multi_write(bus, sw, port, 0x16, 0x8000 \| ((reg & 7) << 12)
	258	\| (val & 0x7ff));
	259	}
	260
	261	static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
	262	{
	263	int i, p;
	264	struct {
	265	int port;
	266	u16 val;
	267	int wait;
	268	} regs[] = {
	269	{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
	270	{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
	271	{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
	272	{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
	273	};
	274
	275	for (i = 0; i < 12; ++i) {
	276	for (p = 0; p < peridot; ++p) {
	277	sw_led_write(bus, 0x10 + p, regs[i].port, 0,
	278	regs[i].val);
	279	sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
	280	regs[i].val);
	281	}
	282	if (topaz) {
	283	sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
	284	regs[i].val);
	285	}
	286
	287	if (regs[i].wait)
	288	mdelay(75);
	289	}
	290	}
	291
	292	static void check_switch_address(struct mii_dev *bus, int addr)
	293	{
294	if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
295	printf("Check of switch MDIO address failed for 0x%02x\n",
296	addr);
297	}
298
299	static int sfp, pci, topaz, peridot, usb, passpci;
300	static int sfp_pos, peridot_pos[3];
301	static int module_count;
302
303	static int configure_peridots(struct gpio_desc *reset_gpio)
304	{
305	int i, ret;
306	u8 dout[MAX_MOX_MODULES];
307
308	memset(dout, 0, MAX_MOX_MODULES);
309
310	/* set addresses of Peridot modules */
311	for (i = 0; i < peridot; ++i)
312	dout[module_count - peridot_pos[i]] = (~i) & 3;
313
314	/*
315	* if there is a SFP module connected to the last Peridot module, set
316	* the P10_SMODE to 1 for the Peridot module
317	*/
318	if (sfp)
319	dout[module_count - peridot_pos[i - 1]] \|= 1 << 3;
320
321	dm_gpio_set_value(reset_gpio, 1);
322	mdelay(10);
323
324	ret = mox_do_spi(NULL, dout, module_count + 1);
325
326	mdelay(10);
327	dm_gpio_set_value(reset_gpio, 0);
328
329	mdelay(50);
330
331	return ret;
332	}
333
334	static int get_reset_gpio(struct gpio_desc *reset_gpio)
335	{
336	int node;
337
338	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
339	if (node < 0) {
340	printf("Cannot find Moxtet bus device node!\n");
341	return -1;
342	}
343
344	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
345	reset_gpio, GPIOD_IS_OUT);
346
347	if (!dm_gpio_is_valid(reset_gpio)) {
348	printf("Cannot find reset GPIO for Moxtet bus!\n");
349	return -1;
350	}
351
352	return 0;
353	}
354
c87b8700 MB	355	int misc_init_r(void)
	356	{
	357	int ret;
	358	u8 mac1[6], mac2[6];
	359
	360	ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
	361	if (ret < 0) {
	362	printf("Cannot read data from OTP!\n");
	363	return 0;
	364	}
	365
	366	if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
	367	eth_env_set_enetaddr("ethaddr", mac1);
	368
	369	if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
	370	eth_env_set_enetaddr("eth1addr", mac2);
	371
	372	return 0;
	373	}
	374
	375	static void mox_print_info(void)
	376	{
	377	int ret, board_version, ram_size;
	378	u64 serial_number;
	379	const char *pub_key;
	380
	381	ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
	382	&ram_size);
	383	if (ret < 0)
	384	return;
	385
	386	printf("Turris Mox:\n");
	387	printf(" Board version: %i\n", board_version);
	388	printf(" RAM size: %i MiB\n", ram_size);
	389	printf(" Serial Number: %016llX\n", serial_number);
	390
	391	pub_key = mox_sp_get_ecdsa_public_key();
	392	if (pub_key)
	393	printf(" ECDSA Public Key: %s\n", pub_key);
	394	else
	395	printf("Cannot read ECDSA Public Key\n");
	396	}
	397
296c64ea MB	398	int last_stage_init(void)
	399	{
	400	int ret, i;
	401	const u8 *topology;
7dd7c2e7 MB	402	int is_sd;
	403	struct mii_dev *bus;
	404	struct gpio_desc reset_gpio = {};
296c64ea	405
c87b8700 MB	406	mox_print_info();
c87b8700 MB	407
296c64ea MB	408	ret = mox_get_topology(&topology, &module_count, &is_sd);
	409	if (ret) {
	410	printf("Cannot read module topology!\n");
	411	return 0;
	412	}
80af1a9e	413
c87b8700 MB	414	printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
	415
	416	if (module_count)
	417	printf("Module Topology:\n");
	418
296c64ea MB	419	for (i = 0; i < module_count; ++i) {
	420	switch (topology[i]) {
	421	case MOX_MODULE_SFP:
	422	printf("% 4i: SFP Module\n", i + 1);
	423	break;
	424	case MOX_MODULE_PCI:
	425	printf("% 4i: Mini-PCIe Module\n", i + 1);
	426	break;
	427	case MOX_MODULE_TOPAZ:
	428	printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
80af1a9e	429	break;
296c64ea MB	430	case MOX_MODULE_PERIDOT:
296c64ea MB	431	printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
80af1a9e	432	break;
296c64ea MB	433	case MOX_MODULE_USB3:
	434	printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
	435	break;
	436	case MOX_MODULE_PASSPCI:
	437	printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
80af1a9e MB	438	break;
80af1a9e MB	439	default:
296c64ea	440	printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
80af1a9e MB	441	}
80af1a9e MB	442	}
80af1a9e	443
7dd7c2e7 MB	444	/* now check if modules are connected in supported mode */
	445
	446	for (i = 0; i < module_count; ++i) {
	447	switch (topology[i]) {
	448	case MOX_MODULE_SFP:
	449	if (sfp) {
	450	printf("Error: Only one SFP module is supported!\n");
	451	} else if (topaz) {
	452	printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
	453	} else {
	454	sfp_pos = i;
	455	++sfp;
	456	}
	457	break;
	458	case MOX_MODULE_PCI:
2b3f2dd1	459	if (pci)
7dd7c2e7	460	printf("Error: Only one Mini-PCIe module is supported!\n");
2b3f2dd1	461	else if (usb)
7dd7c2e7	462	printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
2b3f2dd1	463	else if (i && (i != 1 \|\| !passpci))
7dd7c2e7	464	printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
2b3f2dd1	465	else
7dd7c2e7	466	++pci;
7dd7c2e7 MB	467	break;
7dd7c2e7 MB	468	case MOX_MODULE_TOPAZ:
2b3f2dd1	469	if (topaz)
7dd7c2e7	470	printf("Error: Only one Topaz module is supported!\n");
2b3f2dd1	471	else if (peridot >= 3)
7dd7c2e7	472	printf("Error: At most two Peridot modules can come before Topaz module!\n");
2b3f2dd1	473	else
7dd7c2e7	474	++topaz;
7dd7c2e7 MB	475	break;
	476	case MOX_MODULE_PERIDOT:
	477	if (sfp \|\| topaz) {
	478	printf("Error: Peridot module must come before SFP or Topaz module!\n");
	479	} else if (peridot >= 3) {
	480	printf("Error: At most three Peridot modules are supported!\n");
	481	} else {
	482	peridot_pos[peridot] = i;
	483	++peridot;
	484	}
	485	break;
	486	case MOX_MODULE_USB3:
2b3f2dd1	487	if (pci)
7dd7c2e7	488	printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
2b3f2dd1	489	else if (usb)
7dd7c2e7	490	printf("Error: Only one USB 3.0 module is supported!\n");
2b3f2dd1	491	else if (i && (i != 1 \|\| !passpci))
7dd7c2e7	492	printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
2b3f2dd1	493	else
7dd7c2e7	494	++usb;
7dd7c2e7 MB	495	break;
7dd7c2e7 MB	496	case MOX_MODULE_PASSPCI:
2b3f2dd1	497	if (passpci)
7dd7c2e7	498	printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
2b3f2dd1	499	else if (i != 0)
7dd7c2e7	500	printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
2b3f2dd1	501	else
7dd7c2e7	502	++passpci;
7dd7c2e7 MB	503	}
	504	}
	505
	506	/* now configure modules */
	507
	508	if (get_reset_gpio(&reset_gpio) < 0)
	509	return 0;
	510
	511	if (peridot > 0) {
	512	if (configure_peridots(&reset_gpio) < 0) {
	513	printf("Cannot configure Peridot modules!\n");
	514	peridot = 0;
	515	}
	516	} else {
	517	dm_gpio_set_value(&reset_gpio, 1);
	518	mdelay(50);
	519	dm_gpio_set_value(&reset_gpio, 0);
	520	mdelay(50);
	521	}
	522
	523	if (peridot \|\| topaz) {
	524	/*
	525	* now check if the addresses are set by reading Scratch & Misc
	526	* register 0x70 of Peridot (and potentially Topaz) modules
	527	*/
	528
	529	bus = miiphy_get_dev_by_name("neta@30000");
	530	if (!bus) {
	531	printf("Cannot get MDIO bus device!\n");
	532	} else {
	533	for (i = 0; i < peridot; ++i)
	534	check_switch_address(bus, 0x10 + i);
	535
	536	if (topaz)
	537	check_switch_address(bus, 0x2);
	538
	539	sw_blink_leds(bus, peridot, topaz);
	540	}
	541	}
	542
296c64ea	543	printf("\n");
80af1a9e	544
296c64ea	545	return 0;
80af1a9e	546	}
2b3f2dd1 MB	547
	548	#if defined(CONFIG_OF_BOARD_SETUP)
	549
	550	static int vnode_by_path(void blob, const char fmt, va_list ap)
	551	{
	552	char path[128];
	553
	554	vsnprintf(path, 128, fmt, ap);
	555	return fdt_path_offset(blob, path);
	556	}
	557
	558	static int node_by_path(void blob, const char fmt, ...)
	559	{
	560	va_list ap;
	561	int res;
	562
	563	va_start(ap, fmt);
	564	res = vnode_by_path(blob, fmt, ap);
	565	va_end(ap);
	566
	567	return res;
	568	}
	569
	570	static int phandle_by_path(void blob, const char fmt, ...)
	571	{
	572	va_list ap;
	573	int node, phandle, res;
	574
	575	va_start(ap, fmt);
	576	node = vnode_by_path(blob, fmt, ap);
	577	va_end(ap);
	578
	579	if (node < 0)
	580	return node;
	581
	582	phandle = fdt_get_phandle(blob, node);
	583	if (phandle > 0)
	584	return phandle;
	585
	586	phandle = fdt_get_max_phandle(blob);
	587	if (phandle < 0)
	588	return phandle;
	589
	590	phandle += 1;
	591
	592	res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
	593	if (res < 0)
	594	return res;
	595
	596	res = fdt_setprop_u32(blob, node, "phandle", phandle);
	597	if (res < 0)
	598	return res;
	599
	600	return phandle;
	601	}
	602
	603	static int enable_by_path(void blob, const char fmt, ...)
	604	{
	605	va_list ap;
	606	int node;
	607
	608	va_start(ap, fmt);
	609	node = vnode_by_path(blob, fmt, ap);
	610	va_end(ap);
611
612	if (node < 0)
613	return node;
614
615	return fdt_setprop_string(blob, node, "status", "okay");
616	}
617
618	static bool is_topaz(int id)
619	{
620	return topaz && id == peridot + topaz - 1;
621	}
622
623	static int switch_addr(int id)
624	{
625	return is_topaz(id) ? 0x2 : 0x10 + id;
626	}
627
628	static int setup_switch(void *blob, int id)
629	{
630	int res, addr, i, node, phandle;
631
632	addr = switch_addr(id);
633
634	/* first enable the switch by setting status = "okay" */
635	res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
636	if (res < 0)
637	return res;
638
639	/*
640	* now if there are more switches or a SFP module coming after,
641	* enable corresponding ports
642	*/
643	if (id < peridot + topaz - 1) {
644	res = enable_by_path(blob,
645	MDIO_PATH "/switch%i@%x/ports/port@a",
646	id, addr);
647	} else if (id == peridot - 1 && !topaz && sfp) {
648	res = enable_by_path(blob,
649	MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
650	id, addr);
651	} else {
652	res = 0;
653	}
654	if (res < 0)
655	return res;
656
657	if (id >= peridot + topaz - 1)
658	return 0;
659
660	/* finally change link property if needed */
661	node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
662	addr);
663	if (node < 0)
664	return node;
665
666	for (i = id + 1; i < peridot + topaz; ++i) {
667	phandle = phandle_by_path(blob,
668	MDIO_PATH "/switch%i@%x/ports/port@%x",
669	i, switch_addr(i),
670	is_topaz(i) ? 5 : 9);
671	if (phandle < 0)
672	return phandle;
673
674	if (i == id + 1)
675	res = fdt_setprop_u32(blob, node, "link", phandle);
676	else
677	res = fdt_appendprop_u32(blob, node, "link", phandle);
678	if (res < 0)
679	return res;
680	}
681
682	return 0;
683	}
684
685	static int remove_disabled_nodes(void *blob)
686	{
687	while (1) {
688	int res, offset;
689
690	offset = fdt_node_offset_by_prop_value(blob, -1, "status",
691	"disabled", 9);
692	if (offset < 0)
693	break;
694
695	res = fdt_del_node(blob, offset);
696	if (res < 0)
697	return res;
698	}
699
700	return 0;
701	}
702
b75d8dc5	703	int ft_board_setup(void blob, struct bd_info bd)
2b3f2dd1 MB	704	{
	705	int node, phandle, res;
	706
	707	/*
	708	* If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
	709	* connected, enable the PCIe node.
	710	*/
	711	if (pci \|\| usb \|\| passpci) {
	712	node = fdt_path_offset(blob, PCIE_PATH);
	713	if (node < 0)
	714	return node;
	715
	716	res = fdt_setprop_string(blob, node, "status", "okay");
	717	if (res < 0)
	718	return res;
c64ac3b3 MB	719
	720	/* Fix PCIe regions for devices with 4 GB RAM */
	721	res = a3700_fdt_fix_pcie_regions(blob);
	722	if (res < 0)
	723	return res;
2b3f2dd1 MB	724	}
	725
	726	/*
	727	* If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
	728	* enable the eth1 node and setup the switches.
	729	*/
	730	if (peridot \|\| topaz) {
	731	int i;
	732
	733	res = enable_by_path(blob, ETH1_PATH);
	734	if (res < 0)
	735	return res;
	736
	737	for (i = 0; i < peridot + topaz; ++i) {
	738	res = setup_switch(blob, i);
	739	if (res < 0)
	740	return res;
	741	}
	742	}
	743
	744	/*
	745	* If MOX D (SFP cage module) is connected, enable the SFP node and eth1
	746	* node. If there is no Peridot switch between MOX A and MOX D, add link
	747	* to the SFP node to eth1 node.
	748	* Also enable and configure SFP GPIO controller node.
	749	*/
	750	if (sfp) {
	751	res = enable_by_path(blob, SFP_PATH);
	752	if (res < 0)
	753	return res;
	754
	755	res = enable_by_path(blob, ETH1_PATH);
	756	if (res < 0)
	757	return res;
	758
	759	if (!peridot) {
	760	phandle = phandle_by_path(blob, SFP_PATH);
	761	if (phandle < 0)
	762	return res;
	763
	764	node = node_by_path(blob, ETH1_PATH);
	765	if (node < 0)
	766	return node;
	767
	768	res = fdt_setprop_u32(blob, node, "sfp", phandle);
	769	if (res < 0)
	770	return res;
	771
	772	res = fdt_setprop_string(blob, node, "phy-mode",
	773	"sgmii");
	774	if (res < 0)
	775	return res;
	776	}
	777
	778	res = enable_by_path(blob, SFP_GPIO_PATH);
	779	if (res < 0)
	780	return res;
	781
	782	if (sfp_pos) {
	783	char newname[16];
	784
	785	/* moxtet-sfp is on non-zero position, change default */
	786	node = node_by_path(blob, SFP_GPIO_PATH);
	787	if (node < 0)
788	return node;
789
790	res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
791	if (res < 0)
792	return res;
793
794	sprintf(newname, "gpio@%x", sfp_pos);
795
796	res = fdt_set_name(blob, node, newname);
797	if (res < 0)
798	return res;
799	}
800	}
801
802	fdt_fixup_ethernet(blob);
803
804	/* Finally remove disabled nodes, as per Rob Herring's request. */
805	remove_disabled_nodes(blob);
806
807	return 0;
808	}
809
810	#endif