[J-u-boot.git] / board / CZ.NIC / turris_mox / turris_mox.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018 Marek Behun <[email protected]>
 */

#include <common.h>
#include <init.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <dm.h>
#include <clk.h>
#include <env.h>
#include <spi.h>
#include <mvebu/comphy.h>
#include <miiphy.h>
#include <linux/string.h>
#include <linux/libfdt.h>
#include <fdt_support.h>

#include "mox_sp.h"

#define MAX_MOX_MODULES		10

#define MOX_MODULE_SFP		0x1
#define MOX_MODULE_PCI		0x2
#define MOX_MODULE_TOPAZ	0x3
#define MOX_MODULE_PERIDOT	0x4
#define MOX_MODULE_USB3		0x5
#define MOX_MODULE_PASSPCI	0x6

#define ARMADA_37XX_NB_GPIO_SEL	0xd0013830
#define ARMADA_37XX_SPI_CTRL	0xd0010600
#define ARMADA_37XX_SPI_CFG	0xd0010604
#define ARMADA_37XX_SPI_DOUT	0xd0010608
#define ARMADA_37XX_SPI_DIN	0xd001060c

#define ETH1_PATH	"/soc/internal-regs@d0000000/ethernet@40000"
#define MDIO_PATH	"/soc/internal-regs@d0000000/mdio@32004"
#define SFP_GPIO_PATH	"/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
#define PCIE_PATH	"/soc/pcie@d0070000"
#define SFP_PATH	"/sfp"

DECLARE_GLOBAL_DATA_PTR;

int dram_init(void)
{
	gd->ram_base = 0;
	gd->ram_size = (phys_size_t)get_ram_size(0, 0x40000000);

	return 0;
}

int dram_init_banksize(void)
{
	gd->bd->bi_dram[0].start = (phys_addr_t)0;
	gd->bd->bi_dram[0].size = gd->ram_size;

	return 0;
}

#if defined(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
	u8 topology[MAX_MOX_MODULES];
	int i, size, node;
	bool enable;

	/*
	 * SPI driver is not loaded in driver model yet, but we have to find out
	 * if pcie should be enabled in U-Boot's device tree. Therefore we have
	 * to read SPI by reading/writing SPI registers directly
	 */

	writel(0x10df, ARMADA_37XX_SPI_CFG);
	/* put pin from GPIO to SPI mode */
	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
	/* enable SPI CS1 */
	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));

	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
		udelay(1);

	for (i = 0; i < MAX_MOX_MODULES; ++i) {
		writel(0x0, ARMADA_37XX_SPI_DOUT);

		while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
			udelay(1);

		topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
		if (topology[i] == 0xff)
			break;

		topology[i] &= 0xf;
	}

	size = i;

	/* disable SPI CS1 */
	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));

	if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
			 topology[1] == MOX_MODULE_USB3 ||
			 topology[1] == MOX_MODULE_PASSPCI))
		enable = true;
	else
		enable = false;

	node = fdt_path_offset(blob, PCIE_PATH);

	if (node < 0) {
		printf("Cannot find PCIe node in U-Boot's device tree!\n");
		return 0;
	}

	if (fdt_setprop_string(blob, node, "status",
			       enable ? "okay" : "disabled") < 0) {
		printf("Cannot %s PCIe in U-Boot's device tree!\n",
		       enable ? "enable" : "disable");
		return 0;
	}

	return 0;
}
#endif

int board_init(void)
{
	/* address of boot parameters */
	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

	return 0;
}

static int mox_do_spi(u8 *in, u8 *out, size_t size)
{
	struct spi_slave *slave;
	struct udevice *dev;
	int ret;

	ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
				 "spi_generic_drv", "moxtet@1", &dev,
				 &slave);
	if (ret)
		goto fail;

	ret = spi_claim_bus(slave);
	if (ret)
		goto fail_free;

	ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);

	spi_release_bus(slave);
fail_free:
	spi_free_slave(slave);
fail:
	return ret;
}

static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
{
	static int is_sd;
	static u8 topology[MAX_MOX_MODULES - 1];
	static int size;
	u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
	int ret, i;

	if (size) {
		if (ptopology)
			*ptopology = topology;
		if (psize)
			*psize = size;
		if (pis_sd)
			*pis_sd = is_sd;
		return 0;
	}

	memset(din, 0, MAX_MOX_MODULES);
	memset(dout, 0, MAX_MOX_MODULES);

	ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
	if (ret)
		return ret;

	if (din[0] == 0x10)
		is_sd = 1;
	else if (din[0] == 0x00)
		is_sd = 0;
	else
		return -ENODEV;

	for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
		topology[i - 1] = din[i] & 0xf;
	size = i - 1;

	if (ptopology)
		*ptopology = topology;
	if (psize)
		*psize = size;
	if (pis_sd)
		*pis_sd = is_sd;

	return 0;
}

int comphy_update_map(struct comphy_map *serdes_map, int count)
{
	int ret, i, size, sfpindex = -1, swindex = -1;
	const u8 *topology;

	ret = mox_get_topology(&topology, &size, NULL);
	if (ret)
		return ret;

	for (i = 0; i < size; ++i) {
		if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
			sfpindex = i;
		else if ((topology[i] == MOX_MODULE_TOPAZ ||
			  topology[i] == MOX_MODULE_PERIDOT) &&
			 swindex == -1)
			swindex = i;
	}

	if (sfpindex >= 0 && swindex >= 0) {
		if (sfpindex < swindex)
			serdes_map[0].speed = PHY_SPEED_1_25G;
		else
			serdes_map[0].speed = PHY_SPEED_3_125G;
	} else if (sfpindex >= 0) {
		serdes_map[0].speed = PHY_SPEED_1_25G;
	} else if (swindex >= 0) {
		serdes_map[0].speed = PHY_SPEED_3_125G;
	}

	return 0;
}

#define SW_SMI_CMD_R(d, r)	(0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
#define SW_SMI_CMD_W(d, r)	(0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))

static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
{
	bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
	mdelay(5);
	return bus->read(bus, sw, 0, 1);
}

static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
			   u16 val)
{
	bus->write(bus, sw, 0, 1, val);
	bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
	mdelay(5);
}

static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
{
	sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
	return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
}

static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
			 u16 val)
{
	sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
					    | (val & 0x7ff));
}

static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
{
	int i, p;
	struct {
		int port;
		u16 val;
		int wait;
	} regs[] = {
		{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
		{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
		{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
		{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
	};

	for (i = 0; i < 12; ++i) {
		for (p = 0; p < peridot; ++p) {
			sw_led_write(bus, 0x10 + p, regs[i].port, 0,
				     regs[i].val);
			sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
				     regs[i].val);
		}
		if (topaz) {
			sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
				     regs[i].val);
		}

		if (regs[i].wait)
			mdelay(75);
	}
}

static void check_switch_address(struct mii_dev *bus, int addr)
{
	if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
		printf("Check of switch MDIO address failed for 0x%02x\n",
		       addr);
}

static int sfp, pci, topaz, peridot, usb, passpci;
static int sfp_pos, peridot_pos[3];
static int module_count;

static int configure_peridots(struct gpio_desc *reset_gpio)
{
	int i, ret;
	u8 dout[MAX_MOX_MODULES];

	memset(dout, 0, MAX_MOX_MODULES);

	/* set addresses of Peridot modules */
	for (i = 0; i < peridot; ++i)
		dout[module_count - peridot_pos[i]] = (~i) & 3;

	/*
	 * if there is a SFP module connected to the last Peridot module, set
	 * the P10_SMODE to 1 for the Peridot module
	 */
	if (sfp)
		dout[module_count - peridot_pos[i - 1]] |= 1 << 3;

	dm_gpio_set_value(reset_gpio, 1);
	mdelay(10);

	ret = mox_do_spi(NULL, dout, module_count + 1);

	mdelay(10);
	dm_gpio_set_value(reset_gpio, 0);

	mdelay(50);

	return ret;
}

static int get_reset_gpio(struct gpio_desc *reset_gpio)
{
	int node;

	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
	if (node < 0) {
		printf("Cannot find Moxtet bus device node!\n");
		return -1;
	}

	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
				   reset_gpio, GPIOD_IS_OUT);

	if (!dm_gpio_is_valid(reset_gpio)) {
		printf("Cannot find reset GPIO for Moxtet bus!\n");
		return -1;
	}

	return 0;
}

int misc_init_r(void)
{
	int ret;
	u8 mac1[6], mac2[6];

	ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
	if (ret < 0) {
		printf("Cannot read data from OTP!\n");
		return 0;
	}

	if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
		eth_env_set_enetaddr("ethaddr", mac1);

	if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
		eth_env_set_enetaddr("eth1addr", mac2);

	return 0;
}

static void mox_print_info(void)
{
	int ret, board_version, ram_size;
	u64 serial_number;
	const char *pub_key;

	ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
				     &ram_size);
	if (ret < 0)
		return;

	printf("Turris Mox:\n");
	printf("  Board version: %i\n", board_version);
	printf("  RAM size: %i MiB\n", ram_size);
	printf("  Serial Number: %016llX\n", serial_number);

	pub_key = mox_sp_get_ecdsa_public_key();
	if (pub_key)
		printf("  ECDSA Public Key: %s\n", pub_key);
	else
		printf("Cannot read ECDSA Public Key\n");
}

int last_stage_init(void)
{
	int ret, i;
	const u8 *topology;
	int is_sd;
	struct mii_dev *bus;
	struct gpio_desc reset_gpio = {};

	mox_print_info();

	ret = mox_get_topology(&topology, &module_count, &is_sd);
	if (ret) {
		printf("Cannot read module topology!\n");
		return 0;
	}

	printf("  SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");

	if (module_count)
		printf("Module Topology:\n");

	for (i = 0; i < module_count; ++i) {
		switch (topology[i]) {
		case MOX_MODULE_SFP:
			printf("% 4i: SFP Module\n", i + 1);
			break;
		case MOX_MODULE_PCI:
			printf("% 4i: Mini-PCIe Module\n", i + 1);
			break;
		case MOX_MODULE_TOPAZ:
			printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
			break;
		case MOX_MODULE_PERIDOT:
			printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
			break;
		case MOX_MODULE_USB3:
			printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
			break;
		case MOX_MODULE_PASSPCI:
			printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
			break;
		default:
			printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
		}
	}

	/* now check if modules are connected in supported mode */

	for (i = 0; i < module_count; ++i) {
		switch (topology[i]) {
		case MOX_MODULE_SFP:
			if (sfp) {
				printf("Error: Only one SFP module is supported!\n");
			} else if (topaz) {
				printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
			} else {
				sfp_pos = i;
				++sfp;
			}
			break;
		case MOX_MODULE_PCI:
			if (pci)
				printf("Error: Only one Mini-PCIe module is supported!\n");
			else if (usb)
				printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
			else if (i && (i != 1 || !passpci))
				printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
			else
				++pci;
			break;
		case MOX_MODULE_TOPAZ:
			if (topaz)
				printf("Error: Only one Topaz module is supported!\n");
			else if (peridot >= 3)
				printf("Error: At most two Peridot modules can come before Topaz module!\n");
			else
				++topaz;
			break;
		case MOX_MODULE_PERIDOT:
			if (sfp || topaz) {
				printf("Error: Peridot module must come before SFP or Topaz module!\n");
			} else if (peridot >= 3) {
				printf("Error: At most three Peridot modules are supported!\n");
			} else {
				peridot_pos[peridot] = i;
				++peridot;
			}
			break;
		case MOX_MODULE_USB3:
			if (pci)
				printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
			else if (usb)
				printf("Error: Only one USB 3.0 module is supported!\n");
			else if (i && (i != 1 || !passpci))
				printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
			else
				++usb;
			break;
		case MOX_MODULE_PASSPCI:
			if (passpci)
				printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
			else if (i != 0)
				printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
			else
				++passpci;
		}
	}

	/* now configure modules */

	if (get_reset_gpio(&reset_gpio) < 0)
		return 0;

	if (peridot > 0) {
		if (configure_peridots(&reset_gpio) < 0) {
			printf("Cannot configure Peridot modules!\n");
			peridot = 0;
		}
	} else {
		dm_gpio_set_value(&reset_gpio, 1);
		mdelay(50);
		dm_gpio_set_value(&reset_gpio, 0);
		mdelay(50);
	}

	if (peridot || topaz) {
		/*
		 * now check if the addresses are set by reading Scratch & Misc
		 * register 0x70 of Peridot (and potentially Topaz) modules
		 */

		bus = miiphy_get_dev_by_name("neta@30000");
		if (!bus) {
			printf("Cannot get MDIO bus device!\n");
		} else {
			for (i = 0; i < peridot; ++i)
				check_switch_address(bus, 0x10 + i);

			if (topaz)
				check_switch_address(bus, 0x2);

			sw_blink_leds(bus, peridot, topaz);
		}
	}

	printf("\n");

	return 0;
}

#if defined(CONFIG_OF_BOARD_SETUP)

static int vnode_by_path(void *blob, const char *fmt, va_list ap)
{
	char path[128];

	vsnprintf(path, 128, fmt, ap);
	return fdt_path_offset(blob, path);
}

static int node_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int res;

	va_start(ap, fmt);
	res = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	return res;
}

static int phandle_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int node, phandle, res;

	va_start(ap, fmt);
	node = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	if (node < 0)
		return node;

	phandle = fdt_get_phandle(blob, node);
	if (phandle > 0)
		return phandle;

	phandle = fdt_get_max_phandle(blob);
	if (phandle < 0)
		return phandle;

	phandle += 1;

	res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
	if (res < 0)
		return res;

	res = fdt_setprop_u32(blob, node, "phandle", phandle);
	if (res < 0)
		return res;

	return phandle;
}

static int enable_by_path(void *blob, const char *fmt, ...)
{
	va_list ap;
	int node;

	va_start(ap, fmt);
	node = vnode_by_path(blob, fmt, ap);
	va_end(ap);

	if (node < 0)
		return node;

	return fdt_setprop_string(blob, node, "status", "okay");
}

static bool is_topaz(int id)
{
	return topaz && id == peridot + topaz - 1;
}

static int switch_addr(int id)
{
	return is_topaz(id) ? 0x2 : 0x10 + id;
}

static int setup_switch(void *blob, int id)
{
	int res, addr, i, node, phandle;

	addr = switch_addr(id);

	/* first enable the switch by setting status = "okay" */
	res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
	if (res < 0)
		return res;

	/*
	 * now if there are more switches or a SFP module coming after,
	 * enable corresponding ports
	 */
	if (id < peridot + topaz - 1) {
		res = enable_by_path(blob,
				     MDIO_PATH "/switch%i@%x/ports/port@a",
				     id, addr);
	} else if (id == peridot - 1 && !topaz && sfp) {
		res = enable_by_path(blob,
				     MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
				     id, addr);
	} else {
		res = 0;
	}
	if (res < 0)
		return res;

	if (id >= peridot + topaz - 1)
		return 0;

	/* finally change link property if needed */
	node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
			    addr);
	if (node < 0)
		return node;

	for (i = id + 1; i < peridot + topaz; ++i) {
		phandle = phandle_by_path(blob,
					  MDIO_PATH "/switch%i@%x/ports/port@%x",
					  i, switch_addr(i),
					  is_topaz(i) ? 5 : 9);
		if (phandle < 0)
			return phandle;

		if (i == id + 1)
			res = fdt_setprop_u32(blob, node, "link", phandle);
		else
			res = fdt_appendprop_u32(blob, node, "link", phandle);
		if (res < 0)
			return res;
	}

	return 0;
}

static int remove_disabled_nodes(void *blob)
{
	while (1) {
		int res, offset;

		offset = fdt_node_offset_by_prop_value(blob, -1, "status",
						       "disabled", 9);
		if (offset < 0)
			break;

		res = fdt_del_node(blob, offset);
		if (res < 0)
			return res;
	}

	return 0;
}

int ft_board_setup(void *blob, bd_t *bd)
{
	int node, phandle, res;

	/*
	 * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
	 * connected, enable the PCIe node.
	 */
	if (pci || usb || passpci) {
		node = fdt_path_offset(blob, PCIE_PATH);
		if (node < 0)
			return node;

		res = fdt_setprop_string(blob, node, "status", "okay");
		if (res < 0)
			return res;
	}

	/*
	 * If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
	 * enable the eth1 node and setup the switches.
	 */
	if (peridot || topaz) {
		int i;

		res = enable_by_path(blob, ETH1_PATH);
		if (res < 0)
			return res;

		for (i = 0; i < peridot + topaz; ++i) {
			res = setup_switch(blob, i);
			if (res < 0)
				return res;
		}
	}

	/*
	 * If MOX D (SFP cage module) is connected, enable the SFP node and eth1
	 * node. If there is no Peridot switch between MOX A and MOX D, add link
	 * to the SFP node to eth1 node.
	 * Also enable and configure SFP GPIO controller node.
	 */
	if (sfp) {
		res = enable_by_path(blob, SFP_PATH);
		if (res < 0)
			return res;

		res = enable_by_path(blob, ETH1_PATH);
		if (res < 0)
			return res;

		if (!peridot) {
			phandle = phandle_by_path(blob, SFP_PATH);
			if (phandle < 0)
				return res;

			node = node_by_path(blob, ETH1_PATH);
			if (node < 0)
				return node;

			res = fdt_setprop_u32(blob, node, "sfp", phandle);
			if (res < 0)
				return res;

			res = fdt_setprop_string(blob, node, "phy-mode",
						 "sgmii");
			if (res < 0)
				return res;
		}

		res = enable_by_path(blob, SFP_GPIO_PATH);
		if (res < 0)
			return res;

		if (sfp_pos) {
			char newname[16];

			/* moxtet-sfp is on non-zero position, change default */
			node = node_by_path(blob, SFP_GPIO_PATH);
			if (node < 0)
				return node;

			res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
			if (res < 0)
				return res;

			sprintf(newname, "gpio@%x", sfp_pos);

			res = fdt_set_name(blob, node, newname);
			if (res < 0)
				return res;
		}
	}

	fdt_fixup_ethernet(blob);

	/* Finally remove disabled nodes, as per Rob Herring's request. */
	remove_disabled_nodes(blob);

	return 0;
}

#endif
Commit	Line	Data
80af1a9e MB	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* Copyright (C) 2018 Marek Behun <[email protected]>
	4	*/
	5
	6	#include <common.h>
5255932f	7	#include <init.h>
7dd7c2e7	8	#include <asm/gpio.h>
863949e3	9	#include <asm/io.h>
80af1a9e MB	10	#include <dm.h>
80af1a9e MB	11	#include <clk.h>
9fb625ce	12	#include <env.h>
80af1a9e	13	#include <spi.h>
9433cd11	14	#include <mvebu/comphy.h>
7dd7c2e7	15	#include <miiphy.h>
80af1a9e	16	#include <linux/string.h>
863949e3 MB	17	#include <linux/libfdt.h>
863949e3 MB	18	#include <fdt_support.h>
80af1a9e	19
c87b8700 MB	20	#include "mox_sp.h"
c87b8700 MB	21
863949e3 MB	22	#define MAX_MOX_MODULES 10
	23
	24	#define MOX_MODULE_SFP 0x1
	25	#define MOX_MODULE_PCI 0x2
	26	#define MOX_MODULE_TOPAZ 0x3
	27	#define MOX_MODULE_PERIDOT 0x4
	28	#define MOX_MODULE_USB3 0x5
	29	#define MOX_MODULE_PASSPCI 0x6
	30
	31	#define ARMADA_37XX_NB_GPIO_SEL 0xd0013830
	32	#define ARMADA_37XX_SPI_CTRL 0xd0010600
	33	#define ARMADA_37XX_SPI_CFG 0xd0010604
	34	#define ARMADA_37XX_SPI_DOUT 0xd0010608
	35	#define ARMADA_37XX_SPI_DIN 0xd001060c
	36
2b3f2dd1 MB	37	#define ETH1_PATH "/soc/internal-regs@d0000000/ethernet@40000"
	38	#define MDIO_PATH "/soc/internal-regs@d0000000/mdio@32004"
	39	#define SFP_GPIO_PATH "/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
863949e3	40	#define PCIE_PATH "/soc/pcie@d0070000"
2b3f2dd1	41	#define SFP_PATH "/sfp"
863949e3	42
80af1a9e MB	43	DECLARE_GLOBAL_DATA_PTR;
80af1a9e MB	44
3b281aca MB	45	int dram_init(void)
	46	{
	47	gd->ram_base = 0;
	48	gd->ram_size = (phys_size_t)get_ram_size(0, 0x40000000);
	49
	50	return 0;
	51	}
	52
	53	int dram_init_banksize(void)
	54	{
	55	gd->bd->bi_dram[0].start = (phys_addr_t)0;
	56	gd->bd->bi_dram[0].size = gd->ram_size;
	57
	58	return 0;
	59	}
	60
863949e3 MB	61	#if defined(CONFIG_OF_BOARD_FIXUP)
	62	int board_fix_fdt(void *blob)
	63	{
	64	u8 topology[MAX_MOX_MODULES];
	65	int i, size, node;
	66	bool enable;
	67
	68	/*
	69	* SPI driver is not loaded in driver model yet, but we have to find out
	70	* if pcie should be enabled in U-Boot's device tree. Therefore we have
	71	* to read SPI by reading/writing SPI registers directly
	72	*/
	73
863949e3	74	writel(0x10df, ARMADA_37XX_SPI_CFG);
b80ca817 MB	75	/* put pin from GPIO to SPI mode */
	76	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
	77	/* enable SPI CS1 */
	78	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
863949e3 MB	79
	80	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
	81	udelay(1);
	82
	83	for (i = 0; i < MAX_MOX_MODULES; ++i) {
	84	writel(0x0, ARMADA_37XX_SPI_DOUT);
	85
	86	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
	87	udelay(1);
	88
	89	topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
	90	if (topology[i] == 0xff)
	91	break;
	92
	93	topology[i] &= 0xf;
	94	}
	95
	96	size = i;
	97
b80ca817 MB	98	/* disable SPI CS1 */
b80ca817 MB	99	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
863949e3 MB	100
	101	if (size > 1 && (topology[1] == MOX_MODULE_PCI \|\|
	102	topology[1] == MOX_MODULE_USB3 \|\|
	103	topology[1] == MOX_MODULE_PASSPCI))
	104	enable = true;
	105	else
	106	enable = false;
	107
	108	node = fdt_path_offset(blob, PCIE_PATH);
	109
	110	if (node < 0) {
	111	printf("Cannot find PCIe node in U-Boot's device tree!\n");
	112	return 0;
	113	}
	114
	115	if (fdt_setprop_string(blob, node, "status",
	116	enable ? "okay" : "disabled") < 0) {
	117	printf("Cannot %s PCIe in U-Boot's device tree!\n",
	118	enable ? "enable" : "disable");
	119	return 0;
	120	}
	121
	122	return 0;
	123	}
	124	#endif
	125
80af1a9e MB	126	int board_init(void)
	127	{
	128	/* address of boot parameters */
	129	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
	130
80af1a9e MB	131	return 0;
	132	}
	133
296c64ea	134	static int mox_do_spi(u8 in, u8 out, size_t size)
80af1a9e MB	135	{
	136	struct spi_slave *slave;
	137	struct udevice *dev;
296c64ea	138	int ret;
80af1a9e	139
296c64ea MB	140	ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA \| SPI_CPOL,
	141	"spi_generic_drv", "moxtet@1", &dev,
	142	&slave);
80af1a9e MB	143	if (ret)
	144	goto fail;
	145
	146	ret = spi_claim_bus(slave);
	147	if (ret)
	148	goto fail_free;
	149
296c64ea MB	150	ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
	151
	152	spi_release_bus(slave);
	153	fail_free:
	154	spi_free_slave(slave);
	155	fail:
	156	return ret;
	157	}
	158
	159	static int mox_get_topology(const u8 *ptopology, int psize, int *pis_sd)
	160	{
	161	static int is_sd;
	162	static u8 topology[MAX_MOX_MODULES - 1];
	163	static int size;
	164	u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
	165	int ret, i;
80af1a9e	166
296c64ea MB	167	if (size) {
	168	if (ptopology)
	169	*ptopology = topology;
	170	if (psize)
	171	*psize = size;
	172	if (pis_sd)
	173	*pis_sd = is_sd;
	174	return 0;
	175	}
	176
	177	memset(din, 0, MAX_MOX_MODULES);
	178	memset(dout, 0, MAX_MOX_MODULES);
	179
	180	ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
80af1a9e	181	if (ret)
296c64ea MB	182	return ret;
	183
	184	if (din[0] == 0x10)
	185	is_sd = 1;
	186	else if (din[0] == 0x00)
	187	is_sd = 0;
	188	else
	189	return -ENODEV;
	190
	191	for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
	192	topology[i - 1] = din[i] & 0xf;
	193	size = i - 1;
	194
	195	if (ptopology)
	196	*ptopology = topology;
	197	if (psize)
	198	*psize = size;
	199	if (pis_sd)
	200	*pis_sd = is_sd;
	201
9433cd11 MB	202	return 0;
	203	}
	204
	205	int comphy_update_map(struct comphy_map *serdes_map, int count)
	206	{
	207	int ret, i, size, sfpindex = -1, swindex = -1;
	208	const u8 *topology;
	209
	210	ret = mox_get_topology(&topology, &size, NULL);
	211	if (ret)
	212	return ret;
	213
	214	for (i = 0; i < size; ++i) {
	215	if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
	216	sfpindex = i;
	217	else if ((topology[i] == MOX_MODULE_TOPAZ \|\|
	218	topology[i] == MOX_MODULE_PERIDOT) &&
	219	swindex == -1)
	220	swindex = i;
	221	}
	222
	223	if (sfpindex >= 0 && swindex >= 0) {
	224	if (sfpindex < swindex)
	225	serdes_map[0].speed = PHY_SPEED_1_25G;
	226	else
	227	serdes_map[0].speed = PHY_SPEED_3_125G;
	228	} else if (sfpindex >= 0) {
	229	serdes_map[0].speed = PHY_SPEED_1_25G;
	230	} else if (swindex >= 0) {
	231	serdes_map[0].speed = PHY_SPEED_3_125G;
	232	}
	233
296c64ea MB	234	return 0;
296c64ea MB	235	}
80af1a9e	236
7dd7c2e7 MB	237	#define SW_SMI_CMD_R(d, r) (0x9800 \| (((d) & 0x1f) << 5) \| ((r) & 0x1f))
	238	#define SW_SMI_CMD_W(d, r) (0x9400 \| (((d) & 0x1f) << 5) \| ((r) & 0x1f))
	239
	240	static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
	241	{
	242	bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
	243	mdelay(5);
	244	return bus->read(bus, sw, 0, 1);
	245	}
	246
	247	static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
	248	u16 val)
	249	{
	250	bus->write(bus, sw, 0, 1, val);
	251	bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
	252	mdelay(5);
	253	}
	254
	255	static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
	256	{
	257	sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
	258	return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
	259	}
	260
	261	static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
	262	u16 val)
	263	{
	264	sw_multi_write(bus, sw, port, 0x16, 0x8000 \| ((reg & 7) << 12)
	265	\| (val & 0x7ff));
	266	}
	267
	268	static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
	269	{
	270	int i, p;
	271	struct {
	272	int port;
	273	u16 val;
	274	int wait;
	275	} regs[] = {
	276	{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
	277	{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
	278	{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
	279	{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
	280	};
	281
	282	for (i = 0; i < 12; ++i) {
	283	for (p = 0; p < peridot; ++p) {
	284	sw_led_write(bus, 0x10 + p, regs[i].port, 0,
	285	regs[i].val);
	286	sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
	287	regs[i].val);
	288	}
	289	if (topaz) {
	290	sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
	291	regs[i].val);
	292	}
	293
	294	if (regs[i].wait)
	295	mdelay(75);
	296	}
	297	}
	298
	299	static void check_switch_address(struct mii_dev *bus, int addr)
	300	{
301	if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
302	printf("Check of switch MDIO address failed for 0x%02x\n",
303	addr);
304	}
305
306	static int sfp, pci, topaz, peridot, usb, passpci;
307	static int sfp_pos, peridot_pos[3];
308	static int module_count;
309
310	static int configure_peridots(struct gpio_desc *reset_gpio)
311	{
312	int i, ret;
313	u8 dout[MAX_MOX_MODULES];
314
315	memset(dout, 0, MAX_MOX_MODULES);
316
317	/* set addresses of Peridot modules */
318	for (i = 0; i < peridot; ++i)
319	dout[module_count - peridot_pos[i]] = (~i) & 3;
320
321	/*
322	* if there is a SFP module connected to the last Peridot module, set
323	* the P10_SMODE to 1 for the Peridot module
324	*/
325	if (sfp)
326	dout[module_count - peridot_pos[i - 1]] \|= 1 << 3;
327
328	dm_gpio_set_value(reset_gpio, 1);
329	mdelay(10);
330
331	ret = mox_do_spi(NULL, dout, module_count + 1);
332
333	mdelay(10);
334	dm_gpio_set_value(reset_gpio, 0);
335
336	mdelay(50);
337
338	return ret;
339	}
340
341	static int get_reset_gpio(struct gpio_desc *reset_gpio)
342	{
343	int node;
344
345	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
346	if (node < 0) {
347	printf("Cannot find Moxtet bus device node!\n");
348	return -1;
349	}
350
351	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
352	reset_gpio, GPIOD_IS_OUT);
353
354	if (!dm_gpio_is_valid(reset_gpio)) {
355	printf("Cannot find reset GPIO for Moxtet bus!\n");
356	return -1;
357	}
358
359	return 0;
360	}
361
c87b8700 MB	362	int misc_init_r(void)
	363	{
	364	int ret;
	365	u8 mac1[6], mac2[6];
	366
	367	ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
	368	if (ret < 0) {
	369	printf("Cannot read data from OTP!\n");
	370	return 0;
	371	}
	372
	373	if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
	374	eth_env_set_enetaddr("ethaddr", mac1);
	375
	376	if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
	377	eth_env_set_enetaddr("eth1addr", mac2);
	378
	379	return 0;
	380	}
	381
	382	static void mox_print_info(void)
	383	{
	384	int ret, board_version, ram_size;
	385	u64 serial_number;
	386	const char *pub_key;
	387
	388	ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
	389	&ram_size);
	390	if (ret < 0)
	391	return;
	392
	393	printf("Turris Mox:\n");
	394	printf(" Board version: %i\n", board_version);
	395	printf(" RAM size: %i MiB\n", ram_size);
	396	printf(" Serial Number: %016llX\n", serial_number);
	397
	398	pub_key = mox_sp_get_ecdsa_public_key();
	399	if (pub_key)
	400	printf(" ECDSA Public Key: %s\n", pub_key);
	401	else
	402	printf("Cannot read ECDSA Public Key\n");
	403	}
	404
296c64ea MB	405	int last_stage_init(void)
	406	{
	407	int ret, i;
	408	const u8 *topology;
7dd7c2e7 MB	409	int is_sd;
	410	struct mii_dev *bus;
	411	struct gpio_desc reset_gpio = {};
296c64ea	412
c87b8700 MB	413	mox_print_info();
c87b8700 MB	414
296c64ea MB	415	ret = mox_get_topology(&topology, &module_count, &is_sd);
	416	if (ret) {
	417	printf("Cannot read module topology!\n");
	418	return 0;
	419	}
80af1a9e	420
c87b8700 MB	421	printf(" SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
	422
	423	if (module_count)
	424	printf("Module Topology:\n");
	425
296c64ea MB	426	for (i = 0; i < module_count; ++i) {
	427	switch (topology[i]) {
	428	case MOX_MODULE_SFP:
	429	printf("% 4i: SFP Module\n", i + 1);
	430	break;
	431	case MOX_MODULE_PCI:
	432	printf("% 4i: Mini-PCIe Module\n", i + 1);
	433	break;
	434	case MOX_MODULE_TOPAZ:
	435	printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
80af1a9e	436	break;
296c64ea MB	437	case MOX_MODULE_PERIDOT:
296c64ea MB	438	printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
80af1a9e	439	break;
296c64ea MB	440	case MOX_MODULE_USB3:
	441	printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
	442	break;
	443	case MOX_MODULE_PASSPCI:
	444	printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
80af1a9e MB	445	break;
80af1a9e MB	446	default:
296c64ea	447	printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
80af1a9e MB	448	}
80af1a9e MB	449	}
80af1a9e	450
7dd7c2e7 MB	451	/* now check if modules are connected in supported mode */
	452
	453	for (i = 0; i < module_count; ++i) {
	454	switch (topology[i]) {
	455	case MOX_MODULE_SFP:
	456	if (sfp) {
	457	printf("Error: Only one SFP module is supported!\n");
	458	} else if (topaz) {
	459	printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
	460	} else {
	461	sfp_pos = i;
	462	++sfp;
	463	}
	464	break;
	465	case MOX_MODULE_PCI:
2b3f2dd1	466	if (pci)
7dd7c2e7	467	printf("Error: Only one Mini-PCIe module is supported!\n");
2b3f2dd1	468	else if (usb)
7dd7c2e7	469	printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
2b3f2dd1	470	else if (i && (i != 1 \|\| !passpci))
7dd7c2e7	471	printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
2b3f2dd1	472	else
7dd7c2e7	473	++pci;
7dd7c2e7 MB	474	break;
7dd7c2e7 MB	475	case MOX_MODULE_TOPAZ:
2b3f2dd1	476	if (topaz)
7dd7c2e7	477	printf("Error: Only one Topaz module is supported!\n");
2b3f2dd1	478	else if (peridot >= 3)
7dd7c2e7	479	printf("Error: At most two Peridot modules can come before Topaz module!\n");
2b3f2dd1	480	else
7dd7c2e7	481	++topaz;
7dd7c2e7 MB	482	break;
	483	case MOX_MODULE_PERIDOT:
	484	if (sfp \|\| topaz) {
	485	printf("Error: Peridot module must come before SFP or Topaz module!\n");
	486	} else if (peridot >= 3) {
	487	printf("Error: At most three Peridot modules are supported!\n");
	488	} else {
	489	peridot_pos[peridot] = i;
	490	++peridot;
	491	}
	492	break;
	493	case MOX_MODULE_USB3:
2b3f2dd1	494	if (pci)
7dd7c2e7	495	printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
2b3f2dd1	496	else if (usb)
7dd7c2e7	497	printf("Error: Only one USB 3.0 module is supported!\n");
2b3f2dd1	498	else if (i && (i != 1 \|\| !passpci))
7dd7c2e7	499	printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
2b3f2dd1	500	else
7dd7c2e7	501	++usb;
7dd7c2e7 MB	502	break;
7dd7c2e7 MB	503	case MOX_MODULE_PASSPCI:
2b3f2dd1	504	if (passpci)
7dd7c2e7	505	printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
2b3f2dd1	506	else if (i != 0)
7dd7c2e7	507	printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
2b3f2dd1	508	else
7dd7c2e7	509	++passpci;
7dd7c2e7 MB	510	}
	511	}
	512
	513	/* now configure modules */
	514
	515	if (get_reset_gpio(&reset_gpio) < 0)
	516	return 0;
	517
	518	if (peridot > 0) {
	519	if (configure_peridots(&reset_gpio) < 0) {
	520	printf("Cannot configure Peridot modules!\n");
	521	peridot = 0;
	522	}
	523	} else {
	524	dm_gpio_set_value(&reset_gpio, 1);
	525	mdelay(50);
	526	dm_gpio_set_value(&reset_gpio, 0);
	527	mdelay(50);
	528	}
	529
	530	if (peridot \|\| topaz) {
	531	/*
	532	* now check if the addresses are set by reading Scratch & Misc
	533	* register 0x70 of Peridot (and potentially Topaz) modules
	534	*/
	535
	536	bus = miiphy_get_dev_by_name("neta@30000");
	537	if (!bus) {
	538	printf("Cannot get MDIO bus device!\n");
	539	} else {
	540	for (i = 0; i < peridot; ++i)
	541	check_switch_address(bus, 0x10 + i);
	542
	543	if (topaz)
	544	check_switch_address(bus, 0x2);
	545
	546	sw_blink_leds(bus, peridot, topaz);
	547	}
	548	}
	549
296c64ea	550	printf("\n");
80af1a9e	551
296c64ea	552	return 0;
80af1a9e	553	}
2b3f2dd1 MB	554
	555	#if defined(CONFIG_OF_BOARD_SETUP)
	556
	557	static int vnode_by_path(void blob, const char fmt, va_list ap)
	558	{
	559	char path[128];
	560
	561	vsnprintf(path, 128, fmt, ap);
	562	return fdt_path_offset(blob, path);
	563	}
	564
	565	static int node_by_path(void blob, const char fmt, ...)
	566	{
	567	va_list ap;
	568	int res;
	569
	570	va_start(ap, fmt);
	571	res = vnode_by_path(blob, fmt, ap);
	572	va_end(ap);
	573
	574	return res;
	575	}
	576
	577	static int phandle_by_path(void blob, const char fmt, ...)
	578	{
	579	va_list ap;
	580	int node, phandle, res;
	581
	582	va_start(ap, fmt);
	583	node = vnode_by_path(blob, fmt, ap);
	584	va_end(ap);
	585
	586	if (node < 0)
	587	return node;
	588
	589	phandle = fdt_get_phandle(blob, node);
	590	if (phandle > 0)
	591	return phandle;
	592
	593	phandle = fdt_get_max_phandle(blob);
	594	if (phandle < 0)
	595	return phandle;
	596
	597	phandle += 1;
	598
	599	res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
	600	if (res < 0)
	601	return res;
	602
	603	res = fdt_setprop_u32(blob, node, "phandle", phandle);
	604	if (res < 0)
	605	return res;
	606
	607	return phandle;
	608	}
	609
	610	static int enable_by_path(void blob, const char fmt, ...)
	611	{
	612	va_list ap;
	613	int node;
	614
	615	va_start(ap, fmt);
	616	node = vnode_by_path(blob, fmt, ap);
	617	va_end(ap);
618
619	if (node < 0)
620	return node;
621
622	return fdt_setprop_string(blob, node, "status", "okay");
623	}
624
625	static bool is_topaz(int id)
626	{
627	return topaz && id == peridot + topaz - 1;
628	}
629
630	static int switch_addr(int id)
631	{
632	return is_topaz(id) ? 0x2 : 0x10 + id;
633	}
634
635	static int setup_switch(void *blob, int id)
636	{
637	int res, addr, i, node, phandle;
638
639	addr = switch_addr(id);
640
641	/* first enable the switch by setting status = "okay" */
642	res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
643	if (res < 0)
644	return res;
645
646	/*
647	* now if there are more switches or a SFP module coming after,
648	* enable corresponding ports
649	*/
650	if (id < peridot + topaz - 1) {
651	res = enable_by_path(blob,
652	MDIO_PATH "/switch%i@%x/ports/port@a",
653	id, addr);
654	} else if (id == peridot - 1 && !topaz && sfp) {
655	res = enable_by_path(blob,
656	MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
657	id, addr);
658	} else {
659	res = 0;
660	}
661	if (res < 0)
662	return res;
663
664	if (id >= peridot + topaz - 1)
665	return 0;
666
667	/* finally change link property if needed */
668	node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
669	addr);
670	if (node < 0)
671	return node;
672
673	for (i = id + 1; i < peridot + topaz; ++i) {
674	phandle = phandle_by_path(blob,
675	MDIO_PATH "/switch%i@%x/ports/port@%x",
676	i, switch_addr(i),
677	is_topaz(i) ? 5 : 9);
678	if (phandle < 0)
679	return phandle;
680
681	if (i == id + 1)
682	res = fdt_setprop_u32(blob, node, "link", phandle);
683	else
684	res = fdt_appendprop_u32(blob, node, "link", phandle);
685	if (res < 0)
686	return res;
687	}
688
689	return 0;
690	}
691
692	static int remove_disabled_nodes(void *blob)
693	{
694	while (1) {
695	int res, offset;
696
697	offset = fdt_node_offset_by_prop_value(blob, -1, "status",
698	"disabled", 9);
699	if (offset < 0)
700	break;
701
702	res = fdt_del_node(blob, offset);
703	if (res < 0)
704	return res;
705	}
706
707	return 0;
708	}
709
710	int ft_board_setup(void blob, bd_t bd)
711	{
712	int node, phandle, res;
713
714	/*
715	* If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
716	* connected, enable the PCIe node.
717	*/
718	if (pci \|\| usb \|\| passpci) {
719	node = fdt_path_offset(blob, PCIE_PATH);
720	if (node < 0)
721	return node;
722
723	res = fdt_setprop_string(blob, node, "status", "okay");
724	if (res < 0)
725	return res;
726	}
727
728	/*
729	* If MOX C (Topaz switch) and/or MOX E (Peridot switch) are connected,
730	* enable the eth1 node and setup the switches.
731	*/
732	if (peridot \|\| topaz) {
733	int i;
734
735	res = enable_by_path(blob, ETH1_PATH);
736	if (res < 0)
737	return res;
738
739	for (i = 0; i < peridot + topaz; ++i) {
740	res = setup_switch(blob, i);
741	if (res < 0)
742	return res;
743	}
744	}
745
746	/*
747	* If MOX D (SFP cage module) is connected, enable the SFP node and eth1
748	* node. If there is no Peridot switch between MOX A and MOX D, add link
749	* to the SFP node to eth1 node.
750	* Also enable and configure SFP GPIO controller node.
751	*/
752	if (sfp) {
753	res = enable_by_path(blob, SFP_PATH);
754	if (res < 0)
755	return res;
756
757	res = enable_by_path(blob, ETH1_PATH);
758	if (res < 0)
759	return res;
760
761	if (!peridot) {
762	phandle = phandle_by_path(blob, SFP_PATH);
763	if (phandle < 0)
764	return res;
765
766	node = node_by_path(blob, ETH1_PATH);
767	if (node < 0)
768	return node;
769
770	res = fdt_setprop_u32(blob, node, "sfp", phandle);
771	if (res < 0)
772	return res;
773
774	res = fdt_setprop_string(blob, node, "phy-mode",
775	"sgmii");
776	if (res < 0)
777	return res;
778	}
779
780	res = enable_by_path(blob, SFP_GPIO_PATH);
781	if (res < 0)
782	return res;
783
784	if (sfp_pos) {
785	char newname[16];
786
787	/* moxtet-sfp is on non-zero position, change default */
788	node = node_by_path(blob, SFP_GPIO_PATH);
789	if (node < 0)
790	return node;
791
792	res = fdt_setprop_u32(blob, node, "reg", sfp_pos);
793	if (res < 0)
794	return res;
795
796	sprintf(newname, "gpio@%x", sfp_pos);
797
798	res = fdt_set_name(blob, node, newname);
799	if (res < 0)
800	return res;
801	}
802	}
803
804	fdt_fixup_ethernet(blob);
805
806	/* Finally remove disabled nodes, as per Rob Herring's request. */
807	remove_disabled_nodes(blob);
808
809	return 0;
810	}
811
812	#endif