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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
507bbe3e 2/*
93768393 3 * (C) Copyright 2008 - 2015 Michal Simek <[email protected]>
53ea981c 4 * Clean driver and add xilinx constant from header file
507bbe3e 5 *
53ea981c 6 * (C) Copyright 2004 Atmark Techno, Inc.
507bbe3e 7 * Yasushi SHOJI <[email protected]>
507bbe3e
WD
8 */
9
10#include <config.h>
93768393 11#include <dm.h>
53ea981c 12#include <asm/io.h>
cd93d625 13#include <linux/bitops.h>
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14#include <linux/compiler.h>
15#include <serial.h>
507bbe3e 16
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17#define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
18#define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
19#define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
20#define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
507bbe3e 21
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22#define ULITE_CONTROL_RST_TX 0x01
23#define ULITE_CONTROL_RST_RX 0x02
24
9600e8d3 25static bool little_endian __section(".data");
31a359f8 26
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27struct uartlite {
28 unsigned int rx_fifo;
29 unsigned int tx_fifo;
30 unsigned int status;
8c3bd6b5 31 unsigned int control;
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32};
33
8a8d24bd 34struct uartlite_plat {
93768393 35 struct uartlite *regs;
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36};
37
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38static u32 uart_in32(void __iomem *addr)
39{
40 if (little_endian)
41 return in_le32(addr);
42 else
43 return in_be32(addr);
44}
45
46static void uart_out32(void __iomem *addr, u32 val)
47{
48 if (little_endian)
49 out_le32(addr, val);
50 else
51 out_be32(addr, val);
52}
53
93768393 54static int uartlite_serial_putc(struct udevice *dev, const char ch)
49a23e4a 55{
8a8d24bd 56 struct uartlite_plat *plat = dev_get_plat(dev);
93768393 57 struct uartlite *regs = plat->regs;
49a23e4a 58
31a359f8 59 if (uart_in32(&regs->status) & SR_TX_FIFO_FULL)
93768393 60 return -EAGAIN;
49a23e4a 61
31a359f8 62 uart_out32(&regs->tx_fifo, ch & 0xff);
49a23e4a 63
93768393 64 return 0;
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65}
66
93768393 67static int uartlite_serial_getc(struct udevice *dev)
49a23e4a 68{
8a8d24bd 69 struct uartlite_plat *plat = dev_get_plat(dev);
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70 struct uartlite *regs = plat->regs;
71
31a359f8 72 if (!(uart_in32(&regs->status) & SR_RX_FIFO_VALID_DATA))
93768393 73 return -EAGAIN;
49a23e4a 74
31a359f8 75 return uart_in32(&regs->rx_fifo) & 0xff;
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76}
77
93768393 78static int uartlite_serial_pending(struct udevice *dev, bool input)
49a23e4a 79{
8a8d24bd 80 struct uartlite_plat *plat = dev_get_plat(dev);
93768393 81 struct uartlite *regs = plat->regs;
507bbe3e 82
93768393 83 if (input)
31a359f8 84 return uart_in32(&regs->status) & SR_RX_FIFO_VALID_DATA;
93768393 85
31a359f8 86 return !(uart_in32(&regs->status) & SR_TX_FIFO_EMPTY);
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87}
88
93768393 89static int uartlite_serial_probe(struct udevice *dev)
25239e12 90{
8a8d24bd 91 struct uartlite_plat *plat = dev_get_plat(dev);
93768393 92 struct uartlite *regs = plat->regs;
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93 int ret;
94
95 uart_out32(&regs->control, 0);
96 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
97 ret = uart_in32(&regs->status);
98 /* Endianness detection */
99 if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
100 little_endian = true;
101 uart_out32(&regs->control, ULITE_CONTROL_RST_RX |
102 ULITE_CONTROL_RST_TX);
103 }
25239e12 104
93768393 105 return 0;
90bad891 106}
49a23e4a 107
d1998a9f 108static int uartlite_serial_of_to_plat(struct udevice *dev)
49a23e4a 109{
8a8d24bd 110 struct uartlite_plat *plat = dev_get_plat(dev);
87d69229 111
8613c8d8 112 plat->regs = dev_read_addr_ptr(dev);
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113
114 return 0;
87d69229 115}
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116
117static const struct dm_serial_ops uartlite_serial_ops = {
118 .putc = uartlite_serial_putc,
119 .pending = uartlite_serial_pending,
120 .getc = uartlite_serial_getc,
121};
122
123static const struct udevice_id uartlite_serial_ids[] = {
124 { .compatible = "xlnx,opb-uartlite-1.00.b", },
125 { .compatible = "xlnx,xps-uartlite-1.00.a" },
126 { }
127};
128
129U_BOOT_DRIVER(serial_uartlite) = {
130 .name = "serial_uartlite",
131 .id = UCLASS_SERIAL,
132 .of_match = uartlite_serial_ids,
d1998a9f 133 .of_to_plat = uartlite_serial_of_to_plat,
8a8d24bd 134 .plat_auto = sizeof(struct uartlite_plat),
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135 .probe = uartlite_serial_probe,
136 .ops = &uartlite_serial_ops,
93768393 137};
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138
139#ifdef CONFIG_DEBUG_UART_UARTLITE
140
141#include <debug_uart.h>
142
143static inline void _debug_uart_init(void)
144{
b62450cf 145 struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE);
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146 int ret;
147
148 uart_out32(&regs->control, 0);
149 uart_out32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
e5e8bbd2 150 ret = uart_in32(&regs->status);
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151 /* Endianness detection */
152 if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
153 little_endian = true;
154 uart_out32(&regs->control, ULITE_CONTROL_RST_RX |
155 ULITE_CONTROL_RST_TX);
156 }
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157}
158
159static inline void _debug_uart_putc(int ch)
160{
b62450cf 161 struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE);
4166ba3b 162
31a359f8 163 while (uart_in32(&regs->status) & SR_TX_FIFO_FULL)
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164 ;
165
31a359f8 166 uart_out32(&regs->tx_fifo, ch & 0xff);
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167}
168
169DEBUG_UART_FUNCS
170#endif
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