[J-u-boot.git] / common / miiphyutil.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2001
 * Gerald Van Baren, Custom IDEAS, [email protected].
 */

/*
 * This provides a bit-banged interface to the ethernet MII management
 * channel.
 */

#include <common.h>
#include <dm.h>
#include <log.h>
#include <miiphy.h>
#include <phy.h>
#include <linux/delay.h>

#include <asm/types.h>
#include <linux/list.h>
#include <malloc.h>
#include <net.h>

/* local debug macro */
#undef MII_DEBUG

#undef debug
#ifdef MII_DEBUG
#define debug(fmt, args...)	printf(fmt, ##args)
#else
#define debug(fmt, args...)
#endif /* MII_DEBUG */

static struct list_head mii_devs;
static struct mii_dev *current_mii;

/*
 * Lookup the mii_dev struct by the registered device name.
 */
struct mii_dev *miiphy_get_dev_by_name(const char *devname)
{
	struct list_head *entry;
	struct mii_dev *dev;

	if (!devname) {
		printf("NULL device name!\n");
		return NULL;
	}

	list_for_each(entry, &mii_devs) {
		dev = list_entry(entry, struct mii_dev, link);
		if (strcmp(dev->name, devname) == 0)
			return dev;
	}

	return NULL;
}

/*****************************************************************************
 *
 * Initialize global data. Need to be called before any other miiphy routine.
 */
void miiphy_init(void)
{
	INIT_LIST_HEAD(&mii_devs);
	current_mii = NULL;
}

struct mii_dev *mdio_alloc(void)
{
	struct mii_dev *bus;

	bus = malloc(sizeof(*bus));
	if (!bus)
		return bus;

	memset(bus, 0, sizeof(*bus));

	/* initalize mii_dev struct fields */
	INIT_LIST_HEAD(&bus->link);

	return bus;
}

void mdio_free(struct mii_dev *bus)
{
	free(bus);
}

int mdio_register(struct mii_dev *bus)
{
	if (!bus || !bus->read || !bus->write)
		return -1;

	/* check if we have unique name */
	if (miiphy_get_dev_by_name(bus->name)) {
		printf("mdio_register: non unique device name '%s'\n",
			bus->name);
		return -1;
	}

	/* add it to the list */
	list_add_tail(&bus->link, &mii_devs);

	if (!current_mii)
		current_mii = bus;

	return 0;
}

int mdio_register_seq(struct mii_dev *bus, int seq)
{
	int ret;

	/* Setup a unique name for each mdio bus */
	ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
	if (ret < 0)
		return ret;

	return mdio_register(bus);
}

int mdio_unregister(struct mii_dev *bus)
{
	if (!bus)
		return 0;

	/* delete it from the list */
	list_del(&bus->link);

	if (current_mii == bus)
		current_mii = NULL;

	return 0;
}

void mdio_list_devices(void)
{
	struct list_head *entry;

	list_for_each(entry, &mii_devs) {
		int i;
		struct mii_dev *bus = list_entry(entry, struct mii_dev, link);

		printf("%s:\n", bus->name);

		for (i = 0; i < PHY_MAX_ADDR; i++) {
			struct phy_device *phydev = bus->phymap[i];

			if (phydev) {
				printf("%x - %s", i, phydev->drv->name);

				if (phydev->dev)
					printf(" <--> %s\n", phydev->dev->name);
				else
					printf("\n");
			}
		}
	}
}

int miiphy_set_current_dev(const char *devname)
{
	struct mii_dev *dev;

	dev = miiphy_get_dev_by_name(devname);
	if (dev) {
		current_mii = dev;
		return 0;
	}

	printf("No such device: %s\n", devname);

	return 1;
}

struct mii_dev *mdio_get_current_dev(void)
{
	return current_mii;
}

struct list_head *mdio_get_list_head(void)
{
	return &mii_devs;
}

struct phy_device *mdio_phydev_for_ethname(const char *ethname)
{
	struct list_head *entry;
	struct mii_dev *bus;

	list_for_each(entry, &mii_devs) {
		int i;
		bus = list_entry(entry, struct mii_dev, link);

		for (i = 0; i < PHY_MAX_ADDR; i++) {
			if (!bus->phymap[i] || !bus->phymap[i]->dev)
				continue;

			if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
				return bus->phymap[i];
		}
	}

	printf("%s is not a known ethernet\n", ethname);
	return NULL;
}

const char *miiphy_get_current_dev(void)
{
	if (current_mii)
		return current_mii->name;

	return NULL;
}

static struct mii_dev *miiphy_get_active_dev(const char *devname)
{
	/* If the current mii is the one we want, return it */
	if (current_mii)
		if (strcmp(current_mii->name, devname) == 0)
			return current_mii;

	/* Otherwise, set the active one to the one we want */
	if (miiphy_set_current_dev(devname))
		return NULL;
	else
		return current_mii;
}

/*****************************************************************************
 *
 * Read to variable <value> from the PHY attached to device <devname>,
 * use PHY address <addr> and register <reg>.
 *
 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
 *
 * Returns:
 *   0 on success
 */
int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
		 unsigned short *value)
{
	struct mii_dev *bus;
	int ret;

	bus = miiphy_get_active_dev(devname);
	if (!bus)
		return 1;

	ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
	if (ret < 0)
		return 1;

	*value = (unsigned short)ret;
	return 0;
}

/*****************************************************************************
 *
 * Write <value> to the PHY attached to device <devname>,
 * use PHY address <addr> and register <reg>.
 *
 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
 *
 * Returns:
 *   0 on success
 */
int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
		  unsigned short value)
{
	struct mii_dev *bus;

	bus = miiphy_get_active_dev(devname);
	if (bus)
		return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);

	return 1;
}

/*****************************************************************************
 *
 * Print out list of registered MII capable devices.
 */
void miiphy_listdev(void)
{
	struct list_head *entry;
	struct mii_dev *dev;

	puts("MII devices: ");
	list_for_each(entry, &mii_devs) {
		dev = list_entry(entry, struct mii_dev, link);
		printf("'%s' ", dev->name);
	}
	puts("\n");

	if (current_mii)
		printf("Current device: '%s'\n", current_mii->name);
}

/*****************************************************************************
 *
 * Read the OUI, manufacture's model number, and revision number.
 *
 * OUI:     22 bits (unsigned int)
 * Model:    6 bits (unsigned char)
 * Revision: 4 bits (unsigned char)
 *
 * This API is deprecated.
 *
 * Returns:
 *   0 on success
 */
int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
		 unsigned char *model, unsigned char *rev)
{
	unsigned int reg = 0;
	unsigned short tmp;

	if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
		debug("PHY ID register 2 read failed\n");
		return -1;
	}
	reg = tmp;

	debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);

	if (reg == 0xFFFF) {
		/* No physical device present at this address */
		return -1;
	}

	if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
		debug("PHY ID register 1 read failed\n");
		return -1;
	}
	reg |= tmp << 16;
	debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);

	*oui = (reg >> 10);
	*model = (unsigned char)((reg >> 4) & 0x0000003F);
	*rev = (unsigned char)(reg & 0x0000000F);
	return 0;
}

#ifndef CONFIG_PHYLIB
/*****************************************************************************
 *
 * Reset the PHY.
 *
 * This API is deprecated. Use PHYLIB.
 *
 * Returns:
 *   0 on success
 */
int miiphy_reset(const char *devname, unsigned char addr)
{
	unsigned short reg;
	int timeout = 500;

	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
		debug("PHY status read failed\n");
		return -1;
	}
	if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
		debug("PHY reset failed\n");
		return -1;
	}
#ifdef CONFIG_PHY_RESET_DELAY
	udelay(CONFIG_PHY_RESET_DELAY);	/* Intel LXT971A needs this */
#endif
	/*
	 * Poll the control register for the reset bit to go to 0 (it is
	 * auto-clearing).  This should happen within 0.5 seconds per the
	 * IEEE spec.
	 */
	reg = 0x8000;
	while (((reg & 0x8000) != 0) && timeout--) {
		if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
			debug("PHY status read failed\n");
			return -1;
		}
		udelay(1000);
	}
	if ((reg & 0x8000) == 0) {
		return 0;
	} else {
		puts("PHY reset timed out\n");
		return -1;
	}
	return 0;
}
#endif /* !PHYLIB */

/*****************************************************************************
 *
 * Determine the ethernet speed (10/100/1000).  Return 10 on error.
 */
int miiphy_speed(const char *devname, unsigned char addr)
{
	u16 bmcr, anlpar, adv;

#if defined(CONFIG_PHY_GIGE)
	u16 btsr;

	/*
	 * Check for 1000BASE-X.  If it is supported, then assume that the speed
	 * is 1000.
	 */
	if (miiphy_is_1000base_x(devname, addr))
		return _1000BASET;

	/*
	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	 */
	/* Check for 1000BASE-T. */
	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
		printf("PHY 1000BT status");
		goto miiphy_read_failed;
	}
	if (btsr != 0xFFFF &&
			(btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
		return _1000BASET;
#endif /* CONFIG_PHY_GIGE */

	/* Check Basic Management Control Register first. */
	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
		printf("PHY speed");
		goto miiphy_read_failed;
	}
	/* Check if auto-negotiation is on. */
	if (bmcr & BMCR_ANENABLE) {
		/* Get auto-negotiation results. */
		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
			printf("PHY AN speed");
			goto miiphy_read_failed;
		}

		if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
			puts("PHY AN adv speed");
			goto miiphy_read_failed;
		}
		return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
	}
	/* Get speed from basic control settings. */
	return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;

miiphy_read_failed:
	printf(" read failed, assuming 10BASE-T\n");
	return _10BASET;
}

/*****************************************************************************
 *
 * Determine full/half duplex.  Return half on error.
 */
int miiphy_duplex(const char *devname, unsigned char addr)
{
	u16 bmcr, anlpar, adv;

#if defined(CONFIG_PHY_GIGE)
	u16 btsr;

	/* Check for 1000BASE-X. */
	if (miiphy_is_1000base_x(devname, addr)) {
		/* 1000BASE-X */
		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
			printf("1000BASE-X PHY AN duplex");
			goto miiphy_read_failed;
		}
	}
	/*
	 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	 */
	/* Check for 1000BASE-T. */
	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
		printf("PHY 1000BT status");
		goto miiphy_read_failed;
	}
	if (btsr != 0xFFFF) {
		if (btsr & PHY_1000BTSR_1000FD) {
			return FULL;
		} else if (btsr & PHY_1000BTSR_1000HD) {
			return HALF;
		}
	}
#endif /* CONFIG_PHY_GIGE */

	/* Check Basic Management Control Register first. */
	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
		puts("PHY duplex");
		goto miiphy_read_failed;
	}
	/* Check if auto-negotiation is on. */
	if (bmcr & BMCR_ANENABLE) {
		/* Get auto-negotiation results. */
		if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
			puts("PHY AN duplex");
			goto miiphy_read_failed;
		}

		if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
			puts("PHY AN adv duplex");
			goto miiphy_read_failed;
		}
		return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
		    FULL : HALF;
	}
	/* Get speed from basic control settings. */
	return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;

miiphy_read_failed:
	printf(" read failed, assuming half duplex\n");
	return HALF;
}

/*****************************************************************************
 *
 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
 * 1000BASE-T, or on error.
 */
int miiphy_is_1000base_x(const char *devname, unsigned char addr)
{
#if defined(CONFIG_PHY_GIGE)
	u16 exsr;

	if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
		printf("PHY extended status read failed, assuming no "
			"1000BASE-X\n");
		return 0;
	}
	return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
#else
	return 0;
#endif
}

#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/*****************************************************************************
 *
 * Determine link status
 */
int miiphy_link(const char *devname, unsigned char addr)
{
	unsigned short reg;

	/* dummy read; needed to latch some phys */
	(void)miiphy_read(devname, addr, MII_BMSR, &reg);
	if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
		puts("MII_BMSR read failed, assuming no link\n");
		return 0;
	}

	/* Determine if a link is active */
	if ((reg & BMSR_LSTATUS) != 0) {
		return 1;
	} else {
		return 0;
	}
}
#endif
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
c609719b WD	2	/*
	3	* (C) Copyright 2001
	4	* Gerald Van Baren, Custom IDEAS, [email protected].
c609719b WD	5	*/
	6
	7	/*
	8	* This provides a bit-banged interface to the ethernet MII management
	9	* channel.
	10	*/
	11
	12	#include <common.h>
c74c8e66	13	#include <dm.h>
f7ae49fc	14	#include <log.h>
c609719b	15	#include <miiphy.h>
5f184715	16	#include <phy.h>
c05ed00a	17	#include <linux/delay.h>
c609719b	18
63ff004c MB	19	#include <asm/types.h>
	20	#include <linux/list.h>
	21	#include <malloc.h>
	22	#include <net.h>
	23
	24	/* local debug macro */
63ff004c MB	25	#undef MII_DEBUG
	26
	27	#undef debug
	28	#ifdef MII_DEBUG
16a53238	29	#define debug(fmt, args...) printf(fmt, ##args)
63ff004c	30	#else
16a53238	31	#define debug(fmt, args...)
63ff004c MB	32	#endif /* MII_DEBUG */
63ff004c MB	33
63ff004c MB	34	static struct list_head mii_devs;
	35	static struct mii_dev *current_mii;
	36
0daac978 MF	37	/*
	38	* Lookup the mii_dev struct by the registered device name.
	39	*/
5f184715	40	struct mii_dev miiphy_get_dev_by_name(const char devname)
0daac978 MF	41	{
	42	struct list_head *entry;
	43	struct mii_dev *dev;
	44
	45	if (!devname) {
	46	printf("NULL device name!\n");
	47	return NULL;
	48	}
	49
	50	list_for_each(entry, &mii_devs) {
	51	dev = list_entry(entry, struct mii_dev, link);
	52	if (strcmp(dev->name, devname) == 0)
	53	return dev;
	54	}
	55
0daac978 MF	56	return NULL;
	57	}
	58
d9785c14 MB	59	/*****************************************************************************
	60	*
	61	* Initialize global data. Need to be called before any other miiphy routine.
	62	*/
5700bb63	63	void miiphy_init(void)
d9785c14	64	{
16a53238	65	INIT_LIST_HEAD(&mii_devs);
298035df	66	current_mii = NULL;
d9785c14 MB	67	}
d9785c14 MB	68
5f184715 AF	69	struct mii_dev *mdio_alloc(void)
	70	{
	71	struct mii_dev *bus;
	72
	73	bus = malloc(sizeof(*bus));
	74	if (!bus)
	75	return bus;
	76
	77	memset(bus, 0, sizeof(*bus));
	78
	79	/* initalize mii_dev struct fields */
	80	INIT_LIST_HEAD(&bus->link);
	81
	82	return bus;
	83	}
	84
cb6baca7 BM	85	void mdio_free(struct mii_dev *bus)
	86	{
	87	free(bus);
	88	}
	89
5f184715 AF	90	int mdio_register(struct mii_dev *bus)
5f184715 AF	91	{
d39449b1	92	if (!bus \|\| !bus->read \|\| !bus->write)
5f184715 AF	93	return -1;
	94
	95	/* check if we have unique name */
	96	if (miiphy_get_dev_by_name(bus->name)) {
	97	printf("mdio_register: non unique device name '%s'\n",
	98	bus->name);
	99	return -1;
	100	}
	101
	102	/* add it to the list */
	103	list_add_tail(&bus->link, &mii_devs);
	104
	105	if (!current_mii)
	106	current_mii = bus;
	107
	108	return 0;
	109	}
	110
79e2a6a0 MS	111	int mdio_register_seq(struct mii_dev *bus, int seq)
	112	{
	113	int ret;
	114
	115	/* Setup a unique name for each mdio bus */
	116	ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
	117	if (ret < 0)
	118	return ret;
	119
	120	return mdio_register(bus);
	121	}
	122
cb6baca7 BM	123	int mdio_unregister(struct mii_dev *bus)
	124	{
	125	if (!bus)
	126	return 0;
	127
	128	/* delete it from the list */
	129	list_del(&bus->link);
	130
	131	if (current_mii == bus)
	132	current_mii = NULL;
	133
	134	return 0;
	135	}
	136
5f184715 AF	137	void mdio_list_devices(void)
	138	{
	139	struct list_head *entry;
	140
	141	list_for_each(entry, &mii_devs) {
	142	int i;
	143	struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
	144
	145	printf("%s:\n", bus->name);
	146
	147	for (i = 0; i < PHY_MAX_ADDR; i++) {
	148	struct phy_device *phydev = bus->phymap[i];
	149
	150	if (phydev) {
15a2acdf	151	printf("%x - %s", i, phydev->drv->name);
5f184715 AF	152
	153	if (phydev->dev)
	154	printf(" <--> %s\n", phydev->dev->name);
	155	else
	156	printf("\n");
	157	}
	158	}
	159	}
	160	}
	161
5700bb63	162	int miiphy_set_current_dev(const char *devname)
63ff004c	163	{
63ff004c MB	164	struct mii_dev *dev;
63ff004c MB	165
5f184715	166	dev = miiphy_get_dev_by_name(devname);
0daac978 MF	167	if (dev) {
	168	current_mii = dev;
	169	return 0;
63ff004c MB	170	}
63ff004c MB	171
5f184715 AF	172	printf("No such device: %s\n", devname);
5f184715 AF	173
63ff004c MB	174	return 1;
	175	}
	176
5f184715 AF	177	struct mii_dev *mdio_get_current_dev(void)
	178	{
	179	return current_mii;
	180	}
	181
9215bb1f PB	182	struct list_head *mdio_get_list_head(void)
	183	{
	184	return &mii_devs;
	185	}
	186
5f184715 AF	187	struct phy_device mdio_phydev_for_ethname(const char ethname)
	188	{
	189	struct list_head *entry;
	190	struct mii_dev *bus;
	191
	192	list_for_each(entry, &mii_devs) {
	193	int i;
	194	bus = list_entry(entry, struct mii_dev, link);
	195
	196	for (i = 0; i < PHY_MAX_ADDR; i++) {
	197	if (!bus->phymap[i] \|\| !bus->phymap[i]->dev)
	198	continue;
	199
	200	if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
	201	return bus->phymap[i];
	202	}
	203	}
	204
	205	printf("%s is not a known ethernet\n", ethname);
	206	return NULL;
	207	}
	208
5700bb63	209	const char *miiphy_get_current_dev(void)
63ff004c MB	210	{
	211	if (current_mii)
	212	return current_mii->name;
	213
	214	return NULL;
	215	}
	216
ede16ea3 MF	217	static struct mii_dev miiphy_get_active_dev(const char devname)
	218	{
	219	/* If the current mii is the one we want, return it */
	220	if (current_mii)
	221	if (strcmp(current_mii->name, devname) == 0)
	222	return current_mii;
	223
	224	/* Otherwise, set the active one to the one we want */
	225	if (miiphy_set_current_dev(devname))
	226	return NULL;
	227	else
	228	return current_mii;
	229	}
	230
63ff004c MB	231	/*****************************************************************************
	232	*
	233	* Read to variable <value> from the PHY attached to device <devname>,
	234	* use PHY address <addr> and register <reg>.
	235	*
1cdabc4b AF	236	* This API is deprecated. Use phy_read on a phy_device found via phy_connect
1cdabc4b AF	237	*
63ff004c MB	238	* Returns:
	239	* 0 on success
	240	*/
f915c931	241	int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
298035df	242	unsigned short *value)
63ff004c	243	{
5f184715	244	struct mii_dev *bus;
d67d5d52	245	int ret;
63ff004c	246
5f184715	247	bus = miiphy_get_active_dev(devname);
d67d5d52	248	if (!bus)
5f184715	249	return 1;
63ff004c	250
d67d5d52 AG	251	ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
	252	if (ret < 0)
	253	return 1;
	254
	255	*value = (unsigned short)ret;
	256	return 0;
63ff004c MB	257	}
	258
	259	/*****************************************************************************
	260	*
	261	* Write <value> to the PHY attached to device <devname>,
	262	* use PHY address <addr> and register <reg>.
	263	*
1cdabc4b AF	264	* This API is deprecated. Use phy_write on a phy_device found by phy_connect
1cdabc4b AF	265	*
63ff004c MB	266	* Returns:
	267	* 0 on success
	268	*/
f915c931	269	int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
298035df	270	unsigned short value)
63ff004c	271	{
5f184715	272	struct mii_dev *bus;
63ff004c	273
5f184715 AF	274	bus = miiphy_get_active_dev(devname);
	275	if (bus)
	276	return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
63ff004c	277
0daac978	278	return 1;
63ff004c MB	279	}
	280
	281	/*****************************************************************************
	282	*
	283	* Print out list of registered MII capable devices.
	284	*/
16a53238	285	void miiphy_listdev(void)
63ff004c MB	286	{
	287	struct list_head *entry;
	288	struct mii_dev *dev;
	289
16a53238 AF	290	puts("MII devices: ");
	291	list_for_each(entry, &mii_devs) {
	292	dev = list_entry(entry, struct mii_dev, link);
	293	printf("'%s' ", dev->name);
63ff004c	294	}
16a53238	295	puts("\n");
63ff004c MB	296
63ff004c MB	297	if (current_mii)
16a53238	298	printf("Current device: '%s'\n", current_mii->name);
63ff004c MB	299	}
63ff004c MB	300
c609719b WD	301	/*****************************************************************************
	302	*
	303	* Read the OUI, manufacture's model number, and revision number.
	304	*
	305	* OUI: 22 bits (unsigned int)
	306	* Model: 6 bits (unsigned char)
	307	* Revision: 4 bits (unsigned char)
	308	*
1cdabc4b AF	309	* This API is deprecated.
1cdabc4b AF	310	*
c609719b WD	311	* Returns:
	312	* 0 on success
	313	*/
5700bb63	314	int miiphy_info(const char devname, unsigned char addr, unsigned int oui,
c609719b WD	315	unsigned char model, unsigned char rev)
	316	{
	317	unsigned int reg = 0;
8bf3b005	318	unsigned short tmp;
c609719b	319
16a53238 AF	320	if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
	321	debug("PHY ID register 2 read failed\n");
	322	return -1;
c609719b	323	}
8bf3b005	324	reg = tmp;
c609719b	325
16a53238	326	debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
26c7bab8	327
c609719b WD	328	if (reg == 0xFFFF) {
c609719b WD	329	/* No physical device present at this address */
16a53238	330	return -1;
c609719b WD	331	}
c609719b WD	332
16a53238 AF	333	if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
	334	debug("PHY ID register 1 read failed\n");
	335	return -1;
c609719b	336	}
8bf3b005	337	reg \|= tmp << 16;
16a53238	338	debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
26c7bab8	339
298035df LJ	340	*oui = (reg >> 10);
	341	*model = (unsigned char)((reg >> 4) & 0x0000003F);
	342	*rev = (unsigned char)(reg & 0x0000000F);
16a53238	343	return 0;
c609719b WD	344	}
c609719b WD	345
5f184715	346	#ifndef CONFIG_PHYLIB
c609719b WD	347	/*****************************************************************************
	348	*
	349	* Reset the PHY.
1cdabc4b AF	350	*
	351	* This API is deprecated. Use PHYLIB.
	352	*
c609719b WD	353	* Returns:
	354	* 0 on success
	355	*/
5700bb63	356	int miiphy_reset(const char *devname, unsigned char addr)
c609719b WD	357	{
c609719b WD	358	unsigned short reg;
ab5a0dcb	359	int timeout = 500;
c609719b	360
16a53238 AF	361	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
	362	debug("PHY status read failed\n");
	363	return -1;
f89920c3	364	}
16a53238 AF	365	if (miiphy_write(devname, addr, MII_BMCR, reg \| BMCR_RESET) != 0) {
	366	debug("PHY reset failed\n");
	367	return -1;
c609719b	368	}
5653fc33	369	#ifdef CONFIG_PHY_RESET_DELAY
16a53238	370	udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
5653fc33	371	#endif
c609719b WD	372	/*
	373	* Poll the control register for the reset bit to go to 0 (it is
	374	* auto-clearing). This should happen within 0.5 seconds per the
	375	* IEEE spec.
	376	*/
c609719b	377	reg = 0x8000;
ab5a0dcb	378	while (((reg & 0x8000) != 0) && timeout--) {
8ef583a0	379	if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
ab5a0dcb SR	380	debug("PHY status read failed\n");
ab5a0dcb SR	381	return -1;
c609719b	382	}
ab5a0dcb	383	udelay(1000);
c609719b WD	384	}
c609719b WD	385	if ((reg & 0x8000) == 0) {
16a53238	386	return 0;
c609719b	387	} else {
16a53238 AF	388	puts("PHY reset timed out\n");
16a53238 AF	389	return -1;
c609719b	390	}
16a53238	391	return 0;
c609719b	392	}
5f184715	393	#endif /* !PHYLIB */
c609719b	394
c609719b WD	395	/*****************************************************************************
c609719b WD	396	*
71bc6e64	397	* Determine the ethernet speed (10/100/1000). Return 10 on error.
c609719b	398	*/
5700bb63	399	int miiphy_speed(const char *devname, unsigned char addr)
c609719b	400	{
8c83c030	401	u16 bmcr, anlpar, adv;
c609719b	402
6fb6af6d	403	#if defined(CONFIG_PHY_GIGE)
71bc6e64 LJ	404	u16 btsr;
	405
	406	/*
	407	* Check for 1000BASE-X. If it is supported, then assume that the speed
	408	* is 1000.
	409	*/
16a53238	410	if (miiphy_is_1000base_x(devname, addr))
71bc6e64	411	return _1000BASET;
16a53238	412
71bc6e64 LJ	413	/*
	414	* No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	415	*/
	416	/* Check for 1000BASE-T. */
16a53238 AF	417	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
16a53238 AF	418	printf("PHY 1000BT status");
71bc6e64 LJ	419	goto miiphy_read_failed;
	420	}
	421	if (btsr != 0xFFFF &&
16a53238	422	(btsr & (PHY_1000BTSR_1000FD \| PHY_1000BTSR_1000HD)))
71bc6e64	423	return _1000BASET;
6fb6af6d	424	#endif /* CONFIG_PHY_GIGE */
855a496f	425
a56bd922	426	/* Check Basic Management Control Register first. */
16a53238 AF	427	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
16a53238 AF	428	printf("PHY speed");
71bc6e64	429	goto miiphy_read_failed;
c609719b	430	}
a56bd922	431	/* Check if auto-negotiation is on. */
8ef583a0	432	if (bmcr & BMCR_ANENABLE) {
a56bd922	433	/* Get auto-negotiation results. */
16a53238 AF	434	if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
16a53238 AF	435	printf("PHY AN speed");
71bc6e64	436	goto miiphy_read_failed;
a56bd922	437	}
8c83c030 DL	438
	439	if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
	440	puts("PHY AN adv speed");
	441	goto miiphy_read_failed;
	442	}
	443	return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
a56bd922 WD	444	}
a56bd922 WD	445	/* Get speed from basic control settings. */
8ef583a0	446	return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
a56bd922	447
5f841959	448	miiphy_read_failed:
16a53238	449	printf(" read failed, assuming 10BASE-T\n");
71bc6e64	450	return _10BASET;
c609719b WD	451	}
c609719b WD	452
c609719b WD	453	/*****************************************************************************
c609719b WD	454	*
71bc6e64	455	* Determine full/half duplex. Return half on error.
c609719b	456	*/
5700bb63	457	int miiphy_duplex(const char *devname, unsigned char addr)
c609719b	458	{
8c83c030	459	u16 bmcr, anlpar, adv;
c609719b	460
6fb6af6d	461	#if defined(CONFIG_PHY_GIGE)
71bc6e64 LJ	462	u16 btsr;
	463
	464	/* Check for 1000BASE-X. */
16a53238	465	if (miiphy_is_1000base_x(devname, addr)) {
71bc6e64	466	/* 1000BASE-X */
16a53238 AF	467	if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
16a53238 AF	468	printf("1000BASE-X PHY AN duplex");
71bc6e64 LJ	469	goto miiphy_read_failed;
	470	}
	471	}
	472	/*
	473	* No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
	474	*/
	475	/* Check for 1000BASE-T. */
16a53238 AF	476	if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
16a53238 AF	477	printf("PHY 1000BT status");
71bc6e64 LJ	478	goto miiphy_read_failed;
	479	}
	480	if (btsr != 0xFFFF) {
	481	if (btsr & PHY_1000BTSR_1000FD) {
	482	return FULL;
	483	} else if (btsr & PHY_1000BTSR_1000HD) {
	484	return HALF;
855a496f WD	485	}
855a496f WD	486	}
6fb6af6d	487	#endif /* CONFIG_PHY_GIGE */
855a496f	488
a56bd922	489	/* Check Basic Management Control Register first. */
16a53238 AF	490	if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
16a53238 AF	491	puts("PHY duplex");
71bc6e64	492	goto miiphy_read_failed;
c609719b	493	}
a56bd922	494	/* Check if auto-negotiation is on. */
8ef583a0	495	if (bmcr & BMCR_ANENABLE) {
a56bd922	496	/* Get auto-negotiation results. */
16a53238 AF	497	if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
16a53238 AF	498	puts("PHY AN duplex");
71bc6e64	499	goto miiphy_read_failed;
a56bd922	500	}
8c83c030 DL	501
	502	if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
	503	puts("PHY AN adv duplex");
	504	goto miiphy_read_failed;
	505	}
	506	return ((anlpar & adv) & (LPA_10FULL \| LPA_100FULL)) ?
71bc6e64	507	FULL : HALF;
a56bd922 WD	508	}
a56bd922 WD	509	/* Get speed from basic control settings. */
8ef583a0	510	return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
71bc6e64	511
5f841959	512	miiphy_read_failed:
16a53238	513	printf(" read failed, assuming half duplex\n");
71bc6e64 LJ	514	return HALF;
71bc6e64 LJ	515	}
a56bd922	516
71bc6e64 LJ	517	/*****************************************************************************
	518	*
	519	* Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
	520	* 1000BASE-T, or on error.
	521	*/
5700bb63	522	int miiphy_is_1000base_x(const char *devname, unsigned char addr)
71bc6e64 LJ	523	{
	524	#if defined(CONFIG_PHY_GIGE)
	525	u16 exsr;
	526
16a53238 AF	527	if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
16a53238 AF	528	printf("PHY extended status read failed, assuming no "
71bc6e64 LJ	529	"1000BASE-X\n");
	530	return 0;
	531	}
8ef583a0	532	return 0 != (exsr & (ESTATUS_1000XF \| ESTATUS_1000XH));
71bc6e64 LJ	533	#else
	534	return 0;
	535	#endif
c609719b WD	536	}
c609719b WD	537
6d0f6bcf	538	#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
fc3e2165 WD	539	/*****************************************************************************
	540	*
	541	* Determine link status
	542	*/
5700bb63	543	int miiphy_link(const char *devname, unsigned char addr)
fc3e2165 WD	544	{
	545	unsigned short reg;
	546
a3d991bd	547	/* dummy read; needed to latch some phys */
16a53238 AF	548	(void)miiphy_read(devname, addr, MII_BMSR, &reg);
	549	if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
	550	puts("MII_BMSR read failed, assuming no link\n");
	551	return 0;
fc3e2165 WD	552	}
	553
	554	/* Determine if a link is active */
8ef583a0	555	if ((reg & BMSR_LSTATUS) != 0) {
16a53238	556	return 1;
fc3e2165	557	} else {
16a53238	558	return 0;
fc3e2165 WD	559	}
	560	}
	561	#endif