[J-u-boot.git] / drivers / mtd / nand / raw / mxs_nand_spl.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2014 Gateworks Corporation
 * Copyright 2019 NXP
 * Author: Tim Harvey <[email protected]>
 */
#include <common.h>
#include <log.h>
#include <nand.h>
#include <malloc.h>
#include <mxs_nand.h>
#include <asm/cache.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/mtd/rawnand.h>

static struct mtd_info *mtd;
static struct nand_chip nand_chip;

static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
			     int column, int page_addr)
{
	register struct nand_chip *chip = mtd_to_nand(mtd);
	u32 timeo, time_start;

	/* write out the command to the device */
	chip->cmd_ctrl(mtd, command, NAND_CLE);

	/* Serially input address */
	if (column != -1) {
		chip->cmd_ctrl(mtd, column, NAND_ALE);
		chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
	}
	if (page_addr != -1) {
		chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
		chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE);
		/* One more address cycle for devices > 128MiB */
		if (chip->chipsize > (128 << 20))
			chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE);
	}
	chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);

	if (command == NAND_CMD_READ0) {
		chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE);
		chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
	} else if (command == NAND_CMD_RNDOUT) {
		/* No ready / busy check necessary */
		chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
			       NAND_NCE | NAND_CLE);
		chip->cmd_ctrl(mtd, NAND_CMD_NONE,
			       NAND_NCE);
	}

	/* wait for nand ready */
	ndelay(100);
	timeo = (CONFIG_SYS_HZ * 20) / 1000;
	time_start = get_timer(0);
	while (get_timer(time_start) < timeo) {
		if (chip->dev_ready(mtd))
			break;
	}
}

#if defined (CONFIG_SPL_NAND_IDENT)

/* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
static int mxs_flash_full_ident(struct mtd_info *mtd)
{
	int nand_maf_id, nand_dev_id;
	struct nand_chip *chip = mtd_to_nand(mtd);
	struct nand_flash_dev *type;

	type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL);

	if (IS_ERR(type)) {
		chip->select_chip(mtd, -1);
		return PTR_ERR(type);
	}

	return 0;
}

#else

/* Trying to detect the NAND flash using ONFi only */
static int mxs_flash_onfi_ident(struct mtd_info *mtd)
{
	register struct nand_chip *chip = mtd_to_nand(mtd);
	int i;
	u8 mfg_id, dev_id;
	u8 id_data[8];
	struct nand_onfi_params *p = &chip->onfi_params;

	/* Reset the chip */
	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

	/* Send the command for reading device ID */
	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

	/* Read manufacturer and device IDs */
	mfg_id = chip->read_byte(mtd);
	dev_id = chip->read_byte(mtd);

	/* Try again to make sure */
	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
	for (i = 0; i < 8; i++)
		id_data[i] = chip->read_byte(mtd);
	if (id_data[0] != mfg_id || id_data[1] != dev_id) {
		printf("second ID read did not match");
		return -1;
	}
	debug("0x%02x:0x%02x ", mfg_id, dev_id);

	/* read ONFI */
	chip->onfi_version = 0;
	chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
	if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
	    chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') {
		return -2;
	}

	/* we have ONFI, probe it */
	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
	chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
	mtd->name = p->model;
	mtd->writesize = le32_to_cpu(p->byte_per_page);
	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
	chip->chipsize = le32_to_cpu(p->blocks_per_lun);
	chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
	/* Calculate the address shift from the page size */
	chip->page_shift = ffs(mtd->writesize) - 1;
	chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
	/* Convert chipsize to number of pages per chip -1 */
	chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
	chip->badblockbits = 8;

	debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift);
	debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift);
	debug("oobsize=%d\n", mtd->oobsize);
	debug("chipsize=%lld\n", chip->chipsize);

	return 0;
}

#endif /* CONFIG_SPL_NAND_IDENT */

static int mxs_flash_ident(struct mtd_info *mtd)
{
	int ret;
#if defined (CONFIG_SPL_NAND_IDENT)
	ret = mxs_flash_full_ident(mtd);
#else
	ret = mxs_flash_onfi_ident(mtd);
#endif
	return ret;
}

static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page)
{
	register struct nand_chip *chip = mtd_to_nand(mtd);
	int ret;

	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page);
	ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page);
	if (ret < 0) {
		printf("read_page failed %d\n", ret);
		return -1;
	}
	return 0;
}

static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
{
	register struct nand_chip *chip = mtd_to_nand(mtd);
	unsigned int block = offs >> chip->phys_erase_shift;
	unsigned int page = offs >> chip->page_shift;

	debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block,
	      page);
	chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
	memset(chip->oob_poi, 0, mtd->oobsize);
	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);

	return chip->oob_poi[0] != 0xff;
}

/* setup mtd and nand structs and init mxs_nand driver */
void nand_init(void)
{
	/* return if already initalized */
	if (nand_chip.numchips)
		return;

	/* init mxs nand driver */
	mxs_nand_init_spl(&nand_chip);
	mtd = nand_to_mtd(&nand_chip);
	/* set mtd functions */
	nand_chip.cmdfunc = mxs_nand_command;
	nand_chip.scan_bbt = nand_default_bbt;
	nand_chip.numchips = 1;

	/* identify flash device */
	if (mxs_flash_ident(mtd)) {
		printf("Failed to identify\n");
		nand_chip.numchips = 0; /* If fail, don't use nand */
		return;
	}

	/* allocate and initialize buffers */
	nand_chip.buffers = memalign(ARCH_DMA_MINALIGN,
				     sizeof(*nand_chip.buffers));
	nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize;
	/* setup flash layout (does not scan as we override that) */
	mtd->size = nand_chip.chipsize;
	nand_chip.scan_bbt(mtd);
	mxs_nand_setup_ecc(mtd);
}

int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
{
	struct nand_chip *chip;
	unsigned int page;
	unsigned int nand_page_per_block;
	unsigned int sz = 0;
	u8 *page_buf = NULL;
	u32 page_off;

	chip = mtd_to_nand(mtd);
	if (!chip->numchips)
		return -ENODEV;

	page_buf = malloc(mtd->writesize);
	if (!page_buf)
		return -ENOMEM;

	page = offs >> chip->page_shift;
	page_off = offs & (mtd->writesize - 1);
	nand_page_per_block = mtd->erasesize / mtd->writesize;

	debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page);

	while (size) {
		if (mxs_read_page_ecc(mtd, page_buf, page) < 0)
			return -1;

		if (size > (mtd->writesize - page_off))
			sz = (mtd->writesize - page_off);
		else
			sz = size;

		memcpy(buf, page_buf + page_off, sz);

		offs += mtd->writesize;
		page++;
		buf += (mtd->writesize - page_off);
		page_off = 0;
		size -= sz;

		/*
		 * Check if we have crossed a block boundary, and if so
		 * check for bad block.
		 */
		if (!(page % nand_page_per_block)) {
			/*
			 * Yes, new block. See if this block is good. If not,
			 * loop until we find a good block.
			 */
			while (is_badblock(mtd, offs, 1)) {
				page = page + nand_page_per_block;
				/* Check i we've reached the end of flash. */
				if (page >= mtd->size >> chip->page_shift) {
					free(page_buf);
					return -ENOMEM;
				}
			}
		}
	}

	free(page_buf);

	return 0;
}

struct mtd_info *nand_get_mtd(void)
{
	return mtd;
}

int nand_default_bbt(struct mtd_info *mtd)
{
	return 0;
}

void nand_deselect(void)
{
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
73210dcc TH	2	/*
73210dcc TH	3	* Copyright (C) 2014 Gateworks Corporation
b209635c	4	* Copyright 2019 NXP
73210dcc	5	* Author: Tim Harvey <[email protected]>
73210dcc TH	6	*/
73210dcc TH	7	#include <common.h>
f7ae49fc	8	#include <log.h>
73210dcc TH	9	#include <nand.h>
73210dcc TH	10	#include <malloc.h>
1d43e24b	11	#include <mxs_nand.h>
90526e9f	12	#include <asm/cache.h>
cd93d625	13	#include <linux/bitops.h>
c05ed00a	14	#include <linux/delay.h>
61b29b82	15	#include <linux/err.h>
1cefed1e	16	#include <linux/mtd/rawnand.h>
73210dcc	17
b616d9b0	18	static struct mtd_info *mtd;
73210dcc TH	19	static struct nand_chip nand_chip;
	20
	21	static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
	22	int column, int page_addr)
	23	{
17cb4b8f	24	register struct nand_chip *chip = mtd_to_nand(mtd);
73210dcc TH	25	u32 timeo, time_start;
	26
	27	/* write out the command to the device */
	28	chip->cmd_ctrl(mtd, command, NAND_CLE);
	29
	30	/* Serially input address */
	31	if (column != -1) {
	32	chip->cmd_ctrl(mtd, column, NAND_ALE);
	33	chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
	34	}
	35	if (page_addr != -1) {
	36	chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
	37	chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE);
	38	/* One more address cycle for devices > 128MiB */
	39	if (chip->chipsize > (128 << 20))
	40	chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE);
	41	}
	42	chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
	43
	44	if (command == NAND_CMD_READ0) {
	45	chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE);
	46	chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
b209635c YL	47	} else if (command == NAND_CMD_RNDOUT) {
	48	/* No ready / busy check necessary */
	49	chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
	50	NAND_NCE \| NAND_CLE);
	51	chip->cmd_ctrl(mtd, NAND_CMD_NONE,
	52	NAND_NCE);
73210dcc TH	53	}
	54
	55	/* wait for nand ready */
	56	ndelay(100);
	57	timeo = (CONFIG_SYS_HZ * 20) / 1000;
	58	time_start = get_timer(0);
	59	while (get_timer(time_start) < timeo) {
	60	if (chip->dev_ready(mtd))
	61	break;
	62	}
	63	}
	64
4368f853 JK	65	#if defined (CONFIG_SPL_NAND_IDENT)
	66
	67	/* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
	68	static int mxs_flash_full_ident(struct mtd_info *mtd)
	69	{
	70	int nand_maf_id, nand_dev_id;
	71	struct nand_chip *chip = mtd_to_nand(mtd);
	72	struct nand_flash_dev *type;
	73
	74	type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL);
	75
	76	if (IS_ERR(type)) {
	77	chip->select_chip(mtd, -1);
	78	return PTR_ERR(type);
	79	}
	80
	81	return 0;
	82	}
	83
	84	#else
	85
	86	/* Trying to detect the NAND flash using ONFi only */
f3f2af3b	87	static int mxs_flash_onfi_ident(struct mtd_info *mtd)
73210dcc	88	{
17cb4b8f	89	register struct nand_chip *chip = mtd_to_nand(mtd);
73210dcc TH	90	int i;
	91	u8 mfg_id, dev_id;
	92	u8 id_data[8];
	93	struct nand_onfi_params *p = &chip->onfi_params;
	94
	95	/* Reset the chip */
	96	chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
	97
	98	/* Send the command for reading device ID */
	99	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
	100
	101	/* Read manufacturer and device IDs */
	102	mfg_id = chip->read_byte(mtd);
	103	dev_id = chip->read_byte(mtd);
	104
	105	/* Try again to make sure */
	106	chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
	107	for (i = 0; i < 8; i++)
	108	id_data[i] = chip->read_byte(mtd);
	109	if (id_data[0] != mfg_id \|\| id_data[1] != dev_id) {
	110	printf("second ID read did not match");
	111	return -1;
	112	}
	113	debug("0x%02x:0x%02x ", mfg_id, dev_id);
	114
	115	/* read ONFI */
	116	chip->onfi_version = 0;
	117	chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
	118	if (chip->read_byte(mtd) != 'O' \|\| chip->read_byte(mtd) != 'N' \|\|
	119	chip->read_byte(mtd) != 'F' \|\| chip->read_byte(mtd) != 'I') {
	120	return -2;
	121	}
	122
	123	/* we have ONFI, probe it */
	124	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
	125	chip->read_buf(mtd, (uint8_t )p, sizeof(p));
	126	mtd->name = p->model;
	127	mtd->writesize = le32_to_cpu(p->byte_per_page);
	128	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
	129	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
	130	chip->chipsize = le32_to_cpu(p->blocks_per_lun);
	131	chip->chipsize = (uint64_t)mtd->erasesize p->lun_count;
	132	/* Calculate the address shift from the page size */
	133	chip->page_shift = ffs(mtd->writesize) - 1;
	134	chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
	135	/* Convert chipsize to number of pages per chip -1 */
	136	chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
	137	chip->badblockbits = 8;
	138
	139	debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift);
	140	debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift);
	141	debug("oobsize=%d\n", mtd->oobsize);
	142	debug("chipsize=%lld\n", chip->chipsize);
	143
	144	return 0;
	145	}
	146
4368f853 JK	147	#endif /* CONFIG_SPL_NAND_IDENT */
4368f853 JK	148
f3f2af3b JK	149	static int mxs_flash_ident(struct mtd_info *mtd)
	150	{
	151	int ret;
4368f853 JK	152	#if defined (CONFIG_SPL_NAND_IDENT)
	153	ret = mxs_flash_full_ident(mtd);
	154	#else
f3f2af3b	155	ret = mxs_flash_onfi_ident(mtd);
4368f853	156	#endif
f3f2af3b JK	157	return ret;
	158	}
	159
73210dcc TH	160	static int mxs_read_page_ecc(struct mtd_info mtd, void buf, unsigned int page)
73210dcc TH	161	{
17cb4b8f	162	register struct nand_chip *chip = mtd_to_nand(mtd);
73210dcc TH	163	int ret;
	164
	165	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page);
	166	ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page);
	167	if (ret < 0) {
	168	printf("read_page failed %d\n", ret);
	169	return -1;
	170	}
	171	return 0;
	172	}
	173
	174	static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
	175	{
17cb4b8f	176	register struct nand_chip *chip = mtd_to_nand(mtd);
73210dcc TH	177	unsigned int block = offs >> chip->phys_erase_shift;
	178	unsigned int page = offs >> chip->page_shift;
	179
	180	debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block,
	181	page);
	182	chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
	183	memset(chip->oob_poi, 0, mtd->oobsize);
	184	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
	185
	186	return chip->oob_poi[0] != 0xff;
	187	}
	188
	189	/* setup mtd and nand structs and init mxs_nand driver */
d46d27d3	190	void nand_init(void)
73210dcc TH	191	{
	192	/* return if already initalized */
	193	if (nand_chip.numchips)
d46d27d3	194	return;
73210dcc TH	195
73210dcc TH	196	/* init mxs nand driver */
9345943b	197	mxs_nand_init_spl(&nand_chip);
30780f94	198	mtd = nand_to_mtd(&nand_chip);
73210dcc TH	199	/* set mtd functions */
73210dcc TH	200	nand_chip.cmdfunc = mxs_nand_command;
96d0be07	201	nand_chip.scan_bbt = nand_default_bbt;
73210dcc TH	202	nand_chip.numchips = 1;
	203
	204	/* identify flash device */
b616d9b0	205	if (mxs_flash_ident(mtd)) {
73210dcc	206	printf("Failed to identify\n");
d46d27d3 AF	207	nand_chip.numchips = 0; /* If fail, don't use nand */
d46d27d3 AF	208	return;
73210dcc TH	209	}
	210
	211	/* allocate and initialize buffers */
	212	nand_chip.buffers = memalign(ARCH_DMA_MINALIGN,
	213	sizeof(*nand_chip.buffers));
b616d9b0	214	nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize;
73210dcc	215	/* setup flash layout (does not scan as we override that) */
b616d9b0 SW	216	mtd->size = nand_chip.chipsize;
b616d9b0 SW	217	nand_chip.scan_bbt(mtd);
5ae585ba	218	mxs_nand_setup_ecc(mtd);
73210dcc TH	219	}
	220
	221	int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
	222	{
	223	struct nand_chip *chip;
	224	unsigned int page;
	225	unsigned int nand_page_per_block;
	226	unsigned int sz = 0;
b209635c YL	227	u8 *page_buf = NULL;
b209635c YL	228	u32 page_off;
73210dcc	229
17cb4b8f	230	chip = mtd_to_nand(mtd);
d46d27d3 AF	231	if (!chip->numchips)
d46d27d3 AF	232	return -ENODEV;
b209635c YL	233
	234	page_buf = malloc(mtd->writesize);
	235	if (!page_buf)
	236	return -ENOMEM;
	237
73210dcc	238	page = offs >> chip->page_shift;
b209635c	239	page_off = offs & (mtd->writesize - 1);
b616d9b0	240	nand_page_per_block = mtd->erasesize / mtd->writesize;
73210dcc	241
b209635c	242	debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page);
73210dcc	243
b209635c YL	244	while (size) {
b209635c YL	245	if (mxs_read_page_ecc(mtd, page_buf, page) < 0)
73210dcc	246	return -1;
b209635c YL	247
	248	if (size > (mtd->writesize - page_off))
	249	sz = (mtd->writesize - page_off);
	250	else
	251	sz = size;
	252
	253	memcpy(buf, page_buf + page_off, sz);
	254
b616d9b0	255	offs += mtd->writesize;
73210dcc	256	page++;
b209635c YL	257	buf += (mtd->writesize - page_off);
	258	page_off = 0;
	259	size -= sz;
73210dcc TH	260
	261	/*
	262	* Check if we have crossed a block boundary, and if so
	263	* check for bad block.
	264	*/
	265	if (!(page % nand_page_per_block)) {
	266	/*
	267	* Yes, new block. See if this block is good. If not,
	268	* loop until we find a good block.
	269	*/
b616d9b0	270	while (is_badblock(mtd, offs, 1)) {
73210dcc TH	271	page = page + nand_page_per_block;
73210dcc TH	272	/* Check i we've reached the end of flash. */
b209635c YL	273	if (page >= mtd->size >> chip->page_shift) {
b209635c YL	274	free(page_buf);
73210dcc	275	return -ENOMEM;
b209635c	276	}
73210dcc TH	277	}
	278	}
	279	}
	280
b209635c YL	281	free(page_buf);
b209635c YL	282
73210dcc TH	283	return 0;
	284	}
	285
aa0032f6 TH	286	struct mtd_info *nand_get_mtd(void)
	287	{
	288	return mtd;
	289	}
	290
73210dcc TH	291	int nand_default_bbt(struct mtd_info *mtd)
	292	{
	293	return 0;
	294	}
	295
73210dcc TH	296	void nand_deselect(void)
	297	{
	298	}